Abstract: A ferroelectric or electret memory circuit, particularly a ferroelectric or electret memory circuit with improved fatigue resistance, including a ferroelectric or electret memory cell with a polymer or oligomer memory material contacting first and second electrodes, at least one of the electrodes is comprised of at least one functional material capable of physical and/or chemical bulk incorporation of atomic or molecular species contained in either the electrode or the memory material and displaying a propensity for migrating in the form of mobile charged and/or neutral particles between an electrode and a memory material, something which can be detrimental to both. A functional material with the above-mentioned properties shall serve to offset any adverse effect of a migration of this kind, leading to an improvement in the fatigue resistance of the memory cell.

Abstract: A matrix-addressable ferroelectric or electret memory device and a method of operating are explained. The method includes applying a first plurality of voltage difference across a first and a second set of electrodes in the memory when data are read, and applying a second plurality of voltage differences when data are refreshed or rewritten. The first and second plurality of voltage differences correspond to sets of potential levels comprising time sequences of voltage pulses. At least one parameter indicative of a change in a memory cell response is used for determining at least one correction factor for the voltage pulses, whereby the pulse parameter is adjusted accordingly. The memory device comprises means for determining the at least one parameter, a calibration memory connected with means for determining the correction factor, and control circuits for adjusting pulse parameters as applied to read and write operations in the memory device.

Abstract: A method of driving a passive matrix display or memory array of cells comprising an electrically polarizable material exhibiting hysteresis, in particular a ferroelectric material, wherein the polarization state of individual cells can be switched by application of electric potentials or voltages to word and bit lines in the matrix or array.

Abstract: An apparatus/method for producing fabric-like electronic circuit patterns created by methodically joining electronic elements using textile fabrication-like methods in a predetermined arrangement.

Abstract: In a non-volatile memory device that includes an electrically polarizable dielectric memory material with ferroelectric or electret properties and capable of exhibiting hysteresis and remanence, wherein the memory material includes one or more polymers, at least one of these polymers is a deuterated polymer.

Abstract: In a method of driving a passive matrix display or memory array of cells comprising an electrically polarizable material exhibiting hysteresis, in particular a ferroelectric material, wherein the polarization state of individual cells can be switched by application of electric potentials or voltages to word and bit lines in the matrix or array, a potential on selected word and bit lines is controlled to approach or coincide with one of n predefined potential levels and the potentials on all word and bit lines are controlled in time according to a protocol such that word lines are sequentially latched to potentials selected among nWORD potentials, while the bit lines are either latched sequentially to potentials selected among nBIT potentials, or during a certain period of a timing sequence given by the protocol connected to circuitry for detecting charges flowing between a bit line or bit lines and cells connecting thereto.

Abstract: A method for determining a logic state of a memory cell in a data storage device, wherein the cell stores data in the form of an electrical polarization state in a capacitor containing a polarizable material, includes applying a time-dependent small signal voltage over the capacitor, and recording at least one component of a generated small-signal current response over said capacitor. Correlation analysis is performed on the response based on a reference signal derived from the time dependent small signal voltage to determine the logic state of the memory cell. An apparatus performing a phase comparison according to this method includes a phase detector connected with a memory cell for detecting at least one phase in the response signal. The apparatus is configured to determine the logic state of the memory cell by comparing the detected phase and a phase reference signal.

Abstract: A data storage/processing apparatus includes ROM and/or WORM and/or REWRITEABLE memory modules and/or processing modules provided as a single main layer or multiple main layers on top of a substrate. Transistors and/or diodes operate the apparatus. In one set of embodiments, at least some of the transistors and/or diodes are provided on or in the substrate. In another set of embodiments, at least some of the layers on the top of the substrate include low-temperature compatible organic materials and/or low temperature compatible processes inorganic films, and the transistors and/or diodes need not be disposed on or in the substrate. In a related fabricating method, the memory and/or processing modules are provided on the substrate by depositing the layers in successive steps under thermal conditions that avoid subjecting an already-deposited, processed underlying layers to static or dynamic temperatures exceeding given stability limits, particularly with regard to organic materials.

Abstract: A method for generating electrically conducting and/or semiconducting structures in three dimensions in a matrix that includes two or more materials in spatially separated material structures is disclosed. An electric field is applied to the separate material structure and the field is modulated spatially according to a protocol. The protocol represents a predetermined pattern of electrically conducting and/or semiconducting structures that are generated in the material structure in response to the field. The matrix composed by the material structures includes structures of this kind in three dimensions.

Abstract: An optoelectronic camera comprises an objective system formed by a number of optical active structures (L), particularly refractive structures in the form of microlenses or lenslets provided in an array. A detector device (D) is assigned to the lens array and comprises detectors (Dn) formed by sensor elements (E) which define pixels in the optical image. Each detector (Dn) defines a sample of the optical image and optimally all samples are used to generate a digital image. The optoelectronic camera may be realized as a color image camera, particularly for recording images in an RGB system. In a method for digital electronic formatting of an image recorded with the optoelectronic camera, zoom and pan functions are implemented in the camera.

Abstract: A ferroelectric or electret volumetric memory device with a memory material provided in sandwich between first and second electrode layers with stripe-like electrodes forming word lines and bit lines of a matrix-addressable memory array, memory cells are defined in volumes of memeory material in between two crossing word lines and bit lines and a plurality of memory arrays are provided in a stacked arrangement. A stack of memory arrays is formed by tow or more ribbon-like structures, which are folded and/or braided into each other. Each ribbon-like structure includes a flexible substrate of non-conducting material and the electrode layers respectively provided on each surface of the substrate and including the parallel strip-like electrodes extending along the ribbon-like structure.

Abstract: In a matrix-addressable optoelectronic apparatus which includes a functional medium in the form of an optoelectronically active material provided in a global layer in sandwich between a first and second electrode with parallel strip-like electrodes wherein the electrodes of the second electrode are oriented at an angle to the electrodes of the first electrode, functional elements are formed in the active material where respective electrodes overlap and correspond to optically active pixels in a display device or pixels in an optical detector, depending upon the active material used. In each of the first and second electrode, the electrodes are provided in a dense parallel configuration and mutually insulated by a thin film with a thickness that is only a fraction of the width of the electrodes.

Abstract: In a method for determining the logic state of memory cells in a passive matrix-addressable data storage device with word and bit lines, components of current response are detected and correlated with a probing voltage, and a time-dependent potential is applied on selected word and bit lines or groups thereof, said potentials being mutually coordinated in magnitude and time such that the resulting voltages across all or some of the non-addressed cells at the crossing points between inactive word lines and active bit lines are brought to contain only negligible voltage components that are temporally correlated with the probing voltage. A first apparatus according to the invention for performing the method provides sequential readout of all memory cells on an active word line (AWL) by means of detection circuits (3; 4). An active word line (AWL) is selected by a multiplexer (7), while inactive word lines (IWL) are clamped to ground during readout.

Abstract: In a data storage apparatus comprising means for storing and retrieving data in respective write and read operations, and first and second set of addressing electrodes are provided, the latter set having electrodes that preferably are oriented orthogonally to the electrodes of the first set, and the electrodes (b, c) of the second set are provided as parallel twin electrodes located in parallel recesses or trenches (3) in the electrodes of the first set. The trenches compris a soft ferroelectric or electret memory material with piezoelectric properties such that memory cells (1) with two subcells (&agr;1, &agr;2) are formed in the trench (3) respectively between the electrodes (a) of the first set and the parallel twin electrodes (b, c) on either side of the latter. In a write operation data are encoded in the memory cells (1) by means of an applied voltage potential over the subcells (&agr;1, &agr;2).

Abstract: In a ferroelectric data processing device for processing and/or storage of data with passive or electrical addressing a data-carrying medium is used in the form of a thin film (1) of ferroelectric material which by an applied electric field is polarized to determined polarization states or switched between these and is provided as a continuous layer in or adjacent toelectrode structures in the form of a matrix. A logic element (4) is formed at the intersection between an x electrode (2) and a y electrode (3) of the electrode matrix. The logic element (4) is addressed by applying to the electrodes (2, 3) a voltage greater than the coercivity field of the ferroelectric material.

Abstract: In a memory and/or data processing device having at least two stacked layers (L) which are supported by a substrate (2) or forming a sandwiched self-supporting structure, wherein the layers (L) comprise memory and/or processing circuitry with mutual connections between the layers and/or to circuitry in the substrate (2), the layers (L) are mutually arranged such that contiguous layers form a staggered structure on at least one edge of the device and at least one electrical edge conductor (3) is provided passing over the edge on one layer and down one step at a time, enabling the connection to an electrical conductor in any of the following layers in the stack.

Abstract: In a ferroelectric or electret memory circuit (C), particularly a ferroelectric or electret memory circuit with improved fatigue resistance, a ferroelectric or electret memory cell, preferably of polymer or oligomer memory material contacting first and second electrodes, at least one of the electrodes comprises at least one functional material capable of physical and/or chemical bulk incorporation of atomic or molecular species contained in the either electrode or the memory material and displaying a propensity for migrating in the form of mobile charged and/or neutral particles between an electrode and a memory material, something which can be detrimental to both. A functional material with the above-mentioned properties shall serve to offset any adverse effect of a migration of this kind, leading to an improvement in the fatigue resistance of the memory cell.

Abstract: In a data storage apparatus comprising means for storing and retrieving data in respective write and read operations, and first and second set of addressing electrodes are provided, the latter set having electrodes that preferably are oriented orthogonally to the electrodes of the first set, and the electrodes (b, c) of the second set are provided as parallel twin electrodes located in parallel recesses or trenches (3) in the electrodes of the first set. The trenches compris a soft ferroelectric or electret memory material with piezoelectric properties such that memory cells (1) with two subcells (&agr;1, &agr;2) are formed in the trench (3) respectively between the electrodes (a) of the first set and the parallel twin electrodes (b, c) on either side of the latter. In a write operation data are encoded in the memory cells (1) by means of an applied voltage potential over the subcells (&agr;1, &agr;2).

Abstract: A method and apparatus for performing read and write operations in matrix-addressed memory array of memory cells is described. The memory cells comprising an electrically polarizable material exhibiting polarization remanence, in particular and electret or ferroelectric material, where a logical value stored in a memory cell is represented by an actual polarization state in the memory cell. The degree of polarization in the polarizable material is limited during each read and write cycle to a value defined by a circuit device controlling the read and write operations, with said value ranging from zero to an upper limit corresponding to saturation of the polarization and consistent with predetermined criterta for a reliable detection of a logic state of a memory cell.

Abstract: In a matrix-addressable optoelectronic apparatus comprising a functional medium in the form of an optoelectronically active material (3) provided in a global layer in sandwich between a first and second electrode means (EM1,EM2) with parallel strip-like electrodes (1;2) wherein the electrodes (2) of the second electrode means (EM2) are oriented at an angle to the electrodes (1) of the first electrode means (EM2), functional elements (5) are formed in the active material where respective electrodes (1,2) overlap and correspond to optically active pixels (5) in a display device or pixels (5) in an optical detector, depending upon the active material (3) used. In each of the electrode means (EM1;EM2) the electrodes (1;2) are provided in a dense parallel configuration and mutually insulated by a thin film (6) with a thickness that is only a fraction of the width of the electrodes.