Abstract: In some embodiments, a semiconductor structure includes a first conductivity type region comprising a first superlattice, and an i-type active region adjacent to the first conductivity type region comprising an i-type superlattice. The first conductivity type region can be a p-type region or an n-type region. The first superlattice can be comprised of a plurality of first unit cells comprising a first set of single crystal layers, and the i-type superlattice can be comprised of a plurality of i-type unit cells comprising a second set of single crystal layers. An average alloy content of the plurality of the first unit cells and the i-type unit cells can be constant along a growth direction. The structure can be configured such that electrons and holes recombine to generate a spectrum of light with a longest wavelength peak that corresponds to a transition between electron and hole confined energy states within the i-type superlattice.

Abstract: An optoelectronic semiconductor light emitting device configured to emit light having a wavelength in the range from about 150 nm to about 425 nm is disclosed. In embodiments, the device comprises a substrate having at least one epitaxial semiconductor layer disposed thereon, wherein each of the one or more epitaxial semiconductor layers comprises a metal oxide. At least one of the epitaxial semiconductor layers can include single crystal AxB1?xOn, where: 0<x<1.0; A is Al and/or Ga; and B is Mg, Ni, a rare earth, Er, Gd, Ir, Bi, or Li.

Abstract: An optoelectronic semiconductor light emitting device configured to emit light having a wavelength in the range from about 150 nm to about 425 nm is disclosed. In embodiments, the device comprises a substrate having at least one epitaxial semiconductor layer disposed thereon, wherein each of the one or more epitaxial semiconductor layers comprises a metal oxide. An epitaxial semiconductor layer of the device can include a first single crystal oxide material. The first single crystal oxide material can include: at least one of magnesium, nickel, and zinc; at least one of aluminum and gallium; and oxygen. The first single crystal oxide material can also include a cubic crystal symmetry.

Abstract: The present disclosure relates to a semiconductor structure including a superlattice with repeating unit cells of a narrow bandgap (NBG) layer and a wide bandgap (WBG) layer. The NBG and WBG layers include an NBG and a WBG polar semiconductor material, respectively. An energy barrier region is in contact with the superlattice, including a total of N layers of alternating the WBG and NBG polar semiconductor materials, wherein a total thickness of the energy barrier region is equal to a thickness of N/2 unit cells of the superlattice, and wherein N is an even number greater than or equal to 4. Layers of the N layers of the energy barrier region, either WBG layers or NBG layers, are both thicker and thinner than a corresponding layer (either WBG or NBG) of the unit cell of the superlattice to form the energy barrier.

Abstract: The techniques described herein relate to a transistor, including a substrate including SiC-4H, MgO, or AlGaO3; an epitaxial channel layer on the substrate, and a gate layer on the epitaxial channel layer. The epitaxial channel layer can include Ga2O3 with a first bandgap, wherein the Ga2O3 is: ?-Ga2O3 with a hexagonal or trigonal crystal symmetry; ?-Ga2O3 with an orthorhombic crystal symmetry; or ?-Ga2O3 with a cubic crystal symmetry. The gate layer can include an oxide material with a second bandgap, where the second bandgap is wider than the first bandgap. The transistor can also include electrical contacts including: a source electrical contact coupled to the epitaxial channel layer; a drain electrical contact coupled to the epitaxial channel layer; and a gate electrical contact coupled to the gate layer.

Abstract: In some embodiments, an optoelectronic semiconductor light emitting device includes: a substrate; and a plurality of epitaxial semiconductor layers disposed on the substrate. Each of the epitaxial semiconductor layers can comprise an epitaxial oxide. At least one of the epitaxial semiconductor layers can comprise an optically emissive material of direct bandgap type. At least one of the epitaxial semiconductor layers can comprise (Alx1Ga1?x1)2O3 wherein 0?x1?1. The plurality of epitaxial semiconductor layers can comprise: first region comprising a first conductivity type; a second region comprising a not-intentionally doped (NID) intrinsic region; and a third region comprising a second conductivity type. The substrate and the plurality of epitaxial semiconductor layers can be a substantially single crystal epitaxially formed device. The optoelectronic semiconductor light emitting device can be configured to emit light having a wavelength in a range from 150 nm to 425 nm.

Abstract: An LED (e.g., a UV-LED) structure includes a substrate, a first cathode layer, a second cathode layer, a light emitting layer, an anode layer, an anode contact, and a cathode contact. The first cathode layer has a first aluminum composition. The second cathode layer is disposed on top of the first cathode layer and has a second aluminum composition greater than the first aluminum composition. A two-dimensional electron gas (2DEG) layer is formed at an interface between the first cathode layer and the second cathode layer during operation of the LED structure.

Abstract: A semiconductor structure includes a superlattice with two or more unit cells, wherein each of the unit cells includes a first epitaxial layer including NiO or Ga2O3. Each of the unit cells can further include a second epitaxial layer including a second epitaxial oxide material selected from NizGa2(1?z)O3?2z or NizAl2(1z>)O3?2z, where 0<z<1. In some cases, the second epitaxial oxide material can include Nix(Al,Ga)yOz.

Abstract: A semiconductor structure includes a superlattice with two or more unit cells, wherein each of the unit cells includes: a first epitaxial layer including NiO; and a second epitaxial layer including a second epitaxial oxide material. In some cases, the semiconductor structure can include: a first region including p-type conductivity, wherein the first region includes the superlattice; a second region including an epitaxial oxide material; and a third region including an epitaxial oxide material, wherein the second region is located between the first region and the third region along a growth direction.

Abstract: The techniques described herein relate to a method for generating a binary-oxide vapor precursor for a deposition process including: providing a binary-oxide vapor source; heating the binary-oxide vapor source to form an elemental vapor from an elemental component contained therein; and reacting the elemental vapor with solid binary-oxide members contained therein. The binary-oxide vapor source can include: a closed end and an open end; a first region located adjacent to the closed end including the elemental component; and a second region located between the first region and the open end, the second region including a contained aggregate structure including the solid binary-oxide members and spaces through which a vapor can pass. In some aspects, the techniques described herein relate to a material deposition system including the binary-oxide vapor source coupled to a growth chamber.

Abstract: The present disclosure provides techniques for epitaxial oxide materials, structures and devices. In some embodiments, an integrated circuit includes a field effect transistor (FET) and a waveguide coupled to the FET, wherein the waveguide comprises a signal conductor. The FET can include: a substrate; an epitaxial semiconductor layer on the substrate, the epitaxial semiconductor layer comprising a second oxide material with a first bandgap; a gate layer on the epitaxial semiconductor layer, the gate layer comprising a gate oxide material with a second bandgap, wherein the second bandgap is wider than the first bandgap; and electrical contacts. The electrical contacts can include: a source electrical contact coupled to the epitaxial semiconductor layer; a drain electrical contact coupled to the epitaxial semiconductor layer; and a first gate electrical contact coupled to the gate layer.

Abstract: The techniques described herein relate to a transistor including a substrate including sapphire, an epitaxial channel layer on the substrate, and an epitaxial gate layer on the channel layer. The epitaxial channel layer can include ?-Ga2O3, with a first bandgap. The epitaxial gate layer can include an oxide material with a second bandgap, wherein the second bandgap is wider than the first bandgap. The transistor can also include electrical contacts, including: a source electrical contact coupled to the epitaxial channel layer; a drain electrical contact coupled to the epitaxial channel layer; and a gate electrical contact coupled to the epitaxial gate layer.

Abstract: A multilayered semiconductor diode device can include a substrate including silicon carbide (SiC) with an epitaxial drift layer including a first semiconductor oxide material above the SiC substrate with respect to a growth direction. The multilayered semiconductor diode device can further include a polar nitride layer including a polar semiconductor nitride material above the epitaxial drift layer with respect to the growth direction, and a metal layer above the polar nitride layer with respect to the growth direction.

Abstract: The techniques described herein relate to a transistor, including a substrate, an epitaxial buffer layer, an epitaxial channel layer, and a gate layer. The substrate includes a first oxide material with a first crystal symmetry, the epitaxial buffer layer includes a second oxide material with a second crystal symmetry, the epitaxial channel layer includes a third oxide material with a third crystal symmetry and a first bandgap, and the gate layer includes a fourth oxide material with a second bandgap. The first crystal symmetry is different from either the second crystal symmetry or the third crystal symmetry, and the second bandgap is wider than the first bandgap. The transistor also includes electrical contacts including a source electrical contact coupled to the epitaxial channel layer, a drain electrical contact coupled to the epitaxial channel layer, and a gate electrical contact coupled to the gate layer.

Abstract: The techniques described herein relate to a transistor including a single crystal substrate, an epitaxial channel layer (ECL) on the single crystal substrate, a gate layer on the ECL, a source electrical contact coupled to the ECL, a drain electrical contact coupled to the ECL, and a gate electrical contact coupled to the gate layer. The substrate includes a substrate material with a first crystal symmetry and the ECL includes an ECL oxide material with a second crystal symmetry, where the first crystal symmetry is different from the second crystal symmetry. The gate layer includes a gate oxide material, where the ECL oxide material has a first bandgap and the gate oxide material has a second bandgap, and the second bandgap is wider than the first bandgap.

Abstract: A multilayered semiconductor diode device can include a substrate including silicon carbide (SiC) with an epitaxial drift layer including a first semiconductor oxide material above the SiC substrate with respect to a growth direction. The multilayered semiconductor diode device can further include a polar nitride layer including a polar semiconductor nitride material above the epitaxial drift layer with respect to the growth direction, and a metal layer above the polar nitride layer with respect to the growth direction.

Abstract: In some embodiments, a semiconductor structure includes a single crystal substrate, a first epitaxial oxide layer on the single crystal substrate, and a second epitaxial oxide layer on the single crystal substrate. The first epitaxial oxide layer can include a first oxide material with a cubic crystal symmetry. The second epitaxial oxide layer can include a second oxide material with a monoclinic crystal symmetry. The second epitaxial oxide layer can be elastically strained to the first epitaxial oxide layer. The substrate can include MgO, MgAl2O4, or ?-Ga2O3. The first epitaxial oxide layer can include MgO with a cubic crystal symmetry oriented in the (100) direction, and the second epitaxial oxide layer can include ?-Ga2O3 oriented in the (100) direction, where there is a 45° rotation around the (100) direction between the MgO and the ?-Ga2O3 crystal structures.

Abstract: Methods and systems of heating a substrate in a vacuum deposition process include a resistive heater having a resistive heating element. Radiative heat emitted from the resistive heating element has a wavelength in a mid-infrared band from 5 ?m to 40 ?m that corresponds to a phonon absorption band of the substrate. The substrate comprises a wide bandgap semiconducting material and has an uncoated surface and a deposition surface opposite the uncoated surface. The resistive heater and the substrate are positioned in a vacuum deposition chamber. The uncoated surface of the substrate is spaced apart from and faces the resistive heater.

Abstract: Various forms of Mga(Six(GeySn1-y)1-x)Ob are disclosed. In some aspects, an epitaxial layer comprises single crystal Mga(Six(GeySn1-y)1-x)Ob, wherein 1.5?a?2.5, 3?b?5, 0?x?1, and 0?y?1; wherein the single crystal Mga(Six(GeySn1-y)1-x)Ob has a crystal symmetry compatible with a substrate or an underlying layer on which the single crystal Mga(Six(GeySn1-y)1-x)Ob is grown. In some aspects, a semiconductor structure includes an epitaxial layer comprising single crystal Mga(Six(GeySn1-y)1-x)Ob, wherein 1.5?a?2.5, 3?b?5, 0?x?1, and 0?y?1; The semiconductor structure also includes a substrate or an underlying layer on which the single crystal Mga(Six(GeySn1-y)1-x)Ob is grown; wherein the single crystal Mga(Six(GeySn1-y)1-x)Ob has a crystal symmetry compatible with the substrate or the underlying layer.

Abstract: Semiconductor structures and methods for forming those semiconductor structures are disclosed. A semiconductor structure can include a growth axis, a first layer consisting of a single layer, and a second layer. The single layer can include: a first semiconductor with a polar crystal structure; and a monotonic change in composition from a wider band gap (WBG) material to a narrower band gap (NBG) material or from a NBG material to a WBG material along the growth axis. The monotonic change in composition can induce p-type or n-type conductivity in the first layer. The second layer can include a second semiconductor with the polar crystal structure. There is no abrupt change in polarization at an interface between the first layer and the second layer, and the monotonic change in composition is the only monotonic change in composition in the semiconductor structure.