Patents by Inventor Petar Atanackovic

Petar Atanackovic has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10276667
    Abstract: A vertical conduction junction transistor apparatus includes a multilayered semiconductor unit cell that has a substrate, epitaxial drift layer, epitaxial channel layer, gate region and channel control region. The substrate is silicon carbide (SiC). The epitaxial drift layer comprises SiC and is formed on the top surface of the substrate. The epitaxial channel layer comprises SiC and is formed on a top surface of the epitaxial drift layer, where a sidewall of the epitaxial channel layer is at an angle to the vertical direction. The gate region is formed in the sidewall of the epitaxial channel layer, the gate region having an inner gate region boundary that is parallel to the sidewall. The channel control region is in the epitaxial channel layer and has a width bounded by the inner gate region boundary. The channel control region has a trapezoidal cross-section in a plane taken in the vertical direction.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: April 30, 2019
    Assignee: Silanna Asia Pte Ltd
    Inventor: Petar Atanackovic
  • Publication number: 20190088817
    Abstract: A superlattice and method for forming that superlattice are disclosed. In particular, an engineered layered single crystal structure forming a superlattice is disclosed. The superlattice provides p-type or n-type conductivity, and comprises alternating host layers and impurity layers, wherein: the host layers consist essentially of a semiconductor material; and the impurity layers consist of a donor or acceptor material.
    Type: Application
    Filed: November 6, 2018
    Publication date: March 21, 2019
    Applicant: Silanna UV Technologies Pte Ltd
    Inventor: Petar Atanackovic
  • Publication number: 20190051794
    Abstract: Semiconductor structures and methods for forming those semiconductor structures are disclosed. For example, a p-type or n-type semiconductor structure is disclosed. The semiconductor structure has a polar crystal structure with a growth axis that is substantially parallel to a spontaneous polarization axis of the polar crystal structure. The semiconductor structure changes in composition from a wider band gap (WBG) material to a narrower band gap (NBG) material or from a NBG material to a WBG material along the growth axis to induce p-type or n-type conductivity.
    Type: Application
    Filed: October 8, 2018
    Publication date: February 14, 2019
    Applicant: Silanna UV Technologies Pte Ltd
    Inventors: Petar Atanackovic, Matthew Godfrey
  • Publication number: 20190013435
    Abstract: Resonant optical cavity light emitting devices are disclosed, where the device includes a substrate, a first spacer region, a light emitting region, a second spacer region, and a reflector. The light emitting region is configured to emit a target emission deep ultraviolet wavelength, and is positioned at a separation distance from the reflector. The reflector may have a metal composition comprising elemental aluminum or may be a distributed Bragg reflector. The device has an optical cavity comprising the first spacer region, the second spacer region and the light emitting region, where the optical cavity has a total thickness less than or equal to K·?/n. K is a constant ranging from 0.25 to less than 1, ? is the target wavelength, and n is an effective refractive index of the optical cavity at the target wavelength.
    Type: Application
    Filed: August 29, 2018
    Publication date: January 10, 2019
    Applicant: Silanna UV Technologies Pte Ltd
    Inventor: Petar Atanackovic
  • Publication number: 20190006821
    Abstract: A light emitting device includes a substrate, a buffer layer, a first active layer, and a plurality of mesa regions. A portion of the first active layer includes a first electrical polarity. The plurality of mesa regions includes at least a portion of the first active layer, a light emitting region on the portion of the first active layer, and a second active layer on the light emitting region. A portion of the second active layer includes a second electrical polarity. The light emitting region is configured to emit light which has a target wavelength between 200 nm to 300 nm. A thickness of the light emitting region is a multiple of the target wavelength, and a dimension of the light emitting region parallel to the thickness is smaller than 10 times the target wavelength, such that the emitted light is confined to fewer than 10 transverse modes.
    Type: Application
    Filed: June 28, 2018
    Publication date: January 3, 2019
    Applicant: Silanna UV Technologies Pte Ltd
    Inventors: Johnny Cai Tang, Petar Atanackovic
  • Patent number: 10153395
    Abstract: Semiconductor structures and methods for forming those semiconductor structures are disclosed. For example, a p-type or n-type semiconductor structure is disclosed. The semiconductor structure has a polar crystal structure with a growth axis that is substantially parallel to a spontaneous polarization axis of the polar crystal structure. The semiconductor structure changes in composition from a wider band gap (WBG) material to a narrower band gap (NBG) material or from a NBG material to a WBG material along the growth axis to induce p-type or n-type conductivity.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: December 11, 2018
    Assignee: Silanna UV Technologies Pte Ltd
    Inventors: Petar Atanackovic, Matthew Godfrey
  • Patent number: 10128404
    Abstract: A superlattice and method for forming that superlattice are disclosed. In particular, an engineered layered single crystal structure forming a superlattice is disclosed. The superlattice provides p-type or n-type conductivity, and comprises alternating host layers and impurity layers, wherein: the host layers consist essentially of a semiconductor material; and the impurity layers consist of a donor or acceptor material.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: November 13, 2018
    Assignee: Silanna UV Technologies Pte Ltd
    Inventor: Petar Atanackovic
  • Patent number: 10069036
    Abstract: Resonant optical cavity light emitting devices and method of producing such devices are disclosed. The device includes a substrate, a first spacer region, a light emitting region, a second spacer region, and a reflector. The light emitting region is configured to emit a target emission deep ultraviolet wavelength, and is positioned at a separation distance from the reflector. The reflector has a metal composition comprising elemental aluminum. Using a three-dimensional electromagnetic spatial and temporal simulator, it is determined if an emission output at an exit plane relative to the substrate meets a predetermined criterion. The light emitting region is placed at a final separation distance from the reflector, where the final separation distance results in the predetermined criterion being met.
    Type: Grant
    Filed: July 6, 2017
    Date of Patent: September 4, 2018
    Assignee: SILANNA UV TECHNOLOGIES PTE LTD
    Inventor: Petar Atanackovic
  • Publication number: 20180122985
    Abstract: Semiconductor structures and methods for forming those semiconductor structures are disclosed. For example, a p-type or n-type semiconductor structure is disclosed. The semiconductor structure has a polar crystal structure with a growth axis that is substantially parallel to a spontaneous polarization axis of the polar crystal structure. The semiconductor structure changes in composition from a wider band gap (WBG) material to a narrower band gap (NBG) material or from a NBG material to a WBG material along the growth axis to induce p-type or n-type conductivity.
    Type: Application
    Filed: December 22, 2017
    Publication date: May 3, 2018
    Applicant: The Silanna Group Pty Ltd
    Inventors: Petar Atanackovic, Matthew Godfrey
  • Publication number: 20180042511
    Abstract: In some embodiments, a semiconductor biosensor includes a plurality of wells, a plurality of detectors, and processing circuitry. Each well is configured to hold a test sample and to allow the test sample to be irradiated with ultraviolet radiation. The plurality of detectors are configured to capture a spectral response of the test sample irradiated with the ultraviolet radiation. Each well is coupled directly onto a detector, and each detector includes a) a photodiode and b) a planar optical antenna tuned to a particular wavelength. The planar optical antenna is between the photodiode and the well. The processing circuitry is coupled to the plurality of detectors, the processing circuitry being configured to calculate an average spectral response for the plurality of detectors.
    Type: Application
    Filed: July 31, 2017
    Publication date: February 15, 2018
    Applicant: Silanna UV Technologies Pte Ltd
    Inventor: Petar Atanackovic
  • Patent number: 9871165
    Abstract: Semiconductor structures and methods for forming those semiconductor structures are disclosed. For example, a p-type or n-type semiconductor structure is disclosed. The semiconductor structure has a polar crystal structure with a growth axis that is substantially parallel to a spontaneous polarization axis of the polar crystal structure. The semiconductor structure changes in composition from a wider band gap (WBG) material to a narrower band gap (NBG) material or from a NBG material to a WBG material along the growth axis to induce p-type or n-type conductivity.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: January 16, 2018
    Assignee: The Silanna Group Pty Ltd
    Inventors: Petar Atanackovic, Matthew Godfrey
  • Publication number: 20170309779
    Abstract: Resonant optical cavity light emitting devices and method of producing such devices are disclosed. The device includes a substrate, a first spacer region, a light emitting region, a second spacer region, and a reflector. The light emitting region is configured to emit a target emission deep ultraviolet wavelength, and is positioned at a separation distance from the reflector. The reflector has a metal composition comprising elemental aluminum. Using a three-dimensional electromagnetic spatial and temporal simulator, it is determined if an emission output at an exit plane relative to the substrate meets a predetermined criterion. The light emitting region is placed at a final separation distance from the reflector, where the final separation distance results in the predetermined criterion being met.
    Type: Application
    Filed: July 6, 2017
    Publication date: October 26, 2017
    Applicant: Silanna UV Technologies Pte Ltd
    Inventor: Petar Atanackovic
  • Publication number: 20170263813
    Abstract: Semiconductor structures and methods for forming those semiconductor structures are disclosed. For example, a p-type or n-type semiconductor structure is disclosed. The semiconductor structure has a polar crystal structure with a growth axis that is substantially parallel to a spontaneous polarization axis of the polar crystal structure. The semiconductor structure changes in composition from a wider band gap (WBG) material to a narrower band gap (NBG) material or from a NBG material to a WBG material along the growth axis to induce p-type or n-type conductivity.
    Type: Application
    Filed: May 22, 2017
    Publication date: September 14, 2017
    Applicant: The Silanna Group Pty Ltd
    Inventors: Petar Atanackovic, Matthew Godfrey
  • Publication number: 20170263809
    Abstract: A superlattice and method for forming that superlattice are disclosed. In particular, an engineered layered single crystal structure forming a superlattice is disclosed. The superlattice provides p-type or n-type conductivity, and comprises alternating host layers and impurity layers, wherein: the host layers consist essentially of a semiconductor material; and the impurity layers consist of a donor or acceptor material.
    Type: Application
    Filed: May 12, 2017
    Publication date: September 14, 2017
    Applicant: THE SILANNA GROUP PTY LTD
    Inventor: Petar Atanackovic
  • Patent number: 9691938
    Abstract: Semiconductor structures and methods for forming those semiconductor structures are disclosed. For example, a p-type or n-type semiconductor structure is disclosed. The semiconductor structure has a polar crystal structure with a growth axis that is substantially parallel to a spontaneous polarization axis of the polar crystal structure. The semiconductor structure changes in composition from a wider band gap (WBG) material to a narrower band gap (NBG) material or from a NBG material to a WBG material along the growth axis to induce p-type or n-type conductivity.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: June 27, 2017
    Assignee: The Silanna Group Pty Ltd
    Inventors: Petar Atanackovic, Matthew Godfrey
  • Patent number: 9685587
    Abstract: A superlattice and method for forming that superlattice are disclosed. In particular, an engineered layered single crystal structure forming a superlattice is disclosed. The superlattice provides p-type or n-type conductivity, and comprises alternating host layers and impurity layers, wherein: the host layers consist essentially of a semiconductor material; and the impurity layers consist essentially of a corresponding donor or acceptor material.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: June 20, 2017
    Assignee: The Silanna Group Pty Ltd
    Inventor: Petar Atanackovic
  • Patent number: 9614122
    Abstract: Light emitting semiconductor junctions are disclosed. An exemplary light emitting junction has a first electrical contact coupled to a first side of the junction. The exemplary junction also has a second electrical contact coupled to a second side of the junction. The exemplary junction also has a region of set straining material that exerts a strain on the junction and alters both: (i) an optical polarization, and (ii) an emission wavelength of the junction. The region of set straining material is not on a current path between said first electrical contact and said second electrical contact. The region of set straining material covers a third side and a fourth side of the light emitting junction along a cross section of the light emitting junction. The light emitting semiconductor junction device comprises a three-five alloy.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: April 4, 2017
    Assignee: The Silanna Group Pty Ltd
    Inventor: Petar Atanackovic
  • Publication number: 20160308090
    Abstract: Light emitting semiconductor junctions are disclosed. An exemplary light emitting junction has a first electrical contact coupled to a first side of the junction. The exemplary junction also has a second electrical contact coupled to a second side of the junction. The exemplary junction also has a region of set straining material that exerts a strain on the junction and alters both: (i) an optical polarization, and (ii) an emission wavelength of the junction. The region of set straining material is not on a current path between said first electrical contact and said second electrical contact. The region of set straining material covers a third side and a fourth side of the light emitting junction along a cross section of the light emitting junction. The light emitting semiconductor junction device comprises a three-five alloy.
    Type: Application
    Filed: June 24, 2016
    Publication date: October 20, 2016
    Inventor: Petar Atanackovic
  • Patent number: 9412911
    Abstract: Light emitting semiconductor junctions are disclosed. An exemplary light emitting junction has a first electrical contact coupled to a first side of the junction. The exemplary junction also has a second electrical contact coupled to a second side of the junction. The exemplary junction also has a region of set straining material that exerts a strain on the junction and alters both: (i) an optical polarization, and (ii) an emission wavelength of the junction. The region of set straining material is not on a current path between said first electrical contact and said second electrical contact. The region of set straining material covers a third side and a fourth side of the light emitting junction along a cross section of the light emitting junction. The light emitting semiconductor junction device comprises a three-five alloy.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: August 9, 2016
    Assignee: The Silanna Group Pty Ltd
    Inventor: Petar Atanackovic
  • Publication number: 20160163920
    Abstract: A superlattice and method for forming that superlattice are disclosed. In particular, an engineered layered single crystal structure forming a superlattice is disclosed. The superlattice provides p-type or n-type conductivity, and comprises alternating host layers and impurity layers, wherein: the host layers consist essentially of a semiconductor material; and the impurity layers consist essentially of a corresponding donor or acceptor material.
    Type: Application
    Filed: December 21, 2015
    Publication date: June 9, 2016
    Inventor: Petar Atanackovic