Abstract: A configurable radio frequency receiver is provided. The receiver has at least one low noise amplifier; an oscillator arrangement for producing a plurality of signals having a first number or a second number of separate phases; and multiple mixer modules having inputs connected to an output of the low noise amplifier. The receiver has a configurable resistor network. The receiver is configured such that it can operate in a first mode with said plurality of signals having said first number of phases or a second mode with said plurality of signals having said second number of phases. The configurable resistor network enables the receiver to operate in the first mode in a first configuration, and the second mode in a second configuration. The mixer modules are employed during the operation of the first mode and the second mode.

Abstract: An amplifier for converting a single-ended input signal to a differential output signal. The amplifier comprises a first transistor, a second transistor, a third transistor and a fourth transistor. The first transistor, configured in common-source or common-emitter mode, receives the single-ended input signal and generates a first part of the differential output signal. The second transistor, also configured in common-source or common-emitter mode, generates a second part of the differential output signal. The third and fourth transistors are capacitively cross-coupled. The amplifier further comprises inductive degeneration such that a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor.

Abstract: A local oscillator buffer circuit comprises a complementary common-source stage comprising a first p-channel transistor (MCSP) and a first n-channel transistor (MCSN), arranged such that their respective gate terminals are connected together at a first input node, and their respective drain terminals of each of is connected together at a buffer output node. A complementary source-follower stage comprises a second p-channel transistor (MSFP) and a second n-channel transistor (MSFN), arranged such that their respective gate terminals are connected together at a second input node, and their respective source terminals are connected together at the buffer output node.

Abstract: A local oscillator buffer circuit comprises a complementary common-source stage comprising a first p-channel transistor (MCSP) and a first n-channel transistor (MCSN), arranged such that their respective gate terminals are connected together at a first input node, and their respective drain terminals of each of is connected together at a buffer output node. A complementary source-follower stage comprises a second p-channel transistor (MSFP) and a second n-channel transistor (MSFN), arranged such that their respective gate terminals are connected together at a second input node, and their respective source terminals are connected together at the buffer output node.

Abstract: A low noise amplifier comprising a first transconductance amplifier arranged to receive an input voltage at its input terminal and to generate an output current at its output terminal. A second transconductance amplifier is arranged such that its input terminal is connected to the input terminal of the first transconductance amplifier, and such that the output terminal of the second transconductance amplifier is connected to the input terminal of the second transconductance amplifier via a capacitive feedback network (C1).

Abstract: An amplifier for converting a single-ended input signal to a differential output signal. The amplifier comprises a first transistor, a second transistor, a third transistor and a fourth transistor. The first transistor, configured in common-source or common-emitter mode, receives the single-ended input signal and generates a first part of the differential output signal. The second transistor, also configured in common-source or common-emitter mode, generates a second part of the differential output signal. The third and fourth transistors are capacitively cross-coupled. The amplifier further comprises inductive degeneration such that a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor.

Abstract: An amplifier for converting a single-ended input signal to a differential output signal. The amplifier comprises a first transistor, a second transistor, a third transistor and a fourth transistor. The first transistor, configured in common-source or common-emitter mode, receives the single-ended input signal and generates a first part of the differential output signal. The second transistor, also configured in common-source or common-emitter mode, generates a second part of the differential output signal. The third and fourth transistors are capacitively cross-coupled. The amplifier further comprises inductive degeneration such that a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor.

Abstract: A radio frequency receiver is provided that comprises an antenna, an RF amplifier, at least one down conversion mixer stage and a variable notch filter. The at least one down-conversion mixer stage is arranged to act on signals provided by the RF amplifier and is tuned to a tuned frequency ft which is selected from a plurality of possible tuned frequencies corresponding to a frequency of the RF signal to be received at the antenna. The variable notch filter is arranged to act on signals passing from the antenna to the RF amplifier and has a resonance frequency fr which is selected from a plurality of possible resonance frequencies such that fr=ft in where n is a whole number between 2 and 10. The variable notch filter thereby acts to attenuate signals from the antenna at said resonance frequency.

Abstract: A radio frequency receiver is provided that comprises an antenna, an RF amplifier, at least one down conversion mixer stage and a variable notch filter. The at least one down-conversion mixer stage is arranged to act on signals provided by the RF amplifier and is tuned to a tuned frequency ft which is selected from a plurality of possible tuned frequencies corresponding to a frequency of the RF signal to be received at the antenna. The variable notch filter is arranged to act on signals passing from the antenna to the RF amplifier and has a resonance frequency fr which is selected from a plurality of possible resonance frequencies such that fr=ft in where n is a whole number between 2 and 10. The variable notch filter thereby acts to attenuate signals from the antenna at said resonance frequency.

Abstract: A radio receiver device is arranged to receive an input voltage signal at an input frequency and comprises: a first amplification circuit portion; a second amplification circuit portion; a current buffer circuit portion; and a down-mixer circuit portion. The first amplification circuit portion is arranged to amplify the input voltage signal to generate an amplified current signal which is input to the current buffer circuit portion. The current buffer circuit portion has an input impedance and an output impedance, wherein the output impedance is greater than the input impedance and is arranged to generate a buffered current signal. The down-mixer circuit portion is arranged to receive the buffered current signal and generate a down-converted current signal at a baseband frequency. The second amplification circuit portion is arranged to amplify the down-converted current signal to produce an output voltage signal.

Abstract: An amplifier for converting a single-ended input signal to a differential output signal. The amplifier comprises a first transistor, a second transistor, a third transistor and a fourth transistor. The first transistor, configured in common-source or common-emitter mode, receives the single-ended input signal and generates a first part of the differential output signal. The second transistor, also configured in common-source or common-emitter mode, generates a second part of the differential output signal. The third and fourth transistors are capacitively cross-coupled. The amplifier further comprises inductive degeneration such that a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor.

Abstract: An amplifier for converting a single-ended input signal to a differential output signal. The amplifier comprises a first transistor, a second transistor, a third transistor and a fourth transistor. The first transistor, configured in common-source or common-emitter mode, receives the single-ended input signal and generates a first part of the differential output signal. The second transistor, also configured in common-source or common-emitter mode, generates a second part of the differential output signal. The third and fourth transistors are capacitively cross-coupled. The amplifier further comprises inductive degeneration such that a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor.

Abstract: A radio frequency receiver device comprises: a receiver input arranged to receive signals having one or more frequency components within a frequency spectrum; a filter having a filter output impedance; and an amplifier comprising: an amplifier input (134a, 134b) connected to the filter output; an amplifier output 72a, 72b); at least one radio frequency input transistor (144a, 144b); and a feedback circuit including at least one feedback resistor (146a, 146b). The device is arranged to be selectably operable in: a first mode wherein the amplifier has first feedback resistance and transconductance values respectively such that the amplifier input impedance and the filter output impedance are substantially the same; and a second mode having second feedback resistance and transconductance values such that upon connection of a predetermined external impedance matching circuit (160) between the filter and the amplifier, the amplifier input impedance and the filter output impedance are substantially the same.

Abstract: A radio frequency receiver device comprises: a receiver input arranged to receive signals having one or more frequency components within a frequency spectrum; a filter having a filter output impedance; and an amplifier comprising: an amplifier input (134a, 134b) connected to the filter output; an amplifier output 72a, 72b); at least one radio frequency input transistor (144a, 144b); and a feedback circuit including at least one feedback resistor (146a, 146b). The device is arranged to be selectably operable in: a first mode wherein the amplifier has first feedback resistance and transconductance values respectively such that the amplifier input impedance and the filter output impedance are substantially the same; and a second mode having second feedback resistance and transconductance values such that upon connection of a predetermined external impedance matching circuit (160) between the filter and the amplifier, the amplifier input impedance and the filter output impedance are substantially the same.

Abstract: An amplifier for converting a single-ended input signal to a differential output signal. The amplifier comprises a first transistor, a second transistor, a third transistor and a fourth transistor. The first transistor, configured in common-source or common-emitter mode, receives the single-ended input signal and generates a first part of the differential output signal. The second transistor, also configured in common-source or common-emitter mode, generates a second part of the differential output signal. The third and fourth transistors are capacitively cross-coupled. The amplifier further comprises inductive degeneration such that a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor.

Abstract: An amplifier for converting a single-ended input signal to a differential output signal. The amplifier comprises a first transistor, a second transistor, a third transistor and a fourth transistor. The first transistor, configured in common-source or common-emitter mode, receives the single-ended input signal and generates a first part of the differential output signal. The second transistor, also configured in common-source or common-emitter mode, generates a second part of the differential output signal. The third and fourth transistors are capacitively cross-coupled. The amplifier further comprises inductive degeneration such that a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor.

Abstract: An amplifier for converting a single-ended input signal to a differential output signal. The amplifier comprises a first transistor, a second transistor, a third transistor and a fourth transistor. The first transistor, configured in common-source or common-emitter mode, receives the single-ended input signal and generates a first part of the differential output signal. The second transistor, also configured in common-source or common-emitter mode, generates a second part of the differential output signal. The third and fourth transistors are capacitively cross-coupled. The amplifier further comprises inductive degeneration such that a source or emitter of the first transistor is connected to a first inductor and a source or emitter of the second transistor is connected to a second inductor.

Abstract: A local oscillator signal generation circuit (150) for generating quadrature-related local oscillator signals comprises a source signal generator (153) arranged to generate a differential-mode source signal, a buffer stage (158) coupled to an output (156) of the source signal generator (153) and arranged to buffer the differential-mode source signal, and a quadrature generation stage (170) coupled to an output (168) of the buffer stage (158) and arranged to generate an in-phase local oscillator signal and a quadrature local oscillator signal from the buffered differential-mode source signal. The buffer stage (158) comprises a primary differential amplifier (159) having an input (162) coupled to an input (157) of the buffer stage (158), and a secondary differential amplifier (160) having an input (164) coupled to an output (163) of the primary differential amplifier (159) and an output (165) coupled to the output (168) of the buffer stage (158).

Abstract: A resistor network comprises one or more switched resistor branches. Each switched resistor branch comprises a first resistor connected in series with a first switch, wherein a first terminal of the first resistor is connected to the input terminal of the resistor network, a second terminal of the first resistor is connected to a first terminal of the first switch forming a middle node, and a second terminal of the first switch is connected to the output terminal of the resistor network. Each switched resistor branch further comprises a second resistor connected in series with a second switch, wherein the series connected second resistor and second switch is connected between the middle node and a third terminal of the one or more switched resistor branches. The resistor network further comprises a third resistor connected between the input and output terminals of the resistor network.

Abstract: A resistor network comprises one or more switched resistor branches. Each switched resistor branch comprises a first resistor connected in series with a first switch, wherein a first terminal of the first resistor is connected to the input terminal of the resistor network, a second terminal of the first resistor is connected to a first terminal of the first switch forming a middle node, and a second terminal of the first switch is connected to the output terminal of the resistor network. Each switched resistor branch further comprises a second resistor connected in series with a second switch, wherein the series connected second resistor and second switch is connected between the middle node and a third terminal of the one or more switched resistor branches. The resistor network further comprises a third resistor connected between the input and output terminals of the resistor network.