Patents by Inventor Peter A. Benson

Peter A. Benson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7244665
    Abstract: An elevated containment structure in the shape of a wafer edge ring surrounding a surface of a semiconductor wafer is disclosed, as well as methods of forming and using such a structure. In one embodiment, a wafer edge ring is formed using a stereolithography (STL) process. In another embodiment, a wafer edge ring is formed with a spin coating apparatus provided with a wafer edge exposure (WEE) system. In further embodiments, a wafer edge ring is used to contain a liquid over a wafer active surface during a processing operation. In one embodiment, the wafer edge ring contains a liquid having a higher refractive index than air while exposing a photoresist on the wafer by immersion lithography. In another embodiment, the wafer edge ring contains a curable liquid material while forming a chip scale package (CSP) sealing layer on the wafer.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: July 17, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Peter A. Benson
  • Publication number: 20070157952
    Abstract: Methods for cleaning consolidatable material from substrates or from features that have been fabricated with the material include application of pressure, force, or a cleaning agent to the substrate or feature. The pressure, force, or cleaning agent may be applied in a variety of ways. The unconsolidated material that has been removed from the substrate or feature may also be collected, optionally filtered, and reused in a subsequent programmed material consolidation process.
    Type: Application
    Filed: March 15, 2007
    Publication date: July 12, 2007
    Inventors: William Hiatt, Warren Farnworth, David Hembree, Peter Benson
  • Patent number: 7239933
    Abstract: A programmed material consolidation apparatus includes at least one fabrication site and a material consolidation system associated with the at least one fabrication site. The at least one fabrication site may be configured to receive one or more fabrication substrates, such as semiconductor substrates. A machine vision system with a translatable or locationally fixed camera may be associated with the at least one fabrication site and the material consolidation system. A cleaning component may also be associated with the at least one fabrication site. The cleaning component may share one or more elements with the at least one fabrication site, or may be separate therefrom. The programmed material consolidation apparatus may also include a substrate handling system, which places fabrication substrates at appropriate locations of the programmed material consolidation apparatus.
    Type: Grant
    Filed: November 10, 2003
    Date of Patent: July 3, 2007
    Assignee: Micron Technology, Inc.
    Inventors: William M. Hiatt, Warren M. Farnworth, David R. Hembree, Peter A. Benson
  • Patent number: 7235431
    Abstract: A method of packaging at least a portion of a semiconductor die or dice is disclosed. Uncured material may be disposed proximate at least the periphery of at least one semiconductor die and at least partially cured substantially as a whole. Methods of forming conductive elements such as traces, vias, and bond pads are also disclosed. More specifically, forming at least one organometallic layer to a substrate surface and selectively heating at least a portion thereof is disclosed. Also, forming a layer of conductive photopolymer over at least a portion of a surface of a substrate and removing at least a portion thereof is disclosed. A microlens having a plurality of mutually adhered layers of cured, optically transmissive material, methods of forming same, and systems so equipped are disclosed.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: June 26, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Alan G. Wood, Warren M. Farnworth, Charles M. Watkins, Peter A. Benson
  • Patent number: 7237085
    Abstract: A method and software for analyzing a heap is described, in which a snapshot is made of a heap, which can be later analyzed by an analysis tool when a program that had run out of memory is no longer running. In one embodiment, an object allocated by the program is accessed and copied into a file, and an address of the object allocated by the process is recorded in association with an offset in the file of the copy of the object. The copy of the object copied into the file has preferably the same size as the object allocated by the process. A heap analysis tool may then be run on the objects copied into the file.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: June 26, 2007
    Assignee: Oracle International Corporation
    Inventors: Harlan Sexton, Robert Lee, Peter Benson
  • Patent number: 7223674
    Abstract: Disclosed herein are methods for forming photolithography alignment markers on the back side of a substrate, such as a crystalline silicon substrate used in the manufacture of semiconductor integrated circuits. According to the disclosed techniques, laser radiation is used to remove the material (e.g., silicon) from the back side of a substrate to form the back side alignment markers at specified areas. Such removal can comprise the use of laser ablation or laser-assisted etching. The substrate is placed on a motor-controlled substrate holding mechanism in a laser removal chamber, and the areas are automatically moved underneath the laser radiation to removal the material. The substrate holding mechanism can comprise a standard chuck (in which case use of a protective layer on the front side of the substrate is preferred), or a substrate clamping assembly which suspends the substrate at its edges (in which case the protective layer is not necessary).
    Type: Grant
    Filed: May 6, 2004
    Date of Patent: May 29, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Pary Baluswamy, Peter Benson
  • Patent number: 7225044
    Abstract: A programmed material consolidation apparatus includes a support with a surface that receives at least one substrate and prevents unconsolidated material from contacting undesired regions, such as the bottom surface, of the at least one substrate. When a programmed material consolidation process is used to form one or more objects on or adjacent to a substrate, the substrate may be secured to a support surface. Additionally, unconsolidated material may be prevented from contacting one or more undesired areas of the substrate.
    Type: Grant
    Filed: November 10, 2003
    Date of Patent: May 29, 2007
    Assignee: Micron Technology, Inc.
    Inventors: William M. Hiatt, Warren M. Farnworth, David R. Hembree, Peter A. Benson
  • Patent number: 7199439
    Abstract: Microelectronic imagers and methods for packaging microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging unit can include a microelectronic die, an image sensor, an integrated circuit electrically coupled to the image sensor, and a bond-pad electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the die and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad with conductive fill material at least partially disposed in the passage. An electrically conductive support member is carried by and projects from the bond-pad. A cover over the image sensor is coupled to the support member.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: April 3, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Sidney B. Rigg, William M. Hiatt, Kyle K. Kirby, Peter A. Benson, James M. Wark, Alan G. Wood, David R. Hembree, Salman Akram, Charles M. Watkins
  • Publication number: 20070066048
    Abstract: A method for forming at least one conductive element is disclosed. Particularly, a semiconductor substrate, including a plurality of semiconductor dice thereon, may be provided and a dielectric layer may be formed thereover. At least one depression may be laser ablated in the dielectric layer and an electrically conductive material may be deposited thereinto. Also, a method for assembling a semiconductor die having a plurality of bond pads and a dielectric layer formed thereover to a carrier substrate having a plurality of terminal pads is disclosed. At least one depression may be laser ablated into the dielectric layer and a conductive material may be deposited thereinto for electrical communication between the semiconductor die and the carrier substrate. The semiconductor die may be affixed to the carrier substrate and at least one of the dielectric layer and the conductive material may remain substantially solid during affixation therebetween. The methods may be implemented at the wafer level.
    Type: Application
    Filed: November 17, 2006
    Publication date: March 22, 2007
    Inventors: Peter Benson, Charles Watkins
  • Patent number: 7189954
    Abstract: Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external contacts operatively coupled to the image sensors. The microelectronic imager assembly further comprises optics supports superimposed relative to the imaging dies. The optics supports can be directly on the substrate or on a cover over the substrate. Individual optics supports can have (a) an opening aligned with one of the image sensors, and (b) a bearing element at a reference distance from the image sensor. The microelectronic imager assembly can further include optical devices mounted or otherwise carried by the optics supports.
    Type: Grant
    Filed: July 19, 2004
    Date of Patent: March 13, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Sidney B. Rigg, William Mark Hiatt, Alan G. Wood, Peter A. Benson, James M. Wark, David R. Hembree, Kyle K. Kirby, Charles M. Watkins, Salman Akram
  • Publication number: 20070019172
    Abstract: Systems and methods for retrieving residual liquid during immersion lens photolithography are disclosed. A method in accordance with one embodiment includes directing radiation along a radiation path, through a lens and through a liquid volume in contact with the lens, to a microfeature workpiece in contact with the liquid volume. The method can further include, while moving at least one of the microfeature workpiece and the lens relative to the other, recovering liquid from the liquid volume and replenishing liquid in the liquid volume. A spacing between the lens and the microfeature workpiece can be controlled by providing a gas bearing between the lens and the microfeature workpiece. Residual liquid remaining on a surface on the microfeature workpiece can be directed back into the liquid volume, for example, by injecting a gas through at least one injection port that is oriented annularly inwardly toward the liquid volume.
    Type: Application
    Filed: July 25, 2005
    Publication date: January 25, 2007
    Applicant: Micron Technology, Inc.
    Inventor: Peter Benson
  • Patent number: 7157310
    Abstract: Methods for packaging microfeature devices on and/or in microfeature workpieces at the wafer level and microfeature devices that are formed using such methods are disclosed herein. In one embodiment, a method comprises providing a workpiece including a substrate having a plurality of microelectronic dies on and/or in the substrate. The individual dies include integrated circuitry and pads electrically coupled to the integrated circuitry. The method then includes depositing an underfill layer onto a front side of the substrate. The method also includes selectively forming apertures in the underfill layer to expose the pads at the front side of the substrate. The method further includes depositing a conductive material into the apertures and in electrical contact with the corresponding pads. In one aspect of this embodiment, the underfill layer is a photoimageable material.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: January 2, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Peter A. Benson, Charles M. Watkins
  • Patent number: 7158995
    Abstract: A method and software for managing pointers to external objects in a run-time environment are described in which eager external references are provided that allow session memory objects to point directly to certain call memory objects with machine pointers. The eager external references contain enough information to recreate the call memory objects in call memory at the beginning of the call and fix the session memory objects to point to the new locations of the recreated call memory objects.
    Type: Grant
    Filed: April 3, 2003
    Date of Patent: January 2, 2007
    Assignee: Oracle International Corporation
    Inventors: Harlan Sexton, David Unietis, Peter Benson
  • Publication number: 20060261340
    Abstract: Microelectronic imagers and methods for packaging microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging unit can include a microelectronic die, an image sensor, an integrated circuit electrically coupled to the image sensor, and a bond-pad electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the die and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad with conductive fill material at least partially disposed in the passage. An electrically conductive support member is carried by and projects from the bond-pad. A cover over the image sensor is coupled to the support member.
    Type: Application
    Filed: July 28, 2006
    Publication date: November 23, 2006
    Inventors: Warren Farnworth, Sidney Rigg, William Hiatt, Kyle Kirby, Peter Benson, James Wark, Alan Wood, David Hembree, Salman Akram, Charles Watkins
  • Publication number: 20060264041
    Abstract: Microelectronic devices, methods for packaging microelectronic devices, and methods for forming vias and conductive interconnects in microfeature workpieces and dies are disclosed herein. In one embodiment, a method includes forming a bond-pad on a die having an integrated circuit, the bond-pad being electrically coupled to the integrated circuit. A conductive line is then formed on the die, the conductive line having a first end portion attached to the bond-pad and a second end portion spaced apart from the bond-pad. The method can further include forming a via or passage through the die, the bond-pad, and the first end portion of the conductive line, and depositing an electrically conductive material in at least a portion of the passage to form a conductive interconnect extending at least generally through the microelectronic device.
    Type: Application
    Filed: July 28, 2006
    Publication date: November 23, 2006
    Applicant: Micron Technology, Inc.
    Inventors: Sidney Rigg, Charles Watkins, Kyle Kirby, Peter Benson, Salman Akram
  • Publication number: 20060255418
    Abstract: Microelectronic imaging devices and methods of packaging microelectronic imaging devices are disclosed herein. In one embodiment, a microelectronic imaging device includes a microelectronic die having an integrated circuit, an image sensor electrically coupled to the integrated circuit, and a plurality of bond-pads electrically coupled to the integrated circuit. The imaging device further includes a cover over the image sensor and a plurality of interconnects in and/or on the cover that are electrically coupled to corresponding bond-pads of the die. The interconnects provide external electrical contacts for the bond-pads of the die. The interconnects can extend through the cover or along a surface of the cover.
    Type: Application
    Filed: April 24, 2006
    Publication date: November 16, 2006
    Inventors: Charles Watkins, David Hembree, Peter Benson, Salman Akram
  • Publication number: 20060243889
    Abstract: Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external contacts operatively coupled to the image sensors. The microelectronic imager assembly further comprises optics supports superimposed relative to the imaging dies. The optics supports can be directly on the substrate or on a cover over the substrate. Individual optics supports can have (a) an opening aligned with one of the image sensors, and (b) a bearing element at a reference distance from the image sensor. The microelectronic imager assembly can further include optical devices mounted or otherwise carried by the optics supports.
    Type: Application
    Filed: June 28, 2006
    Publication date: November 2, 2006
    Inventors: Warren Farnworth, Sidney Rigg, William Hiatt, Alan Wood, Peter Benson, James Wark, David Hembree, Kyle Kirby, Charles Watkins, Salman Akram
  • Publication number: 20060226118
    Abstract: Disclosed herein are methods for forming photolithography alignment markers on the back side of a substrate, such as a crystalline silicon substrate used in the manufacture of semiconductor integrated circuits. According to the disclosed techniques, laser radiation is used to remove the material (e.g., silicon) from the back side of a substrate to form the back side alignment markers at specified areas. Such removal can comprise the use of laser ablation or laser-assisted etching. The substrate is placed on a motor-controlled substrate holding mechanism in a laser removal chamber, and the areas are automatically moved underneath the laser radiation to removal the material. The substrate holding mechanism can comprise a standard chuck (in which case use of a protective layer on the front side of the substrate is preferred), or a substrate clamping assembly which suspends the substrate at its edges (in which case the protective layer is not necessary).
    Type: Application
    Filed: June 7, 2006
    Publication date: October 12, 2006
    Inventors: Pary Baluswamy, Peter Benson
  • Patent number: 7115961
    Abstract: Microelectronic imaging devices and methods of packaging microelectronic imaging devices are disclosed herein. In one embodiment, a microelectronic imaging device includes a microelectronic die having an integrated circuit, an image sensor electrically coupled to the integrated circuit, and a plurality of bond-pads electrically coupled to the integrated circuit. The imaging device further includes a cover over the image sensor and a plurality of interconnects in and/or on the cover that are electrically coupled to corresponding bond-pads of the die. The interconnects provide external electrical contacts for the bond-pads of the die. The interconnects can extend through the cover or along a surface of the cover.
    Type: Grant
    Filed: August 24, 2004
    Date of Patent: October 3, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Charles M. Watkins, David R. Hembree, Peter A. Benson, Salman Akram
  • Publication number: 20060216862
    Abstract: Microelectronic devices, methods for packaging microelectronic devices, and methods for forming vias and conductive interconnects in microfeature workpieces and dies are disclosed herein. In one embodiment, a method includes forming a bond-pad on a die having an integrated circuit, the bond-pad being electrically coupled to the integrated circuit. A conductive line is then formed on the die, the conductive line having a first end portion attached to the bond-pad and a second end portion spaced apart from the bond-pad. The method can further include forming a via or passage through the die, the bond-pad, and the first end portion of the conductive line, and depositing an electrically conductive material in at least a portion of the passage to form a conductive interconnect extending at least generally through the microelectronic device.
    Type: Application
    Filed: May 9, 2006
    Publication date: September 28, 2006
    Applicant: Micron Technology, Inc.
    Inventors: Sidney Rigg, Charles Watkins, Kyle Kirby, Peter Benson, Salman Akram