Abstract: Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external contacts operatively coupled to the image sensors. The microelectronic imager assembly further comprises optics supports superimposed relative to the imaging dies. The optics supports can be directly on the substrate or on a cover over the substrate. Individual optics supports can have (a) an opening aligned with one of the image sensors, and (b) a bearing element at a reference distance from the image sensor. The microelectronic imager assembly can further include optical devices mounted or otherwise carried by the optics supports.

Abstract: An elevated containment structure in the shape of a wafer edge ring surrounding a surface of a semiconductor wafer is disclosed, as well as methods of forming and using such a structure. In one embodiment, a wafer edge ring is formed using a stereolithography (STL) process. In another embodiment, a wafer edge ring is formed with a spin coating apparatus provided with a wafer edge exposure (WEE) system. In further embodiments, a wafer edge ring is used to contain a liquid over a wafer active surface during a processing operation. In one embodiment, the wafer edge ring contains a liquid having a higher refractive index than air while exposing a photoresist on the wafer by immersion lithography. In another embodiment, the wafer edge ring contains a curable liquid material while forming a chip scale package (CSP) sealing layer on the wafer.

Abstract: Microlenses for directing radiation toward a sensor of an imaging device include a plurality of mutually adhered layers of cured optically transmissive material. Systems include at least one microprocessor and a substrate including an array of microlenses formed thereon in electrical communication with the at least one microprocessor. At least one microlens in the array includes a plurality of mutually adhered layers of cured optically transmissive material.

Abstract: Low temperature processed back side redistribution lines (RDLs) are disclosed. Low temperature processed back side RDLs may be electrically connected to the active surface devices of a semiconductor substrate using through wafer interconnects (TWIs). The TWIs may be formed prior to forming the RDLs, after forming the RDLs, or substantially simultaneously to forming the RDLs. The material for the back side RDLs and various other associated materials, such as dielectrics and conductive via filler materials, are processed at temperatures sufficiently low so as to not damage the semiconductor devices or associated components contained on the active surface of the semiconductor substrate. The low temperature processed back side RDLs of the present invention may be employed with optically interactive semiconductor devices and semiconductor memory devices, among many others. Semiconductor devices employing the RDLs of the present invention may be stacked and electrically connected theretogether.

Abstract: A conductive element is formed on a substrate by forming an organometallic layer on at least a portion of a surface of the substrate, heating a portion of the organometallic layer, and removing an unheated portion of the organometallic layer. In other methods, a flowable, uncured conductive material may be deposited on a surface of the substrate, the flowable, uncured conductive material may be selectively cured over at least a portion of the surface of the substrate, and a portion of the cured conductive material may be removed. A conductive via is formed by forming a hole at least partially through a thickness of a substrate, depositing an organometallic material within at least a portion of the hole, and selectively heating at least a portion of the organometallic material.

Abstract: Low temperature processed back side redistribution lines (RDLs) are disclosed. Low temperature processed back side RDLs may be electrically connected to the active surface devices of a semiconductor substrate using through wafer interconnects (TWIs). The TWIs may be formed prior to forming the RDLs, after forming the RDLs, or substantially simultaneously to forming the RDLs. The material for the back side RDLs and various other associated materials, such as dielectrics and conductive via filler materials, are processed at temperatures sufficiently low so as to not damage the semiconductor devices or associated components contained on the active surface of the semiconductor substrate. The low temperature processed back side RDLs of the present invention may be employed with optically interactive semiconductor devices and semiconductor memory devices, among many others. Semiconductor devices employing the RDLs of the present invention may be stacked and electrically connected theretogether.

Abstract: An interlocking panel, and structures formed therefrom, are described herein. Embodiments of the present invention provide a panel including a protruding end including a receiving member for engaging a complementary engaging member of a first adjacent panel, and a receiving end including two flanges, at least one of the two flanges including an engaging member for engaging a complementary receiving member of a second adjacent panel, one or both of the two flanges configured to flex to allow the complementary receiving member of the second adjacent panel to engage the engaging member.

Abstract: Microelectronic imagers and methods for packaging microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging unit can include a microelectronic die, an image sensor, an integrated circuit electrically coupled to the image sensor, and a bond-pad electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the die and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad with conductive fill material at least partially disposed in the passage. An electrically conductive support member is carried by and projects from the bond-pad. A cover over the image sensor is coupled to the support member.

Abstract: Low temperature processed back side redistribution lines (RDLs) are disclosed. Low temperature processed back side RDLs may be electrically connected to the active surface devices of a semiconductor substrate using through wafer interconnects (TWIs). The TWIs may be formed prior to forming the RDLs, after forming the RDLs, or substantially simultaneously to forming the RDLs. The material for the back side RDLs and various other associated materials, such as dielectrics and conductive via filler materials, are processed at temperatures sufficiently low so as to not damage the semiconductor devices or associated components contained on the active surface of the semiconductor substrate. The low temperature processed back side RDLs of the present invention may be employed with optically interactive semiconductor devices and semiconductor memory devices, among many others. Semiconductor devices employing the RDLs of the present invention may be stacked and electrically connected theretogether.

Abstract: Microelectronic devices, methods for packaging microelectronic devices, and methods for forming vias and conductive interconnects in microfeature workpieces and dies are disclosed herein. In one embodiment, a method includes forming a bond-pad on a die having an integrated circuit, the bond-pad being electrically coupled to the integrated circuit. A conductive line is then formed on the die, the conductive line having a first end portion attached to the bond-pad and a second end portion spaced apart from the bond-pad. The method can further include forming a via or passage through the die, the bond-pad, and the first end portion of the conductive line, and depositing an electrically conductive material in at least a portion of the passage to form a conductive interconnect extending at least generally through the microelectronic device.

Abstract: A method and software for managing class variables is described in which a variable-format container for static class variables is provided such that numeric class variables can be accessed directly while other kinds of class variables are accessed via a reference to an object.

Abstract: Microelectronic imaging devices and methods of packaging microelectronic imaging devices are disclosed herein. In one embodiment, a microelectronic imaging device includes a microelectronic die having an integrated circuit, an image sensor electrically coupled to the integrated circuit, and a plurality of bond-pads electrically coupled to the integrated circuit. The imaging device further includes a cover over the image sensor and a plurality of interconnects in and/or on the cover that are electrically coupled to corresponding bond-pads of the die. The interconnects provide external electrical contacts for the bond-pads of the die. The interconnects can extend through the cover or along a surface of the cover.

Abstract: Low temperature processed back side redistribution lines (RDLs) are disclosed. Low temperature processed back side RDLs may be electrically connected to the active surface devices of a semiconductor substrate using through wafer interconnects (TWIs). The TWIs may be formed prior to forming the RDLs, after forming the RDLs, or substantially simultaneously to forming the RDLs. The material for the back side RDLs and various other associated materials, such as dielectrics and conductive via filler materials, are processed at temperatures sufficiently low so as to not damage the semiconductor devices or associated components contained on the active surface of the semiconductor substrate. The low temperature processed back side RDLs of the present invention may be employed with optically interactive semiconductor devices and semiconductor memory devices, among many others. Semiconductor devices employing the RDLs of the present invention may be stacked and electrically connected theretogether.

Abstract: Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external contacts operatively coupled to the image sensors. The microelectronic imager assembly further comprises optics supports superimposed relative to the imaging dies. The optics supports can be directly on the substrate or on a cover over the substrate. Individual optics supports can have (a) an opening aligned with one of the image sensors, and (b) a bearing element at a reference distance from the image sensor. The microelectronic imager assembly can further include optical devices mounted or otherwise carried by the optics supports.

Abstract: Microelectronic imagers, optical devices for microelectronic imagers, methods for manufacturing integrated optical devices for use with microelectronic imagers, and methods for packaging microelectronic imagers. The optical devices are manufactured in optical device assemblies that provide efficient and highly accurate fabrication of the optics that are used in microelectronic imagers. The optical device assemblies are particularly useful for packaging a plurality of microelectronic imagers at the wafer level. Wafer-level packaging is expected to significantly enhance the efficiency of manufacturing microelectronic imagers because a plurality of imagers can be packaged simultaneously using highly accurate and efficient processes developed for packaging processors, memory devices and other semiconductor devices.

Abstract: A programmed material consolidation apparatus includes at least one fabrication site and a material consolidation system associated with the at least one fabrication site. The at least one fabrication site may be configured to receive one or more fabrication substrates, such as semiconductor substrates. A machine vision system with a translatable or locationally fixed camera may be associated with the at least one fabrication site and the material consolidation system. A cleaning component may also be associated with the at least one fabrication site. The cleaning component may share one or more elements with the at least one fabrication site, or may be separate therefrom. The programmed material consolidation apparatus may also include a substrate handling system, which places fabrication substrates at appropriate locations of the programmed material consolidation apparatus.

Abstract: Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external contacts operatively coupled to the image sensors. The microelectronic imager assembly further comprises optics supports superimposed relative to the imaging dies. The optics supports can be directly on the substrate or on a cover over the substrate. Individual optics supports can have (a) an opening aligned with one of the image sensors, and (b) a bearing element at a reference distance from the image sensor. The microelectronic imager assembly can further include optical devices mounted or otherwise carried by the optics supports.

Abstract: A heap analyzer that processes a snapshot of the heap contained in a dump file is described. The heap analyzer tool can be configured to relocate the pointers in the dumped heap and allow developers to examine the heap in web browser by presenting markup for displaying a heap object in the browser and rendering pointers in the object as clickable links. When a link is selected, the pointer is followed to another object and markup is generated for rendering that object with its links. Furthermore, callbacks may be provided through an application programming interface (API) to allow developers to furnish their own code for analyzing and displaying their data structures.

Abstract: Methods for supporting substrates during programmed material consolidation include securing a substrate in position over a support with a surface and, optionally, other features that receive the at least one substrate and prevent unconsolidated material from contacting undesired regions, such as the bottom surface, of the at least one substrate.

Abstract: A method for scanning objects as for garbage collection is described that employ an ancillary data structure to describe the format of an object. Specifically, the data structure lists which parts of the object are references and how large each part of the object is. Scanning the object can efficiently occur by stepping through the object and the data structure in parallel.