Abstract: An image sensor having a set of pixels making up the image sensor to capture an image. Two or more pixels in the set of pixels each have an architecture that includes multiple photodiodes configurable to form an individual pixel. A control system can cooperate with the multiple photodiodes to form the individual pixel. Each of the multiple photodiodes can have a transfer gate electrically coupled to that photodiode. A common region can hold or transfer charge at least during or after an integration time. A read gate electrically coupled to the common region and a sense node, can supply charge from the common region through the read gate to the sense node.

Abstract: In general, the disclosure describes a sensor comprising a photo-sensitive silicon substrate configured to detect ultraviolet (UV), visible, and near-infrared (NIR) light and an upconversion layer comprising a plurality of crystals configured to convert short wave infrared light to UV, visible, or NIR light. An example sensor includes an upconversion layer comprising a plurality of crystals configured to convert electromagnetic radiation comprising a first range of wavelengths greater than 1100 nm to electromagnetic radiation comprising a second range of wavelengths less than or equal to 1100 nm and a photo-sensitive silicon substrate configured to detect the electromagnetic radiation comprising the second range of wavelengths.

Abstract: An imaging system for capturing light over a wide dynamic range and method for operating the same are provided. In some aspects, the method includes positioning an imaging pixel to image a scene described by light signals that extend over a wide dynamic range, and selecting a different integration time for at least two photodiodes in the imaging pixel based on light signals received by the imaging pixel, wherein the photodiodes are coupled to a sense node, and each photodiode is controlled using a different transfer gate. The method also includes performing a readout of the imaging pixel using a readout circuit connected to the sense node, wherein a capacitance associated with the sense node is modified during the readout of the at least two photodiodes.

Abstract: An imaging system for capturing light over a wide dynamic range and method for operating the same are provided. In some aspects, the method includes positioning an imaging pixel to image a scene described by light signals that extend over a wide dynamic range, and selecting a different integration time for at least two photodiodes in the imaging pixel based on light signals received by the imaging pixel, wherein the photodiodes are coupled to a sense node, and each photodiode is controlled using a different transfer gate. The method also includes performing a readout of the imaging pixel using a readout circuit connected to the sense node, wherein a capacitance associated with the sense node is modified during the readout of the at least two photodiodes.

Abstract: An imaging system for capturing light over a wide dynamic range and method for operating the same are provided. In some aspects, the method includes positioning an imaging pixel to image a scene described by light signals that extend over a wide dynamic range, and selecting a different integration time for at least two photodiodes in the imaging pixel based on light signals received by the imaging pixel, wherein the photodiodes are coupled to a sense node, and each photodiode is controlled using a different transfer gate. The method also includes performing a readout of the imaging pixel using a readout circuit connected to the sense node, wherein a capacitance associated with the sense node is modified during the readout of the at least two photodiodes.

Abstract: An imager has an array of pixels arranged in rows and columns, readout circuitry electrically coupled to the columns to receive signals from the pixels, the readout circuitry having at least one signal path with gain switching, and a threshold detector electrically coupled to the readout circuitry to set a gain to be applied by the readout circuitry.

Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed. The device includes an insulator layer; a semiconductor substrate, having an interface with the insulator layer; an epitaxial layer grown on the semiconductor substrate by epitaxial growth; and one or more imaging components in the epitaxial layer in proximity to a face of the epitaxial layer, the face being opposite the interface of the semiconductor substrate and the insulator layer, the imaging components comprising junctions within the epitaxial layer; wherein the semiconductor substrate and the epitaxial layer exhibit a net doping concentration having a maximum value at a predetermined distance from the interface of the insulating layer and the semiconductor substrate and which decreases monotonically on both sides of the profile from the maximum value within a portion of the semiconductor substrate and the epitaxial layer.

Abstract: A method and apparatus for optimizing image quality based on scene content comprising a sensor for generating a sequence of frames where each frame in the sequence of frames comprises content representing a scene and a digital processor, coupled to the sensor, for performing scene content analysis and for establishing a window defining a number of input frames from the sensor and processed output frames, and for aligning and combining the number of frames in the window to form an output frame, wherein sensor parameters and frame combination parameters are adjusted based on scene content.

Abstract: A method of operating a CMOS pixel is disclosed. The CMOS pixel includes a photodiode (PPD), a transfer gate coupled to the PPD, and an anti-blooming drain coupled to the transfer gate. A potential barrier is formed between a potential well underlying the PPD and the transfer gate. Charge is accumulated in the potential well in response to electromagnetic radiation during a first integration time. Excess charge is removed from the potential well to the anti-blooming drain that exceeds the first potential barrier. A size of the potential barrier is increased. Charge is accumulated in the potential well during a second integration time.

Abstract: An imager has an array of pixels arranged in rows and columns, readout circuitry electrically coupled to the columns to receive signals from the pixels, the readout circuitry having at least one signal path with gain switching, and a threshold detector electrically coupled to the readout circuitry to set a gain to be applied by the readout circuitry.

Abstract: A pixel design is disclosed. The pixel includes a photo-sensitive element. A first reflective layer substantially overlies the photo-sensitive element. A second reflective layer substantially underlies the photo-sensitive element and forms a cavity with the first reflective layer that is non-resonant with respect to photon absorption. An aperture is formed in either the first reflective layer or the second reflective layer. When electromagnetic radiation enters the aperture, the first reflective layer and the second reflective layer are configured to reflect the electromagnetic radiation substantially toward each other until substantially absorbed in the cavity.

Abstract: A non-linear conversion capability within an on-chip, per-column analog-to-digital converter (ADC) is provided to expand a compressed analog signal such that the resulting digital output that has a predetermined (linear or non-linear) mapping with respect to input brightness level of an incoming light signal to a row of pixels. The predetermined mapping may also be provided by a non-linear amplifier coupled to a linear or non-linear ADC and a resulting compressed non-linear digital representation at the output of the ADC is substantially linearized by an on-chip or an off-chip look-up table (LUT).

Abstract: A back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate is disclosed. The device includes an insulator layer, a semiconductor substrate having an interface with the insulator layer, an epitaxial layer grown on the semiconductor substrate by epitaxial growth; and one or more imaging components in the epitaxial layer. The semiconductor substrate and the epitaxial layer exhibit a net doping concentration profile having a maximum value at a predetermined distance from the interface which decreases monotonically on both sides of the profile. The doping profile between the interface with the insulation layer and the peak of the doping profile functions as a “dead band” to prevent dark current carriers from penetrating to the front side of the device.

Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate is disclosed. The substrate includes an insulator layer and an epitaxial layer overlying the insulator layer. A bond pad region is formed extending into the epitaxial layer to a surface of the insulator layer. A bond pad is fabricated partially overlying the bond pad region. At least one imaging component is fabricated partially overlying and extending into the epitaxial layer. A passivation layer is fabricated overlying the epitaxial layer, the bond pad, and the at least one imaging component. A handle wafer is bonded to the passivation layer. A portion of the insulator layer and a portion of the bond pad region is etched to expose a portion of the bond pad.

Abstract: A CMOS image sensor is disclosed. The CMOS image sensor includes a semiconductor substrate having a surface. An epitaxial layer is grown on the surface. A p-type CMOS pixel formed substantially in the epitaxial layer. In one version of the CMOS image sensor, there exists a net n-type dopant concentration profile in the semiconductor substrate and the epitaxial layer which has a maximum value at a predetermined distance from the surface and which decreases monotonically on both sides of the profile from the maximum value within the semiconductor substrate and the epitaxial layer. In another version of the CMOS image sensor, there exists a net n-type dopant concentration profile in the semiconductor substrate and the epitaxial layer which has a maximum value at the surface and which decreases monotonically with increasing distance from the surface within the semiconductor substrate and the epitaxial layer.

Abstract: A method of operating a CMOS pixel is disclosed. The CMOS pixel includes a photodiode (PPD), a transfer gate coupled to the PPD, and an anti-blooming drain coupled to the transfer gate. A potential barrier is formed between a potential well underlying the PPD and the transfer gate. Charge is accumulated in the potential well in response to electromagnetic radiation during a first integration time. Excess charge is removed from the potential well to the anti-blooming drain that exceeds the first potential barrier. A size of the potential barrier is increased. Charge is accumulated in the potential well during a second integration time.

Abstract: A method of operating a CMOS pixel is disclosed. The CMOS pixel includes a photodiode (PPD), a transfer gate coupled to the PPD, and an anti-blooming drain coupled to the transfer gate. A potential barrier is formed between a potential well underlying the PPD and the transfer gate. Charge is accumulated in the potential well in response to electromagnetic radiation during a first integration time. Excess charge is removed from the potential well to the anti-blooming drain that exceeds the first potential barrier. A size of the potential barrier is increased. Charge is accumulated in the potential well during a second integration time.

Abstract: A pixel design is disclosed. The pixel includes a photo-sensitive element. A first reflective layer substantially overlies the photo-sensitive element. A second reflective layer substantially underlies the photo-sensitive element and forms a cavity with the first reflective layer that is non-resonant with respect to photon absorption. An aperture is formed in either the first reflective layer or the second reflective layer. When electromagnetic radiation enters the aperture, the first reflective layer and the second reflective layer are configured to reflect the electromagnetic radiation substantially toward each other until substantially absorbed in the cavity.

Abstract: A non-linear conversion capability within an on-chip, per-column analog-to-digital converter (ADC) is provided to expand a compressed analog signal such that the resulting digital output that has a predetermined (linear or non-linear) mapping with respect to input brightness level of an incoming light signal to a row of pixels. The predetermined mapping may also be provided by a non-linear amplifier coupled to a linear or non-linear ADC and a resulting compressed non-linear digital representation at the output of the ADC is substantially linearized by an on-chip or an off-chip look-up table (LUT).

Abstract: A method and apparatus for equalizing gain in an array of electron multiplication (EM) pixels is disclosed, each pixel having one or more impact ionization gain stages with implants to achieve charge transfer directionality and comprising a phase 1 clocked gate, an EM clocked gate, and two DC gates formed between the phase 1 clocked gate and the EM clocked gate, comprising the steps of (a) applying initial voltages to each of the DC gates and the EM clocked gates of at least two pixels of a plurality of pixels; (b) clocking phase 1 clock gates and an EM clock gates associated with the at least two pixels of the plurality of pixels a predetermined number of times to achieve an average pixel intensity value after impact ionization gain; and (c) selectively adjusting the difference in voltage between the DC gate and corresponding EM clocked gate of the at least two pixels of the plurality of pixels until the difference between the resulting pixel intensity values and the average pixel intensity value needed to p