Patents by Inventor Peter Baumgartner
Peter Baumgartner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200411699Abstract: A Group III-Nitride (III-N) device structure is provided which comprises: a heterostructure having three or more layers comprising III-N material, an anode within a recess that extends through two or more of the layers, wherein the anode is in electrical contact with the first layer, a cathode comprising donor dopants, wherein the cathode is on the first layer of the heterostructure; and a conducting region in the first layer in direct contact to the cathode and conductively connected to the anode. Other embodiments are also disclosed and claimed.Type: ApplicationFiled: September 29, 2017Publication date: December 31, 2020Applicant: INTEL CORPORATIONInventors: Harald Gossner, Peter Baumgartner, Uwe Hodel, Domagoj Siprak, Stephan Leuschner, Richard Geiger, Han Wui Then, Marko Radosavljevic, Sansaptak Dasgupta
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Publication number: 20200220030Abstract: A variable capacitance III-N device having multiple two-dimensional electron gas (2DEG) layers are described. In some embodiments, the device comprises a first source and a first drain; a first polarization layer adjacent to the first source and the first drain; a first channel layer coupled to the first source and the first drain and adjacent to the first polarization layer, the first channel layer comprising a first 2DEG region; a second source and a second drain; a second polarization layer adjacent to the second source and the second drain; and a second channel layer coupled to the second source and the second drain and adjacent to the second polarization layer, the second channel layer comprising a second 2DEG region, wherein the second channel layer is over the first polarization layer.Type: ApplicationFiled: September 28, 2017Publication date: July 9, 2020Applicant: INTEL CORPORATIONInventors: Harald Gossner, Peter Baumgartner, Uwe Hodel, Domagoj Siprak, Stephan Leuschner, Richard Geiger, Han Wui Then, Marko Radosavljevic, Sansaptak Dasgupta
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Publication number: 20200203518Abstract: A Group III-Nitride (III-N) device structure is provided comprising: a heterostructure having three or more layers comprising III-N material, an anode n+ region and a cathode comprising donor dopants, wherein the anode n+ region and the cathode are on the first layer of the heterostructure and wherein the anode n+ region and the cathode extend beyond the heterostructure, and an anode metal region within a recess that extends through two or more of the layers, wherein the anode metal region is in electrical contact with the first layer, wherein the anode metal region comprises a first width within the recess and a second width beyond the recess, and wherein the anode metal region is coupled with the anode n+ region. Other embodiments are also disclosed and claimed.Type: ApplicationFiled: September 29, 2017Publication date: June 25, 2020Applicant: Santa ClaraInventors: Harald Gossner, Peter Baumgartner, Uwe Hodel, Domagoj Siprak, Stephan Leuschner, Richard Geiger
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Publication number: 20200006483Abstract: A semiconductor device is proposed. The semiconductor device includes a source region of a field effect transistor having a first conductivity type, a body region of the field effect transistor having a second conductivity type, and a drain region of the field effect transistor having the first conductivity type. The source region, the drain region, and the body region are located in a semiconductor substrate of the semiconductor device and the body region is located between the source region and the drain region. The drain region extends from the body region through a buried portion of the drain region to a drain contact portion of the drain region located at a surface of the semiconductor substrate, the buried portion of the drain region is located beneath a spacer doping region, and the spacer doping region is located within the semiconductor substrate.Type: ApplicationFiled: June 27, 2018Publication date: January 2, 2020Inventors: Vase JOVANOV, Peter BAUMGARTNER, Gregor BRACHER, Luis GILES, Uwe HODEL, Andreas LACHMANN, Philipp RIESS, Karl-Henrik RYDEN
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Publication number: 20190052301Abstract: Radio frequency shielding within a semiconductor package is described. In one example, a multiple chip package has a digital chip, a radio frequency chip, and an isolation layer between the digital chip and the radio frequency chip. A cover encloses the digital chip and the radio frequency chip.Type: ApplicationFiled: October 17, 2018Publication date: February 14, 2019Inventors: Edmund Goetz, Bernd Memmler, Jan-Erik Mueller, Peter Baumgartner
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Patent number: 10135481Abstract: Radio frequency shielding within a semiconductor package is described. In one example, a multiple chip package has a digital chip, a radio frequency chip, and an isolation layer between the digital chip and the radio frequency chip. A cover encloses the digital chip and the radio frequency chip.Type: GrantFiled: June 6, 2016Date of Patent: November 20, 2018Assignee: Intel IP CorporationInventors: Edmund Goetz, Bernd Memmler, Jan-Erik Mueller, Peter Baumgartner
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Patent number: 10122420Abstract: Apparatus and methods are provided for wireless communications between integrated circuits or integrated circuit dies of an electronic system. In an example, an apparatus can include a first integrated circuit die including a plurality of integrated circuit devices, a second integrated circuit die including a second plurality of integrated circuit devices, and a conductor device configured to wirelessly receive a signal from the first integrated circuit die, to conduct the signal from a first end of an electrical conductor of the conductor device to a second end of the electrical conductor, and to wirelessly transmit the signal to the second integrated circuit die from the second end of the electrical conductor.Type: GrantFiled: December 22, 2015Date of Patent: November 6, 2018Assignee: Intel IP CorporationInventors: Thorsten Meyer, Andreas Augustin, Reinhard Golly, Peter Baumgartner
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Patent number: 10118589Abstract: The invention relates to a belt retractor for a safety belt, having: a belt reel (100, 200, 300, 400, 500, 600) for winding up the safety belt; a locking base (120, 220, 320, 420, 520, 620) which during normal operation is conjointly rotated with the belt reel and the rotary motion of which upon abrupt belt extraction is locked by means of a locking mechanism; and a belt force limiting installation which upon locking of the locking base permits relative rotation between the belt reel and the locking base. It is provided according to the invention that the belt retractor has a deactivation installation which after a predefined maximum relative rotary angle between the locking base and the belt reel blocks the relative rotation which is permitted between the belt reel and the locking base by the belt force limiting installation and, on account thereof, deactivates the belt force limiting installation.Type: GrantFiled: March 31, 2016Date of Patent: November 6, 2018Assignee: JOYSON SAFETY SYSTEMS GERMANY GMBHInventors: Hermann Hasse, Robert Fleischmann, Joachim Nuesseler, Peter Baumgartner, Thomas Schwer, Armin Toth, Dirk Buchlaub, Jochen Lang, Thomas Rupp
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Patent number: 9818672Abstract: Embodiments of flow diversion devices (FDDs) are disclosed herein. An FDD may include a body formed of a body material and a plurality of thermally deformable fins arranged along the body. Individual fins of the plurality of fins may include first and second materials having different coefficients of thermal expansion (CTEs). Other embodiments may be disclosed and/or claimed.Type: GrantFiled: February 14, 2014Date of Patent: November 14, 2017Assignee: INTEL IP CORPORATIONInventors: Michael P. Skinner, Sven Albers, Harald Gossner, Peter Baumgartner, Hans-Joachim Barth
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Patent number: 9793220Abstract: A capacitive sensor and measurement circuitry is described that may be able to reproducibly measure miniscule capacitances and variations thereof. The capacitance may vary depending upon local environmental conditions such as mechanical stress (e.g., warpage or shear stress), mechanical pressure, temperature, and/or humidity. It may be desirable to provide a capacitor integrated into a semiconductor chip that is sufficiently small and sensitive to accurately measure conditions expected to be experienced by a semiconductor chip.Type: GrantFiled: December 28, 2012Date of Patent: October 17, 2017Assignee: INTEL DEUTSCHLAND GMBHInventors: Hans-Joachim Barth, Horst Baumeister, Peter Baumgartner, Philipp Riess, Jesenka Veledar Krueger
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Publication number: 20170180014Abstract: Apparatus and methods are provided for wireless communications between integrated circuits or integrated circuit dies of an electronic system. In an example, an apparatus can include a first integrated circuit die including a plurality of integrated circuit devices, a second integrated circuit die including a second plurality of integrated circuit devices, and a conductor device configured to wirelessly receive a signal from the first integrated circuit die, to conduct the signal from a first end of an electrical conductor of the conductor device to a second end of the electrical conductor, and to wirelessly transmit the signal to the second integrated circuit die from the second end of the electrical conductor.Type: ApplicationFiled: December 22, 2015Publication date: June 22, 2017Inventors: Thorsten Meyer, Andreas Augustin, Reinhard Golly, Peter Baumgartner
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Publication number: 20170084578Abstract: Embodiments of a flexibly-wrapped integrated circuit die device and a method for mounting a flexibly-wrapped integrated circuit die to a substrate are disclosed. In some embodiments, the flexibly-wrapped integrated circuit die device includes a substrate and a flexible integrated circuit die coupled to the substrate in a substantially vertical orientation with reference to a surface of the substrate.Type: ApplicationFiled: December 2, 2016Publication date: March 23, 2017Inventors: Sven Albers, Michael Skinner, Hans-Joachim Barth, Peter Baumgartner, Harald Gossner
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Publication number: 20160359520Abstract: Radio frequency shielding within a semiconductor package is described. In one example, a multiple chip package has a digital chip, a radio frequency chip, and an isolation layer between the digital chip and the radio frequency chip. A cover encloses the digital chip and the radio frequency chip.Type: ApplicationFiled: June 6, 2016Publication date: December 8, 2016Applicant: Intel IP CorporationInventors: Edmund Goetz, Bernd Memmler, Jan-Erik Mueller, Peter Baumgartner
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Patent number: 9515049Abstract: Embodiments of a flexibly-wrapped integrated circuit die device and a method for mounting a flexibly-wrapped integrated circuit die to a substrate are disclosed. In some embodiments, the flexibly-wrapped integrated circuit die device includes a substrate and a flexible integrated circuit die coupled to the substrate in a substantially vertical orientation with reference to a surface of the substrate.Type: GrantFiled: December 19, 2013Date of Patent: December 6, 2016Assignee: Intel CorporationInventors: Sven Albers, Michael Skinner, Hans-Joachim Barth, Peter Baumgartner, Harald Gossner
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Publication number: 20160311397Abstract: The invention relates to a belt retractor for a safety belt, having: a belt reel (100, 200, 300, 400, 500, 600) for winding up the safety belt; a locking base (120, 220, 320, 420, 520, 620) which during normal operation is conjointly rotated with the belt reel and the rotary motion of which upon abrupt belt extraction is locked by means of a locking mechanism; and a belt force limiting installation which upon locking of the locking base permits relative rotation between the belt reel and the locking base. It is provided according to the invention that the belt retractor has a deactivation installation which after a predefined maximum relative rotary angle between the locking base and the belt reel blocks the relative rotation which is permitted between the belt reel and the locking base by the belt force limiting installation and, on account thereof, deactivates the belt force limiting installation.Type: ApplicationFiled: March 31, 2016Publication date: October 27, 2016Applicant: TAKATA AGInventors: Hermann HASSE, Robert FLEISCHMANN, Joachim NUESSELER, Peter BAUMGARTNER, Thomas SCHWER, Armin TOTH, Dirk BUCHLAUB, Jochen LANG, Thomas RUPP
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Patent number: 9409547Abstract: The invention relates inter alia to a sensor (10), in particular for triggering a vehicle security device (1). According to the invention the sensor (10) comprises a support element (40) and a housing part (70), which holds the support element (40), and the housing part (70) consists of a softer material than the support element (40).Type: GrantFiled: November 7, 2012Date of Patent: August 9, 2016Assignee: TAKATA AGInventors: Peter Baumgartner, Hermann Hasse, Oswald Lustig, Thomas Bertram
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Patent number: 9362233Abstract: Radio frequency shielding within a semiconductor package is described. In one example, a multiple chip package has a digital chip, a radio frequency chip, and an isolation layer between the digital chip and the radio frequency chip. A cover encloses the digital chip and the radio frequency chip.Type: GrantFiled: June 29, 2013Date of Patent: June 7, 2016Assignee: Intel IP CorporationInventors: Edmund Goetz, Bernd Memmler, Jan-Erik Mueller, Peter Baumgartner
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Publication number: 20150235920Abstract: Embodiments of flow diversion devices (FDDs) are disclosed herein. An FDD may include a body formed of a body material and a plurality of thermally deformable fins arranged along the body. Individual fins of the plurality of fins may include first and second materials having different coefficients of thermal expansion (CTEs). Other embodiments may be disclosed and/or claimed.Type: ApplicationFiled: February 14, 2014Publication date: August 20, 2015Inventors: Michael P. Skinner, Sven Albers, Harald Gossner, Peter Baumgartner, Hans-Joachim Barth
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Publication number: 20150214188Abstract: Embodiments of a flexibly-wrapped integrated circuit die device and a method for mounting a flexibly-wrapped integrated circuit die to a substrate are disclosed. In some embodiments, the flexibly-wrapped integrated circuit die device includes a substrate and a flexible integrated circuit die coupled to the substrate in a substantially vertical orientation with reference to a surface of the substrate.Type: ApplicationFiled: December 19, 2013Publication date: July 30, 2015Inventors: Sven Albers, Michael Skinner, Hnas-Joachim Barth, Peter Baumgartner, Harald Gossner
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Patent number: 8959724Abstract: A fixing element fixes a part to a support wall. When the fixing element is inserted into an opening in the support wall and reaches a predetermined end position, the fixing element locks to the support wall. The fixing element includes a stop element, a snap-on element, and an unlocking element. The stop element bears against a side of the support wall when the fixing element is locked to the support wall. The snap-on element is positioned on an inner side of the support wall when the fixing element is locked to the support wall. The unlocking element is connected to the snap-on element. The unlocking element is configured to permit the snap-on element to be unlocked and the fixing element to be removed from the opening. An installation tool and a testing tool may be used in conjunction with the fixing element.Type: GrantFiled: September 19, 2008Date of Patent: February 24, 2015Assignee: Takata AGInventors: Peter Baumgartner, Ralf Gutmann, Oliver Glöckler