Abstract: The present invention relates to organic light emitting devices (OLEDs), and more specifically to phosphorescent organic materials used in such devices. More specifically, the present invention relates to emissive phosphorescent material which comprise at least one tridentate ligand bound to a metal center, wherein at least one of the bonds to the tridentate ligand is a carbon-metal bond.

Abstract: Embodiments of the invention contemplate high efficiency emitters in solar cells and novel methods for forming the same. One embodiment of the improved emitter structure, called a high-low type emitter, optimizes the solar cell performance by equally providing low contact resistance to minimize ohmic losses and isolation of the high surface recombination metal-semiconductor interface from the junction to maximize cell voltage. Another embodiment, called an alternating doping type emitter, provides regions of alternating doping type for use with point contacts in the back-contact solar cells. One embodiment of the methods includes depositing and patterning a doped or undoped dielectric layer on a surface of a substrate, implanting a fast-diffusing dopant and/or a slow-diffusing dopant into the substrate either simultaneously or sequentially, and annealing the substrate to drive in the dopants.

Abstract: Catalyst compositions useful for the polymerization or oligomerization of olefins are disclosed. Certain of the catalyst compositions comprise N-pyrrolyl substituted nitrogen donors. Also disclosed are processes for the polymerization or oligomerization of olefins using the catalyst compositions.

Abstract: In a thin-film photovoltaic (TF PV) module, stacked cells provide efficient conversion of solar energy without being afflicted by conventional problems such as current matching between layers. According to one aspect, the module includes separate terminals for the respective layers in the stack, thus allowing the current in each layer to be different without sacrificing efficiencies gained due to their different bandgaps. According to another aspect of the invention, a processing method according to the invention includes forming interconnects for each layer using etch and deposition processing, including forming separate interconnects for each respective layer, which interconnects can be coupled to respective sets of terminals.

Abstract: The present invention provides a method of forming interconnects in a photovoltaic module. According to one aspect, a method according to the invention includes processing steps that are similar to those performed in conventional integrated circuit fabrication. For example, the method can include masks and etches to form isolation grooves between cells, and additional etches to form a conductive step adjacent to the grooves that can be used to form interconnects between cells. According to another aspect the method for forming the conductive step can be self-aligned, such as by positioning a mirror above the module and exposing photoresist from underneath the substrate at an angle one or more times, and etching to expose the conductive step. According to another aspect, the process can include steps to form grid lines in the module to improve current transport in the structure.

Abstract: Processing steps that are useful for forming interconnects in a photovoltaic module are described herein. According to one aspect, a method according to the invention includes processing steps that are similar to those performed in conventional integrated circuit fabrication. For example, the method can include etches to form a conductive step adjacent to the grooves that can be used to form interconnects between cells. According to another aspect the method for forming the conductive step can be self-aligned, such as by positioning a mirror above the module and exposing photoresist from underneath the substrate at an angle one or more times, and etching to expose the conductive step.

Abstract: A processing method herein enables patterning a thin-film photovoltaic module into cells and/or sub-cells using an etch process. According to one aspect, an etch mixture is identified that is capable etching through a thin-film material such as CIGS with high selectivity to both photoresist and underlying layers such as metal. According to another aspect, the etch process enables patterning a photovoltaic device using lithographic techniques. Among other things, the invention enables forming interconnect structures with feature sizes that are substantially smaller than is possible with prior art techniques, and avoids many of the problems associated with laser and mechanical scribes, thus resulting in better and more efficient photovoltaic modules.

Abstract: In a module of photovoltaic cells, a method of forming the module interconnects includes a single cutting process after the deposition of all active layers. This simplifies the overall process to a set of vacuum steps followed by a set of interconnect steps, and may significantly module quality and yield. According to another aspect, an interconnect forming method includes self-aligned deposition of an insulator. This simplifies the process because no alignment is required. According to another aspect, an interconnect forming method includes a scribing process that results in a much narrower interconnect which may significantly boost cell efficiency, and allow for narrower cell sizes. According to another aspect, an interconnect includes an insulator layer that greatly reduces shunt current through the active layer, which can greatly improve cell efficiency.

Abstract: Critical Dimension (CD) of features on a semiconductor substrate may be indicated utilizing the site-specific binding properties of organic or biological molecules. In accordance with one embodiment of the present invention, a fluorescent tagged organic molecule is fabricated having a length corresponding to the desired CD. The semiconductor substrate is exposed to a solution containing the organic molecule. The solution is then removed and the structure analyzed for the presence of the fluorescent tag, indicating a feature having the desired CD. Fluorescent tagged biological molecules of known size such as peptides or proteins, or nucleic acids such as DNA or RNA, may also be employed for CD measurement. Alternatively, a CD marker molecule may be designed to exhibit preferential binding, such that it fails to bind to the substrate in instances of incomplete resist development or etching.

Abstract: A method that is sensitive to lattice damage (also called “primary method”) is combined with an additional method that independently measures one of two parameters to which the primary method is sensitive namely dose and energy. In some embodiments, the additional method is sensitive to dose, and in two such embodiments 4PP and SIMS are respectively used to measure dose (independent of energy). In other embodiments, the additional method is sensitive to energy, and in one such embodiment SIMS is used to measure energy (independent of dose). Use of such an additional method resolves an ambiguity in a prior art measurement by the primary method alone. The two methods are used in combination in some embodiments, to determine adjustments needed to match two or more ion implanters to one another or to a reference ion implanter or to a computer model.

Abstract: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.

Abstract: Improved Group 3–11 transition metal based catalysts and processes for the polymerization of olefins are described. Some of the ligands are characterized by a preferred substitution pattern which allows for higher productivities of highly branched olefins; substitution patterns which boost productivity or alter the polymer microstructure are also described.

Abstract: Effect of tilt angle, at which ions are implanted into a semiconductor layer of a wafer, is evaluated by measuring reflectance of a region which has implanted ions in first areas that are interdigitated with a corresponding number of second areas lacking the implanted ions (or having the same specie ions in a background concentration). The second areas are protected during ion implantation either by being covered up or by being in shadows, of bars located over the semiconductor layer. Due to a shadow cast by a bar, only a portion of each opening between two adjacent bars is implanted with ions to form each first area, depending on the tilt angle. Hence, tilt angle is determined e.g. from a bar's shadow's width and the bar's thickness. The bar's shadow's width in turn is determined from the width of an opening and the width of an implanted first area.

Abstract: A patterned dielectric layer is evaluated by measuring reflectance of a region which has openings. A heating beam may be chosen for having reflectance from an underlying conductive layer that is several times greater than absorptance, to provide a heightened sensitivity to presence of residue and/or changes in dimension of the openings. Reflectance may be measured by illuminating the region with a heating beam modulated at a preset frequency, and measuring power of a probe beam that reflects from the region at the preset frequency. Openings of many embodiments have sub-wavelength dimensions (i.e. smaller than the wavelength of the heating beam). The underlying conductive layer may be patterned into links of length smaller than the diameter of heating beam, so that the links float to a temperature higher than a corresponding temperature attained by a continuous trace that transfers heat away from the illuminated region by conduction.

Abstract: A cut of a longitudinal feature (such as a trench in a semiconductor wafer), is made not perpendicular to or parallel to the feature, but instead at an angle to the longitudinal direction of the feature. Specifically, if the longitudinal feature is oriented along an X axis, then several embodiments cut the feature along a shallow angle ? relative to the X axis, to form a cross-section of the feature that is substantially elongated. The amount of elongation of the cross-section depends on the shallowness of angle ?. Specifically, the shallower the angle ?, the more elongated the cross-section. Such an elongated cross-section is evaluated by a tool whose resolution limit has been reached and which tool cannot be used to evaluate a normal cross-section of the feature. Therefore resolution-limited tools have an extended life by use of shallow angle cuts as device geometries shrink below their resolution limits.

Abstract: A method of fabricating a wafer includes forming a portion of the wafer, making a first measurement in the wafer using a first process, making a second measurement in the wafer using a second process each time the first measurement is made, using one of the first measurement and the second measurement to calibrate the other of the first measurement and the second measurement, and changing a process control parameter used in forming the portion of the wafer depending on the first measurement and on the second measurement.

Abstract: Heat is applied to a conductive structure that includes one or more vias, and the temperature at or near the point of heat application is measured. The measured temperature indicates the integrity or the defectiveness of various features (e.g. vias and/or traces) in the conductive structure, near the point of heat application. Specifically, a higher temperature measurement (as compared to a measurement in a reference structure) indicates a reduced heat transfer from the point of heat application, and therefore indicates a defect. The reference structure can be in the same die as the conductive structure (e.g. to provide a baseline) or outside the die but in the same wafer (e.g. in a test structure) or outside the wafer (e.g. in a reference wafer), depending on the embodiment.

Abstract: Catalyst compositions useful for the polymerization of olefins are disclosed. These compositions comprise a Group 8-10 metal complex comprising a bidentate or variable denticity ligand comprising one or two nitrogen donor atom or atoms independently substituted by an aromatic or heteroaromatic ring(s), wherein the ortho positions of said ring(s) are substituted by aryl or heteroaryl groups. Also disclosed are processes for the polymerization of olefins using the catalyst compositions.

Abstract: A property of a layer is measured by: (1) focusing a heating beam on a region (also called “heated region”) of a conductive layer (2) modulating the power of the heating beam at a predetermined frequency that is selected to be sufficiently low to ensure that at any time the temperature of an optically absorbing layer is approximately equal to (e.g., within 90% of) a temperature of the optically absorbing layer when heated by an unmodulated beam, and (3) measuring the power of another beam that is (a) reflected by the heated region, and (b) modulated in phase with modulation of the heating beam. The measurement in act (3) can be used directly as a measure of the resistance (per unit area) of a conductive pad formed by patterning the conductive layer. Change in measurement across regions indicates a corresponding change in resistance of the layer.

Abstract: A method and apparatus measure properties of two layers of a damascene structure (e.g. a silicon wafer during fabrication), and use the two measurements to identify a location as having voids. One of the two measurements is of resistance per unit length. The two measurements may be used in any manner, e.g. compared to one another, and voids are deemed to be present when the two measurements diverge from each other. In response to the detection of voids, a process parameter used in fabrication of the damascene structure may be changed, to reduce or eliminate voids in to-be-formed structures.