Patents by Inventor Peter F. Corbett

Peter F. Corbett has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7366837
    Abstract: A technique places content, such as data, of one or more data containers on volumes of a striped volume set (SVS). The placement of data across the volumes of the SVS allows specification of a deterministic pattern of fixed length. That is, the pattern determines a placement of data of a data container that is striped among the volumes of the SVS. The placement pattern is such that the stripes are distributed exactly or nearly equally among the volumes and that, within any local span of a small multiple of the number of volumes, the stripes are distributed nearly equally among the volumes. The placement pattern is also substantially similar for a plurality of SVSs having different numbers of volumes.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: April 29, 2008
    Assignee: Network Appliance, Inc.
    Inventors: Peter F. Corbett, Robert M. English, Steven R. Kleiman
  • Patent number: 7356731
    Abstract: A uniform and symmetric, double failure-correcting technique protects against two or fewer disk failures in a disk array of a storage system. A RAID system of the storage system generates two disks worth of “redundant” information for storage in the array, wherein the redundant information (e.g., parity) is illustratively derived from computations along both diagonal parity sets (“diagonals”) and row parity sets (“rows”). Specifically, the RAID system computes row parity along rows of the array and diagonal parity along diagonals of the array. However, the contents of the redundant (parity) information disks interact such that neither disk contains purely (solely) diagonal or row redundancy information; the redundant information is generated using diagonal parity results in row parity computations (and vice versa).
    Type: Grant
    Filed: January 16, 2007
    Date of Patent: April 8, 2008
    Assignee: Network Applicance, Inc.
    Inventors: Peter F. Corbett, Robert M. English, Steven R. Kleiman
  • Patent number: 7346831
    Abstract: A parity assignment technique enables parity declustering in a large, balanced parity (“super-stripe”) array of a storage system. The balanced array may be constructed by combining a plurality of unbalanced parity stripe arrays, each having parity blocks on a set of storage devices, such as disks, that are disjoint from the set of disks storing the data blocks. The technique distributes the assignment of disks to parity groups among the combined super-stripe array such that all disks contain the same amount of data or parity information. Moreover, the technique ensures that all surviving data disks of the array are loaded uniformly during a reconstruction phase after a single or double disk failure.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: March 18, 2008
    Assignee: Network Appliance, Inc.
    Inventor: Peter F. Corbett
  • Patent number: 7328305
    Abstract: A dynamic parity distribution system and technique distributes parity across disks of an array. The dynamic parity distribution system includes a storage operating system that integrates a file system with a RAID system. In response to a request to store (write) data on the array, the file system determines which disks contain free blocks in a next allocated stripe of the array. There may be multiple blocks within the stripe that do not contain file system data (i.e., unallocated data blocks) and that could potentially store parity. One or more of those unallocated data blocks can be assigned to store parity, arbitrarily. According to the dynamic parity distribution technique, the file system determines which blocks hold parity each time there is a write request to the stripe. The technique alternately allows the RAID system to assign a block to contain parity when each stripe is written.
    Type: Grant
    Filed: November 3, 2003
    Date of Patent: February 5, 2008
    Assignee: Network Appliance, Inc.
    Inventors: Steven R. Kleiman, Robert M. English, Peter F. Corbett
  • Patent number: 7263629
    Abstract: A uniform and symmetric, double failure-correcting technique protects against two or fewer disk failures in a disk array of a storage system. A RAID system of the storage system generates two disks worth of “redundant” information for storage in the array, wherein the redundant information (e.g., parity) is illustratively derived from computations along both diagonal parity sets (“diagonals”) and row parity sets (“rows”). Specifically, the RAID system computes row parity along rows of the array and diagonal parity along diagonals of the array. However, the contents of the redundant (parity) information disks interact such that neither disk contains purely (solely) diagonal or row redundancy information; the redundant information is generated using diagonal parity results in row parity computations (and vice versa).
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: August 28, 2007
    Assignee: Network Appliance, Inc.
    Inventors: Peter F. Corbett, Robert M. English, Steven R. Kleiman
  • Patent number: 7257676
    Abstract: A semi-static distribution technique distributes parity across disks of an array. According to the technique, parity is distributed (assigned) across the disks of the array in a manner that maintains a fixed pattern of parity blocks among the stripes of the disks. When one or more disks are added to the array, the semi-static technique redistributes parity in a way that does not require recalculation of parity or moving of any data blocks. Notably, the parity information is not actually moved; the technique merely involves a change in the assignment (or reservation) for some of the parity blocks of each pre-existing disk to the newly added disk.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: August 14, 2007
    Assignee: Network Appliance, Inc.
    Inventors: Peter F. Corbett, Steven R. Kleiman, Robert M. English
  • Patent number: 7203892
    Abstract: A “row-diagonal” (R-D) parity technique reduces overhead of computing diagonal parity for a storage array adapted to enable efficient recovery from the concurrent failure of two storage devices in the array. The diagonal parity is computed along diagonal parity sets that collectively span all data disks and a row parity disk of the array. The parity for all of the diagonal parity sets except one is stored on the diagonal parity disk. The R-D parity technique provides a uniform stripe depth and an optimal amount of parity information.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: April 10, 2007
    Assignee: Network Appliance, Inc.
    Inventors: Peter F. Corbett, Steven R. Kleiman, Robert M. English
  • Patent number: 7185144
    Abstract: A semi-static distribution technique distributes parity across disks of an array. According to the technique, parity is distributed (assigned) across the disks of the array in a manner that maintains a fixed pattern of parity blocks among the stripes of the disks. When one or more disks are added to the array, the semi-static technique redistributes parity in a way that does not require recalculation of parity or moving of any data blocks. Notably, the parity information is not actually moved; the technique merely involves a change in the assignment (or reservation) for some of the parity blocks of each pre-existing disk to the newly added disk.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: February 27, 2007
    Assignee: Network Appliance, Inc.
    Inventors: Peter F. Corbett, Steven R. Kleiman, Robert M. English
  • Patent number: 7080278
    Abstract: A technique efficiently corrects multiple storage device failures in a storage array. The storage array comprises a plurality of concatenated sub-arrays, wherein each sub-array includes a set of data storage devices and a local parity storage device that stores values used to correct a failure of a single device within a row of blocks, e.g., a row parity set, in the sub-array. Each sub-array is assigned diagonal parity sets identically, as if it were the only one present using a double failure protection encoding method. The array further includes a single, global parity storage device holding diagonal parity computed by logically adding together equivalent diagonal parity sets in each of the sub-arrays.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: July 18, 2006
    Assignee: Network Appliance, Inc.
    Inventors: Steven R. Kleiman, Robert M. English, Peter F. Corbett
  • Patent number: 7073115
    Abstract: A technique efficiently corrects multiple storage device failures in a storage array using a combination of a single diagonal parity group and multiple row parity groups. The storage array includes a plurality of concatenated sub-arrays, wherein each sub-array includes a set of data storage devices and a parity storage device. Each row parity group is associated with a sub-array of the array. The array further includes a global parity storage device holding diagonal parity computed across the concatenation of the sub-arrays. Instead of requiring that each parity group contain both a row parity device and a diagonal parity device, the array is composed of a collection of row parity groups. Diagonal parity is calculated across the full array.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: July 4, 2006
    Assignee: Network Appliance, Inc.
    Inventors: Robert M. English, Peter F. Corbett, Steven R. Kleiman
  • Patent number: 6993701
    Abstract: A “row-diagonal” (R-D) parity technique reduces overhead of computing diagonal parity for a storage array adapted to enable efficient recovery from the concurrent failure of two storage devices in the array. The diagonal parity is computed along diagonal parity sets that collectively span all data disks and a row parity disk of the array. The parity for all of the diagonal parity sets except one is stored on the diagonal parity disk. The R-D parity technique provides a uniform stripe depth and an optimal amount of parity information.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: January 31, 2006
    Assignee: Network Appliance, Inc.
    Inventors: Peter F. Corbett, Steven R. Kleiman, Robert M. English
  • Patent number: 6871317
    Abstract: A distributed parity technique organizes and distributes parity blocks among storage devices of an array coupled to a storage system. The array illustratively comprises a plurality of disks, each of which is divided into blocks of fixed size. The blocks are then organized into stripes, wherein each stripe contains one disk that holds only row parity blocks, another disk that holds only diagonal parity blocks and the remaining disks that hold data blocks. The number of blocks on each disk of each stripe is initially equal such that an even disk length arises within each stripe. Thereafter, an extra parity block is appended to the end of the disk holding the diagonal parity blocks within each stripe. Each block of the array is assigned to two parity sets and any one or any combination of two disks can fail concurrently and the data on the failed disks can be reconstructed.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: March 22, 2005
    Assignee: Network Appliance, Inc.
    Inventor: Peter F. Corbett
  • Patent number: 6851082
    Abstract: A concentrated parity technique allows construction of an extended array that is tolerant of any one or two storage device failures and that enables storage of more than one parity block on a single storage device of the array. The concentrated parity technique uses a conventional, per stripe, distributed parity assignment of data blocks to parity sets, with a restriction that precludes certain parity deltas. Yet, this restriction enables construction of the extended array having data blocks stored on a first set of devices that is disjoint from a second set of devices storing parity blocks, to thereby enable storage of more than one parity block per stripe on a single device.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: February 1, 2005
    Assignee: Network Appliance, Inc.
    Inventor: Peter F. Corbett
  • Publication number: 20030126522
    Abstract: A technique efficiently corrects multiple storage device failures in a storage array using a combination of a single diagonal parity group and multiple row parity groups. The storage array comprises a plurality of concatenated sub-arrays, wherein each sub-array includes a set of data storage devices and a parity storage device. Each row parity group is associated with a sub-array of the array. The array further includes a global parity storage device holding diagonal parity computed across the concatenation of the sub-arrays. Instead of requiring that each parity group contain both a row parity device and a diagonal parity device, the array is composed of a collection of row parity groups. Diagonal parity is calculated across the full array.
    Type: Application
    Filed: December 28, 2001
    Publication date: July 3, 2003
    Inventors: Robert M. English, Peter F. Corbett, Steven R. Kleiman
  • Publication number: 20030126523
    Abstract: A “row-diagonal” (R-D) parity technique reduces overhead of computing diagonal parity for a storage array adapted to enable efficient recovery from the concurrent failure of two storage devices in the array. The diagonal parity is computed along diagonal parity sets that collectively span all data disks and a row parity disk of the array. The parity for all of the diagonal parity sets except one is stored on the diagonal parity disk. The R-D parity technique provides a uniform stripe depth and an optimal amount of parity information.
    Type: Application
    Filed: December 28, 2001
    Publication date: July 3, 2003
    Inventors: Peter F. Corbett, Steven R. Kleiman, Robert M. English
  • Publication number: 20020129176
    Abstract: The invention is a system and method for establishing a communication connection between two programs, each running on multiple processors of a distributed or shared memory parallel computer, or on multiple computers in a cluster of workstations or a set of network connected workstations.
    Type: Application
    Filed: July 14, 1997
    Publication date: September 12, 2002
    Inventors: ANTHONY S. BOLMARCICH, PETER F. CORBETT, JULIAN SATRAN
  • Patent number: 5634096
    Abstract: A scheme is presented for storing data on disks in such a way that a checkpoint can easily be taken across several disks connected to different processors in a distributed or parallel computer. A checkpoint can be used to restore the entire disk system to a known state after one or more of the disks or processors fails. When a failure occurs, the disk system is restored to its state at the current checkpoint. The scheme allows significant saving in disk space by requiring that only the data modified since the last checkpoint be copied. The checkpointing algorithm is presented as part of the invention. The invention allows checkpointing of disk space independently of the use of the disk space, for example, in a file system.
    Type: Grant
    Filed: October 31, 1994
    Date of Patent: May 27, 1997
    Assignee: International Business Machines Corporation
    Inventors: Sandra J. Baylor, Peter F. Corbett, Blake G. Fitch, Mark E. Giampapa
  • Patent number: 5317755
    Abstract: A method of transforming systolic arrays using bit-parallel arithmetic into arrays using digit-serial arithmetic is described. Digit-serial computation is an area-time efficient method of doing high-speed arithmetic calculations, having the advantage through appropriate choice of digit and word size of allowing throughput capacity to be matched to design needs. For a certain class of systolic arrays, however, digit-serial arithmetic allows a further very significant benefit, by transforming arrays in which processors are under-utilized into arrays with 100% processor utilization. As an example, converting a well-known band-matrix multiplication array to use digit-serial processing is calculated to give an improvement of more than three times in area-time efficiency.
    Type: Grant
    Filed: April 10, 1991
    Date of Patent: May 31, 1994
    Assignee: General Electric Company
    Inventors: Richard I. Hartley, Peter F. Corbett
  • Patent number: 5164724
    Abstract: Conversion apparatus is used to convert digital data words to a digit-serial data format wherein digit bit-width is optimal for subsequent processing of the digital data words. Optimization is with regard to throughput efficiency, a measure of integrated circuit performance proportional to throughput rate of integrated circuitry and inversely proportional to the area of that integrated circuitry, comprising processing circuitry and attendant conversion circuitry.
    Type: Grant
    Filed: July 16, 1990
    Date of Patent: November 17, 1992
    Assignee: General Electric Company
    Inventors: Richard I. Hartley, Peter F. Corbett, Fathy F. Yassa, Sharbel E. Noujaim
  • Patent number: 5084834
    Abstract: Linear combining apparatus for digit-serial data performs addition, subtraction and comparison functions on a systolic basis. Signals are afforded the apparatus indicating the occurence of the most significant digits of the digit-serial signals being linearly combined.
    Type: Grant
    Filed: January 22, 1991
    Date of Patent: January 28, 1992
    Assignee: General Electric Company
    Inventors: Richard I. Hartley, Peter F. Corbett