Abstract: A solder feeding device having a reservoir, a drive unit, a first lead, and a second lead is provided. The reservoir melts solid solder wire into molten solder, while the drive unit selectively feeds the solid solder wire into the reservoir. The first and second leads are in electrical communication with the drive unit. The first lead is positioned in the reservoir so that it electrically communicates with the second lead through the molten solder when the molten solder reaches a triggering level, but so that it does not electrically communicate with the second lead when the level is below the triggering level. The drive unit feeds the solid solder wire into the reservoir based upon a state of electrical communication between the first and second leads.

Abstract: An easy to swallow pharmaceutical composition consists of one or several coated particles with a core which contains an active substance and a coat with one or several layers. The coating layer(s) contain at least one hydratable, pharmaceutically acceptable polymer which in contact with saliva or water forms a coherent, mouldable, viscous mass with a slippery surface which does not adhere to the mucous membranes of the mouth and which prevents the active substance-containing particles from leaving the mass and releasing the active substance in the mouth cavity. The coating layer or the outermost coating layer contains an effective amount of at least one salivation promoting agent. The formation of a mouldable, slippery mass and the taste-masking properties of the coating make the composition suitable in particular for administering highly dosed or bad tasting active substances, and can preferably be swallowed even without any liquid.

Abstract: In a solder reflow type building of modular electrical apparatus involving integrated circuit and discrete components, fabrication operations are arranged to include the providing of a general type series of steps for each component element involving a reflow or joining step at the highest joining temperature, immediately followed by a solder flux cleaning step and immediately followed by a testing of the entire module constructed thus far. There is provided a further specific type operation for each different type of component element that includes the providing of a loop for the introduction of a replacement for any broken discrete component with joining being achieved with use of a lower fusion temperature solder, flux cleaning and testing at each joining followed by reinsertion into the module. There is further provided an operation at the encapsulation stage of the module building for introducing underfill between the component and supporting carrier.

Abstract: A non effervescent tablet of ibuprofen, comprising a tablet core and, if desired, a sugar or film coat, wherein the tablet core, based on the weight of the tablet core, consists of 50 to 100% by weight sodium ibuprofen hydrate and 50 to 0% by weight auxiliary material component and contains no lubricant and no disintegrant, and wherein the sodium ibuprofen hydrate has a water content of 8 to 16% by weight, preferably 11 to 16% by weight, possesses a sufficient hardness, is comparably small and leads to a particularly rapid increase in blood level and thereby to an accelerated onset of analgesic effect. Contrary to the current doctrine sodium ibuprofen hydrate having a suitable water content is sufficiently compressible.

Abstract: A method for testing integrated circuit chips with probe wires on flat solder bumps and IC chips that are equipped with flat solder bumps are disclosed. In the method, an IC chip that has a multiplicity of bond pads and a multiplicity of flat solder bumps are first provided in which each of the solder bumps has a height less than ½ of its diameter on the multiplicity of bond pads. The probe wires can thus be easily used to contact the increased target area on the solder bumps for establishing electrical connection with a test circuit. The probe can further be conducted easily with all the Z height of the bumps are substantially equal. The height of the solder bumps may be suitably controlled by either a planarization process in which soft solder bumps are compressed by a planar surface, or solder bumps are formed in an in-situ mold by either a MSS or an electroplating process for forming solder bumps in the shape of short cylinders.

Abstract: An oral composition which is adapted to be dispersed in an aqueous carrier substantially immediately prior to administration comprises a multiplicity of particles comprising an active substance, the particles being combined with one or more gelling or swelling agents capable of forming a viscous medium around the particles in an aqueous carrier as well as being provided with a masking surface layer when dispersed in the aqueous carrier. This serves to mask uneven surfaces on the particles and prevent them from adhering to oral mucosa when the composition is ingested and thus makes it easier to administer large dosages of an active substance. The masking surface layer is preferably provided by an increased viscosity of the viscous medium in the immediate vicinity of the particles relative to the viscosity of the surrounding aqueous carrier. A ready-to-use composition is prepared by mixing the composition with an aqueous carrier substantially immediately prior to administration of the composition.

Abstract: An apparatus and a method for filling high aspect ratio holes in electronic substrates that can be advantageously used for filling holes having aspect ratios larger than 5:1 are disclosed. In the apparatus, a filler plate and a vacuum plate are used in conjunction with a connection means such that a gap is formed between the two plates to accommodate an electronic substrate equipped with high aspect ratio via holes. The filler plate is equipped with an injection slot while the vacuum plate is equipped with a vacuum slot such that when a substrate is sandwiched therein, via holes can be evacuated of air and injected with a liquid simultaneously from a bottom side and a top side of the substrate. The present invention novel apparatus and method allows the filling of via holes that have small diameters, i.e., as small as 10 &mgr;m, and high aspect ratios, i.e.

Abstract: In a top comb for a combing machine, having at least one row of stamped needles that are arranged in a parallel side-by-side relation and enclosed between two cover plates with a free needle projection (8) being left free, wherein compressed air channels are formed between the cover plates and adjacent pairs of needles are provided, in order to increase the efficiency of the cleaning effect, that the needles (1,1′,1″) incorporate embossings such that the congruent embossings of adjacent needles form an air channel (9,9′,9″), wherein the embossings taper in their widths towards the outlet area (outlet opening 11,11′,11″).

Abstract: A method for testing integrated circuit chips with probe wires on flat solder bumps and IC chips that are equipped with flat solder bumps are disclosed. In the method, an IC chip that has a multiplicity of bond pads and a multiplicity of flat solder bumps are first provided in which each of the solder bumps has a height less than ½ of its diameter on the multiplicity of bond pads. The probe wires can thus be easily used to contact the increased target area on the solder bumps for establishing electrical connection with a test circuit. The probe can further be conducted easily with all the Z height of the bumps are substantially equal. The height of the solder bumps may be suitably controlled by either a planarization process in which soft solder bumps are compressed by a planar surface, or solder bumps are formed in an in-situ mold by either a MSS or an electroplating process for forming solder bumps in the shape of short cylinders.

Abstract: A method for direct chip attach of a semiconductor chip to a circuit board by using solder bumps and an underfill layer is disclosed. In the method, a layer of in-situ polymeric mold material is first screen printed on the top surface of the semiconductor chip exposing a multiplicity of bond pads. The in-situ polymeric mold layer is formed with a multiplicity of apertures which are then filled with solder material in a molten solder screening process to form solder bumps. A thin flux-containing underfill material layer is then placed on top of a circuit board over a plurality of conductive pads which are arranged in a mirror image to the bond pads on the semiconductor chip. The semiconductor chip and the circuit board are then pressed together with the underfill layer inbetween and heated to a reflow temperature of higher than the melting temperature of the solder material until electrical communication is established between the bond pads and the conductive pads.

Abstract: A process is described for forming a common input-output (I/O) site that is suitable for both wire-bond and solder bump flip chip connections, such as controlled-collapse chip connections (C4). The present invention is particularly suited to semiconductor chips that use copper as the interconnection material, in which the soft dielectrics used in manufacturing such chips are susceptible to damage due to bonding forces. The present invention reduces the risk of damage by providing site having a noble metal on the top surface of the pad, while providing a diffusion barrier to maintain the high conductivity of the metal interconnects. Process steps for forming an I/O site within a substrate are reduced by providing a method for selectively depositing metal layers in a feature formed in the substrate. Since the I/O sites of the present invention may be used for either wire-bond or solder bump connections, this provides increased flexibility for chip interconnection options, while also reducing process costs.

Abstract: A process is described for forming a common input-output (I/O) site that is suitable for both wire-bond and solder bump flip chip connections, such as controlled-collapse chip connections (C4). The present invention is particularly suited to semiconductor chips that use copper as the interconnection material, in which the soft dielectrics used in manufacturing such chips are susceptible to damage due to bonding forces. The present invention reduces the risk of damage by providing site having a noble metal on the top surface of the pad, while providing a diffusion barrier to maintain the high conductivity of the metal interconnects. Process steps for forming an I/O site within a substrate are reduced by providing a method for selectively depositing metal layers in a feature formed in the substrate. Since the I/O sites of the present invention may be used for either wire-bond or solder bump connections, this provides increased flexibility for chip interconnection options, while also reducing process costs.

Abstract: In a top comb for a combing machine, comprising at least one row of stamped needles that are arranged in a parallel side-by-side relation and enclosed between two cover plates with a free needle projection (8) being left free, wherein compressed air channels are formed between the cover plates and adjacent pairs of needles, it is provided, in order to increase the efficiency of the cleaning effect, that the needles (1, 1′, 1″) incorporate embossings such that the congruent embossings of adjacent needles form an air channel (9, 9′, 9″), wherein the embossings taper in their widths towards the outlet area (outlet opening 11, 11′, 11″).

Abstract: An apparatus and a method for filling high aspect ratio holes in electronic substrates that can be advantageously used for filling holes having aspect ratios larger than 5:1 are disclosed. In the apparatus, a filler plate and a vacuum plate are used in conjunction with a connection means such that a gap is formed between the two plates to accommodate an electronic substrate equipped with high aspect ratio via holes. The filler plate is equipped with an injection slot while the vacuum plate is equipped with a vacuum slot such that when a substrate is sandwiched therein, via holes can be evacuated of air and injected with a liquid simultaneously from a bottom side and a top side of the substrate. The present invention novel apparatus and method allows the filling of via holes that have small diameters, i.e., as small as 10 &mgr;m, and high aspect ratios, i.e.

Abstract: An apparatus and a method for filling high aspect ratio holes in electronic substrates that can be advantageously used for filling holes having aspect ratios larger than 5:1 are disclosed. In the apparatus, a filler plate and a vacuum plate are used in conjunction with a connection means such that a gap is formed between the two plates to accommodate an electronic substrate equipped with high aspect ratio via holes. The filler plate is equipped with an injection slot while the vacuum plate is equipped with a vacuum slot such that when a substrate is sandwiched therein, via holes can be evacuated of air and injected with a liquid simultaneously from a bottom side and a top side of the substrate. The present invention novel apparatus and method allows the filling of via holes that have small diameters, i.e., as small as 10 &mgr;m, and high aspect ratios, i.e.

Abstract: A predictive apparatus for controlling or regulating supply values (T_VRL) includes a first data store in which rules, based on a linear consumer model, for calculating process values are stored, a second data store in which rules for restrictions or limit values to be observed for process values and for values derived from process values are stored, and further also means for repeatable optimizing of the energy consumption or of the energy costs with the aid of linear or quadratic programming. The apparatus is configured such that the optimizing can be carried out over a sliding time horizon.

Abstract: A method for forming three-dimensional circuitization in a substrate is provided for forming conductive traces and via contacts. In the method, a substrate formed of a substantially insulating material is first provided, grooves and apertures in a top surface of and through the substrate are then formed, followed by filling the grooves and apertures with an electrically conductive material such as a solder. The method can be carried out at a low cost to produce high quality circuit substrates by utilizing an injection molded solder technique or a molten solder screening technique to fill the grooves and the apertures. The grooves and the apertures in the substrate may be formed by a variety of techniques such as chemical etching, physical machining and hot stamping.

Abstract: A process is described for forming a common input-output (I/O) site that is suitable for both wire-bond and solder bump flip chip connections, such as controlled-collapse chip connections (C4). The present invention is particularly suited to semiconductor chips that use copper as the interconnection material, in which the soft dielectrics used in manufacturing such chips are susceptible to damage due to bonding forces. The present invention reduces the risk of damage by providing site having a noble metal on the top surface of the pad, while providing a diffusion barrier to maintain the high conductivity of the metal interconnects. Process steps for forming an I/O site within a substrate are reduced by providing a method for selectively depositing metal layers in a feature formed in the substrate. Since the I/O sites of the present invention may be used for either wire-bond or solder bump connections, this provides increased flexibility for chip interconnection options, while also reducing process costs.

Abstract: Methods for fabricating microelectronic interconnection structures as well as the structures formed by the methods are disclosed which improve the manufacturing throughput for assembling flip chip semiconductor devices. The use of a bilayer of polymeric materials applied on the wafer prior to dicing eliminates the need for dispensing and curing underfill for each semiconductor at the package level, thereby improving manufacturing throughput and reducing cost.

Abstract: A method for forming three-dimensional circuitization in a substrate is provided for forming conductive traces and via contacts. In the method, a substrate formed of a substantially insulating material is first provided, grooves and apertures in a top surface of and through the substrate are then formed, followed by filling the grooves and apertures with an electrically conductive material such as a solder. The method can be carried out at a low cost to produce high quality circuit substrates by utilizing an injection molded solder technique or a molten solder screening technique to fill the grooves and the apertures. The grooves and the apertures in the substrate may be formed by a variety of techniques such as chemical etching, physical machining and hot stamping.