Abstract: The invention relates to solid medicinal forms containing at least one active ingredient and at least one pharmaceutically compatible, water soluble drying agent which is selected from the group consisting of trimagnesium dicitrate and/or calcium chloride, the solid medicinal form having a drying loss of at most 6% and a relative equilibrium moisture content of 25% or less. The invention also relates to solid medicinal forms containing a moisture-sensitive active ingredient and trimagnesium dicitrate.

Abstract: The invention relates to solid medicinal forms containing at least one active ingredient and at least one pharmaceutically compatible, water soluble drying agent which is selected from the group consisting of trimagnesium dicitrate and/or calcium chloride, the solid medicinal form having a drying loss of at most 6% and a relative equilibrium moisture content of 25% or less. The invention also relates to solid medicinal forms containing a moisture-sensitive active ingredient and trimagnesium dicitrate.

Abstract: A system of producing metal cored solder structures on a substrate includes: a decal, a carrier, and receiving elements. The decal includes one or more apertures each of which is tapered from a top surface to a bottom surface thereof. The carrier is positioned beneath the bottom of the decal and includes cavities in a top surface. The cavities are located in alignment with the apertures of the decal. The decal is positioned on the carrier having the decal bottom surface in contact with the carrier top surface to form feature cavities defined by the decal apertures and the carrier cavities. The feature cavities are shaped to receive one or more metal elements and are configured for receiving molten solder cooled in the cavities. The decal is separable from the carrier to partially expose metal core solder contacts. The receiving elements receive the metal core solder contacts thereon.

Abstract: A system of producing metal cored solder structures on a substrate includes: a decal having a plurality of apertures, the apertures being tapered from a top surface to a bottom surface of the decal; a carrier configured for positioning beneath the bottom of the decal, the carrier having cavities in a top surface and the cavities located in alignment with the apertures of the decal; the decal being configured for positioning on the carrier having the decal bottom surface in contact with the carrier top surface to form feature cavities defined by the decal apertures and the carrier cavities, the feature cavities being shaped to receive a plurality of metal elements therein, the feature cavities configured for receiving molten solder being cooled in the cavities, the decal being separable from the carrier to partially expose metal core solder contacts; and receiving elements of a substrate being configured to receive the metal core solder contacts thereon, and the metal core solder contacts being exposed and pos

Abstract: The invention relates to solid medicinal forms containing at least one active ingredient and at least one pharmaceutically compatible, water soluble drying agent which is selected from the group consisting of trimagnesium dicitrate and/or calcium chloride, the solid medicinal form having a drying loss of at most 6% and a relative equilibrium moisture content of 25% or less. The invention also relates to solid medicinal forms containing a moisture-sensitive active ingredient and trimagnesium dicitrate.

Abstract: The invention relates to solid medicinal forms containing at least one active ingredient and at least one pharmaceutically compatible, water soluble drying agent which is selected from the group consisting of trimagnesium dicitrate and/or calcium chloride, the solid medicinal form having a drying loss of at most 6% and a relative equilibrium moisture content of 25% or less. The invention also relates to solid medicinal forms containing a moisture-sensitive active ingredient and trimagnesium dicitrate.

Abstract: A method of forming a reduced volume interconnect for a chip stack including multiple silicon layers, the method including: forming multiple conductive structures, each of at least a subset of the conductive structures having a volume of conductive material for a corresponding under bump metallurgy pad onto which the conductive structure is transferred that is configured such that a ratio of an unreflowed diameter of the conductive structure to a diameter of the corresponding pad is about one third-to-one or less; transferring the conductive structures to the silicon layers; stacking the silicon layers in a substantially vertical dimension such that each of the conductive structures on a given silicon layer is aligned with a corresponding electrical contact location on an underside of an adjacent silicon layer; and heating the interconnect so as to metallurgically bond multiple electrical contact locations of adjacent silicon layers.

Abstract: A wafer-scale apparatus and method is described for the automation of forming, aligning and attaching two-dimensional arrays of microoptic elements on semiconductor and other image display devices, backplanes, optoelectronic boards, and integrated optical systems. In an ordered fabrication sequence, a mold plate comprised of optically designed cavities is formed by reactive ion etching or alternative processes, optionally coated with a release material layer and filled with optically specified materials by an automated fluid-injection and defect-inspection subsystem. Optical alignment fiducials guide the disclosed transfer and attachment processes to achieve specified tolerances between the microoptic elements and corresponding optoelectronic devices and circuits.

Abstract: A method of forming a reduced volume interconnect for a chip stack including multiple silicon layers, the method including: forming multiple conductive structures, each of at least a subset of the conductive structures having a volume of conductive material for a corresponding under bump metallurgy pad onto which the conductive structure is transferred that is configured such that a ratio of an unreflowed diameter of the conductive structure to a diameter of the corresponding pad is about one third-to-one or less; transferring the conductive structures to the silicon layers; stacking the silicon layers in a substantially vertical dimension such that each of the conductive structures on a given silicon layer is aligned with a corresponding electrical contact location on an underside of an adjacent silicon layer; and heating the interconnect so as to metallurgically bond multiple electrical contact locations of adjacent silicon layers.

Abstract: A wafer-scale apparatus and method is described for the automation of forming, aligning and attaching two-dimensional arrays of microoptic elements on semiconductor and other image display devices, backplanes, optoelectronic boards, and integrated optical systems. In an ordered fabrication sequence, a mold plate comprised of optically designed cavities is formed by reactive ion etching or alternative processes, optionally coated with a release material layer and filled with optically specified materials by an automated fluid-injection and defect-inspection subsystem. Optical alignment fiducials guide the disclosed transfer and attachment processes to achieve specified tolerances between the microoptic elements and corresponding optoelectronic devices and circuits.

Abstract: A method of forming a reduced volume interconnect for a chip stack including multiple silicon layers, the method including: forming multiple conductive structures, each of at least a subset of the conductive structures having a volume of conductive material for a corresponding under bump metallurgy pad onto which the conductive structure is transferred that is configured such that a ratio of an unreflowed diameter of the conductive structure to a diameter of the corresponding pad is about one third-to-one or less; transferring the conductive structures to the silicon layers; stacking the silicon layers in a substantially vertical dimension such that each of the conductive structures on a given silicon layer is aligned with a corresponding electrical contact location on an underside of an adjacent silicon layer; and heating the interconnect so as to metallurgically bond multiple electrical contact locations of adjacent silicon layers.

Abstract: A method of forming a reduced volume interconnect for a chip stack including multiple silicon layers, the method including: forming multiple conductive structures, each of at least a subset of the conductive structures having a volume of conductive material for a corresponding under bump metallurgy pad onto which the conductive structure is transferred that is configured such that a ratio of an unreflowed diameter of the conductive structure to a diameter of the corresponding pad is about one third-to-one or less; transferring the conductive structures to the silicon layers; stacking the silicon layers in a substantially vertical dimension such that each of the conductive structures on a given silicon layer is aligned with a corresponding electrical contact location on an underside of an adjacent silicon layer; and heating the interconnect so as to metallurgically bond multiple electrical contact locations of adjacent silicon layers.

Abstract: Multiple injections of molten solder are employed to form double solder bumps having outer layers that melt at lower temperatures than the inner portions thereof. During a flip chip assembly process, the reflow temperature is above the melting temperature of the outer layers and below the melting temperature of the inner portions of the solder bumps. As the inner portions of the solder bumps do not collapse during reflow, a flip chip assembly can be made at relatively low temperatures and have a high stand-off height. A structure having double solder bumps facilitates flip chip assembly.

Abstract: A fill head apparatus includes at least one chamber for holding a fluid. The chamber has an outlet for expelling the fluid. A vacuum device has an inlet for a suction device adjacent to the fluid outlet. A plurality of flexible and resilient sealing devices contact a top surface of a workpiece. The sealing devices are positioned on opposing sides of the chamber outlet and on opposing sides of the vacuum device inlet, such that the sealing devices create at least a partial seal around a cavity defined by the workpiece and the cavity is beneath both the chamber outlet and the vacuum outlet.

Abstract: Apparatus and methods for transcatheter valves. Specific embodiments relate to transcatheter flutter valves configured for pediatric use.

Abstract: A process for producing a solubilized ibuprofen, preferably in the form of a granulate, the process comprising the steps of: providing a mixture comprising solid ibuprofen and a first base selected from the group consisting of sodium hydroxide, potassium hydroxide, sodium carbonate, potassium carbonate, sodium glycinate, potassium glycinate and tribasic sodium and potassium phosphates and mixtures thereof, and reacting the ibuprofen and the first base in essentially dry state. The obtainable granulate and the pharmaceutical compositions and dosage forms that may be produced therefrom are distinguished by their high solubility and rapid disintegration and dissolution in aqueous media, by their good flow properties and compressibility, by rapidly achieving onset of analgesic effect.

Abstract: A system of producing metal cored solder structures on a substrate includes: a decal having a plurality of apertures, the apertures being tapered from a top surface to a bottom surface of the decal; a carrier configured for positioning beneath the bottom of the decal, the carrier having cavities in a top surface and the cavities located in alignment with the apertures of the decal; the decal being configured for positioning on the carrier having the decal bottom surface in contact with the carrier top surface to form feature cavities defined by the decal apertures and the carrier cavities, the feature cavities being shaped to receive a plurality of metal elements therein, the feature cavities configured for receiving molten solder being cooled in the cavities, the decal being separable from the carrier to partially expose metal core solder contacts; and receiving elements of a substrate being configured to receive the metal core solder contacts thereon, and the metal core solder contacts being exposed and pos

Abstract: Multiple injections of molten solder are employed to form double solder bumps having outer layers that melt at lower temperatures than the inner portions thereof. During a flip chip assembly process, the reflow temperature is above the melting temperature of the outer layers and below the melting temperature of the inner portions of the solder bumps. As the inner portions of the solder bumps do not collapse during reflow, a flip chip assembly can be made at relatively low temperatures and have a high stand-off height. A structure having double solder bumps facilitates flip chip assembly.

Abstract: A method and system of producing metal cored solder structures on a substrate which includes: providing a decal having a plurality of apertures, the apertures being tapered from a top surface to a bottom surface; positioning a carrier beneath the bottom of the decal, the carrier having cavities located in alignment with the apertures of the decal; positioning the decal on the carrier having the decal bottom surface in contact with the carrier top surface to form feature cavities defined by the decal apertures and the carrier cavities; positioning a plurality of metal elements in the feature cavities; filling the feature cavities with molten solder and cooling the solder; separating the decal from the carrier to partially expose metal core solder contacts; positioning the metal core solder contacts on receiving elements of a substrate; and exposing the metal core solder contacts on the substrate.

Abstract: Multiple injections of molten solder are employed to form double solder bumps having outer layers that melt at lower temperatures than the inner portions thereof. During a flip chip assembly process, the reflow temperature is above the melting temperature of the outer layers and below the melting temperature of the inner portions of the solder bumps. As the inner portions of the solder bumps do not collapse during reflow, a flip chip assembly can be made at relatively low temperatures and have a high stand-off height. A structure having double solder bumps facilitates flip chip assembly.