Abstract: An apparatus and method for converting between a full memory address and a compressed memory address. For example, one embodiment comprises one or more translation tables having a plurality of translation entries, each translation entry identifiable with a pointer value and storing a portion of a full memory address usable within the processor to address data and instructions; and address translation logic to use the translation tables to convert between the full address and a compressed version of the full address, the compressed version of the full address having the pointer value substituted for the portion of the full memory address, wherein a first portion of the processor performs operations using the compressed version of the full address and a second portion of the processor performs operations using the full address.

Abstract: An automation controller for next generation testing system includes a database including a plurality of scripts and modules, a business layer component, and an automation component. The automation component includes an automation agent and an automation worker. The business layer component is operable to determine a next script from the plurality of scripts and modules and send the next script to the automation component in response to a get next script request sent by the automation component. The automation agent is operable to send the get next script request to the business layer, receive the next script from the business layer, and send the next script to the automation worker for execution. The automation worker is operable to execute the next script or section thereof, obtain a result, send status updates, send proof of life notifications and the result of execution to the automation agent.

Abstract: Briefly, in accordance with one or more embodiments, a codebook for wireless transmissions may be generated by dividing a codebook into a fixed set of codewords and an adaptive set of codewords. The adaptive set of codewords may be scaled to cluster together and then rotated to be centered or nearly centered about a target. The adaptive set of codewords may then be merged with the fixed set of codewords to provide a hybrid codebook. A codeword from the hybrid codebook may be selected for precoding a transmission to provide a minimum, or nearly minimum, quantization error.

Abstract: An apparatus and method for converting between a full memory address and a compressed memory address. For example, one embodiment comprises one or more translation tables having a plurality of translation entries, each translation entry identifiable with a pointer value and storing a portion of a full memory address usable within the processor to address data and instructions; and address translation logic to use the translation tables to convert between the full address and a compressed version of the full address, the compressed version of the full address having the pointer value substituted for the portion of the full memory address, wherein a first portion of the processor performs operations using the compressed version of the full address and a second portion of the processor performs operations using the full address.

Abstract: Techniques for controlling alignment of conditions between modular functional blocks in an integrated circuit having a hierarchical network of modular functional blocks. The output of each functional block can be logically determined by its external inputs combined with internal state feedback and internal state and is derived from a pattern of prior external inputs. Alignment of output conditions from independent and interdependent functional blocks within the hierarchical network of functional blocks is induced to provide unique conditions by modifying internal state and timing alignments with internal data and internal controls within one or more of the modular functional blocks. Functional outputs from one or more of the modular functional blocks can be monitored based on the modified internal state and timing alignments. Pattern results can be generated based on the monitoring. Test results based on the pattern results can be stored.

Abstract: Clock signal generation circuitry. A frequency multiplier is coupled to receive a clock signal and to generate a frequency-multiplied clock signal. A switching circuit is coupled to receive at least two reference clock signals. The switching circuit provides one of the reference clock signals in response to a reference select signal. A phase locked loop (PLL) is coupled to receive the frequency-multiplied clock signal and the selected reference clock signal. The PLL generates an output clock signal.

Abstract: Briefly, in accordance with one or more embodiments, a codebook for wireless transmissions may be generated by dividing a codebook into a fixed set of codewords and an adaptive set of codewords. The adaptive set of codewords may be scaled to cluster together and then rotated to be centered or nearly centered about a target. The adaptive set of codewords may then be merged with the fixed set of codewords to provide a hybrid codebook. A codeword from the hybrid codebook may be selected for precoding a transmission to provide a minimum, or nearly minimum, quantization error.

Abstract: An automation controller for next generation testing system includes a database including a plurality of scripts and modules, a business layer component, and an automation component. The automation component includes an automation agent and an automation worker. The business layer component is operable to determine a next script from the plurality of scripts and modules and send the next script to the automation component in response to a get next script request sent by the automation component. The automation agent is operable to send the get next script request to the business layer, receive the next script from the business layer, and send the next script to the automation worker for execution. The automation worker is operable to execute the next script or section thereof, obtain a result, send status updates, send proof of life notifications and the result of execution to the automation agent.

Abstract: A method of supplying test data for test scripts is provided in an integrated testing platform, where the testing platform includes a prioritization and assignment manager configured forward test scripts to a selected testing individual. Each test script is mapped to an input data set if a corresponding input data set is available. Requests for test scripts made to the prioritization and assignment manager are monitored, and if the test script to be supplied in response to the request has a corresponding mapped input data set, the corresponding input data set is retrieved from a database, and the input data set is provided to the test script prior to execution of the test script.

Abstract: A method of prioritizing and assigning test scripts is provided in a testing platform configured to organize, manage, and facilitate the debugging of test scripts. The test scripts are used in testing software modules. The method includes receiving a plurality of test scripts, applying a predetermined set of factors to each test script, and assigning a weight value to each factor based on a relative importance of the factor. A priority value is set for each test script based on the weighted factors, and the test script is assigned to a queue position for execution based on the corresponding priority value, where the assigned test script is associated with one or more bias factors. The test script is then selected from the testing queue and forwarded if the bias factors indicate that requirements of the test script match corresponding bias factors of the testing individual.

Abstract: A method for modular script design includes receiving, at a modular script designer component, script information from a user, generating a list of suggested modules based on the script information, and receiving, at the modular script designer component, a selection of a next module from the user. The selection of the next module includes a selection of the next module from among the list of the suggested modules or a request for a new module. If the selection of the next module includes the request for the new module, the method further includes generating the new module.

Abstract: Host system data files are written directly to a large erase block flash memory system with a unique identification of each file and offsets of data within the file but without the use of any intermediate logical addresses or a virtual address space for the memory. Directory information of where the files are stored in the memory is maintained within the memory system by its controller, rather than by the host. The file based interface between the host and memory systems allows the memory system controller to utilize the data storage blocks within the memory with increased efficiency.

Abstract: An insert to limit the rate of flow of liquid from a drinking cup, the insert comprising mounting means to locate the insert within a cup above a liquid contained therein but below a brim of said cup so that a peripheral edge of the insert is spaced a predetermined distance from an inner surface of a cup such that, when a person drinks from the brim of a cup fitted with the insert, the rate of flow of liquid to the brim is limited by the insert.

Abstract: A window regulator that resists backdrive forces directly at the lift plate and rail, rather than by the drive assembly. A locking shoe mounted within the lift plate and selectively frictionally engages the rail while the drive assembly is at rest. Thus, any backdrive forces are transmitted from the window glass to the lift plate, and then directly to the rail, avoiding the drive assembly. A release fork that is coupled to the drive cable automatically disengages the locking shoe when the drive assembly is activated, and engages the locking shoe when the drive assembly disengages.

Abstract: A window regulator including a drive rod having a linear axis; a runner connected to the drive rod for movement therealong; a window carrier pivotally secured to the runner for supporting a window; and a guide engaged by the window carrier having a radius of curvature such that the window carrier moves the window along a path coincident with the radius of curvature as the runner moves linearly along the drive rod.

Abstract: A method and apparatus for tracking temporal use associated with cache evictions to reduce allocations in a victim cache is disclosed. Access data for a number of sets of instructions in an instruction cache is tracked at least until the data for one or more of the sets reach a predetermined threshold condition. Determinations whether to allocate entry storage in the victim cache may be made responsive in part to the access data for sets reaching the predetermined threshold condition. A micro-operation can be inserted into the execution pipeline in part to synchronize the access data for all the sets. Upon retirement of the micro-operation from the execution pipeline, access data for the sets can be synchronized and/or any previously allocated entry storage in the victim cache can be invalidated.

Abstract: Host system data files are written directly to a large erase block flash memory system with a unique identification of each file and offsets of data within the file but without the use of any intermediate logical addresses or a virtual address space for the memory. Directory information of where the files are stored in the memory is maintained within the memory system by its controller, rather than by the host. The file based interface between the host and memory systems allows the memory system controller to utilize the data storage blocks within the memory with increased efficiency.

Abstract: A window regulator including a drive rod having a linear axis; a runner connected to the drive rod for movement therealong; a window carrier pivotally secured to the runner for supporting a window; and a guide engaged by the window carrier having a radius of curvature such that the window carrier moves the window along a path coincident with the radius of curvature as the runner moves linearly along the drive rod.

Abstract: Host system data files are written directly to a large erase block flash memory system with a unique identification of each file and offsets of data within the file but without the use of any intermediate logical addresses or a virtual address space for the memory. Directory information of where the files are stored in the memory is maintained within the memory system by its controller, rather than by the host. The file based interface between the host and memory systems allows the memory system controller to utilize the data storage blocks within the memory with increased efficiency.

Abstract: A window regulator, e.g., for a vehicle window, includes block and pulley arrangements each including a lift pulley mounted to a lift plate that slides along a rail. Operative movement of a crank assembly in a first sense tensions a cable to move the lift plate towards a first end of the rail and operative movement of the crank assembly in a second sense, opposite the first sense, tensions a cable to move the lift plate towards a second end of the rail. The regulator enables the reduction of the operating torque requirements without affecting the packaging of the crank assembly.