Patents by Inventor Peter Kim

Peter Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11337612
    Abstract: Described herein is a system and method for determining characteristics of a wound. The system includes a first imaging sensor that obtains imaging information of a wound area and a second imaging sensor that obtains topology information of the wound area.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: May 24, 2022
    Assignee: CHILDREN'S NATIONAL MEDICAL CENTER
    Inventors: Kyle Wu, Peng Cheng, Peter Kim, Ozgur Guler
  • Patent number: 11195053
    Abstract: A computer architecture for artificial image generation is disclosed. According to some aspects, a computing machine receives a voxel model of a target object. The target object is to be recognized using an image recognizer. The computing machine generates, based on the voxel model, a set of TSB (target shadow background-mask) images of the target object. The computing machine receives, at an auto-encoder, a set of real images of the target object. The computing machine generates, using an auto-encoder and based on the set of real images, one or more artificial images of the target object based on the set of TSB images. The computing machine provides, as output, the generated one or more artificial images of the target object.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: December 7, 2021
    Assignee: Raytheon Company
    Inventors: Peter Kim, Ryan Quiller, Jason R. Chaves, Mark S. Berlin, Michael J. Sand
  • Patent number: 11107250
    Abstract: A computer architecture for artificial image generation is disclosed. According to some aspects, a computing machine receives a voxel model of a first set of objects different from a target object. The target object is to be recognized using an image recognizer. The computing machine generates, based on the voxel model, a set of TSB (target shadow background-mask) images of the first set of objects. The computing machine receives, at an auto-encoder, a set of real images of the first set of objects. The computing machine generates, using the auto-encoder, one or more artificial images of the target object based on the set of TSB images. The auto-encoder learns differences between the target object and the first set of objects. The computing machine provides, as output, the generated one or more artificial images of the target object.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: August 31, 2021
    Assignee: Raytheon Company
    Inventors: Peter Kim, Michael J. Sand, Matthew D. Hollenbeck
  • Publication number: 20210215818
    Abstract: A computing machine receives a real synthetic aperture radar (SAR) image including one or more targets. The real SAR image is one of a plurality of real SAR images in a training set. The computing machine generates, for the real SAR image, a model-based target shadow background (TSB) image using a three-dimensional (3D) model of the target. The computing machine generates, for the real SAR image and using an auto-encoder engine, an auto-encoder-generated TSB image using an artificial neural network (ANN). The computing machine computes, using a discriminator engine, an image difference between the auto-encoder-generated TSB image and the model-based TSB image. The computing machine adjusts weights in the auto-encoder engine based on the computed image difference.
    Type: Application
    Filed: January 14, 2020
    Publication date: July 15, 2021
    Inventors: Peter Kim, Matthew D. Hollenbeck, Michael J. Sand
  • Publication number: 20210157484
    Abstract: Systems and methods for managing conflicting background tasks in a dispersed storage network are provided. In embodiments, a method includes: gathering scheduled future task data for scheduled future tasks from a plurality of task scheduling modules within a dispersed storage network, wherein the scheduled future tasks are tasks associated with stored data objects; monitoring the scheduled future task data for scheduling conflicts based on stored rules; determining that a scheduling conflict exists between a first future task of the scheduled future tasks and a second future task of the scheduled future tasks; issuing instructions to at least one of the plurality of task scheduling modules to update the first future task or the second future task based on the scheduling conflict; and updating, by the at least one of the plurality of task scheduling modules, the first future task or the second future task based on the instructions.
    Type: Application
    Filed: November 25, 2019
    Publication date: May 27, 2021
    Inventors: Praveen Viraraghavan, Adam Gray, Tyler Kenneth Reid, Peter Kim, Fnu Manupriya, Anuraag Shah, Sridhar Gopalam, David Brittain Bolen, Bruno Cabral
  • Patent number: 11003909
    Abstract: A machine trains a first neural network using a first set of images. Training the first neural network comprises computing a first set of weights for a first set of neurons. The machine, for each of one or more alpha values in order from smallest to largest, trains an additional neural network using an additional set of images. The additional set of images comprises a homographic transformation of the first set of images. The homographic transformation is computed based on the alpha value. Training the additional neural network comprises computing an additional set of weights for an additional set of neurons. The additional set of weights is initialized based on a previously computed set of weights. The machine generates a trained ensemble neural network comprising the first neural network and one or more additional neural networks corresponding to the one or more alpha values.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: May 11, 2021
    Assignee: Raytheon Company
    Inventors: Peter Kim, Michael J. Sand
  • Patent number: 10925474
    Abstract: The present disclosure is a device and method associated with the delivery of medical devices in the pericardial space using a minimally invasive approach with direct visualization. More specifically, the device can be used to deliver permanent pacing, defibrillation and cardiac resynchronization leads, as well as leadless pacemakers for cardiac rhythm management to the epicardial surface of the heart. A subxiphoid procedure is proposed as a minimally invasive alternative to thoracotomy, while the delivery tool incorporates a camera for direct visualization of the procedure. The tool also incorporates a steerable catheter to provide selective control of the placement and orientation of the medical device in the pericardial space.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: February 23, 2021
    Assignee: CHILDREN'S NATIONAL MEDICAL CENTER
    Inventors: Charles Berul, Justin Opfermann, Axel Krieger, Peter Kim, Tanya Davis, Bradley Clark
  • Publication number: 20210038564
    Abstract: Provided herein are compositions and methods for preventing or reducing scar formation (e.g., hypertrophic scars). Certain embodiments provide a method of preventing hypertrophic scar formation in a subject comprising administering a HMG-CoA reductase-inhibiting agent to a wound site. In some embodiments, the wound site comprises scar tissue.
    Type: Application
    Filed: August 21, 2020
    Publication date: February 11, 2021
    Inventors: Thomas A. Mustoe, Peter Kim, Jason Ko, Xianzhong Ding, Yanan Zhao
  • Publication number: 20210010159
    Abstract: A wafer carrier includes a pocket sized and shaped to accommodate a wafer, the pocket having a base and a substantially circular perimeter, and a removable orientation marker, the removable orientation marker comprising an outer surface and an inner surface, the outer surface having an arcuate form sized and shaped to mate with the substantially circular perimeter of the pocket, and the inner surface comprising a flat face, wherein the removable orientation marker further comprises a notch at a first end of the flat face.
    Type: Application
    Filed: September 24, 2020
    Publication date: January 14, 2021
    Inventors: Mihir Tungare, Peter Kim, Jianwei Wan, Chankyung Choi
  • Publication number: 20200385663
    Abstract: This disclosure provides systems, methods, and apparatus related to the determination of ecological processes. In one aspect, a device includes a base and a substrate in contact with a first side of the base. The base defines a stem port. The substrate and the first side of the base define a chamber. The chamber includes a root chamber and a first nutrient chamber. The root chamber and the first nutrient chamber are separated by a first mesh having openings of about 1 micron to 300 microns. The device is operable to house a plant, with roots of the plant being in the root chamber, and a stem of the plant passing through the stem port.
    Type: Application
    Filed: May 29, 2020
    Publication date: December 10, 2020
    Inventors: Jens Heller, Lauren Jabusch, Peter Kim, Trent Northen, N. Louise Glass
  • Patent number: 10829866
    Abstract: In an embodiment, a wafer carrier includes a pocket sized and shaped to accommodate a wafer, the pocket being defined by a base and a substantially circular perimeter including an inner face and an outer face. The substantially circular perimeter includes a notch in the inner face.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: November 10, 2020
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Mihir Tungare, Peter Kim, Jianwei Wan, Chankyung Choi
  • Publication number: 20200303531
    Abstract: A type IV semiconductor substrate having a main surface is provided. A type III-V semiconductor channel region that includes a two-dimensional carrier gas is formed over the type IV semiconductor substrate. A type III-V semiconductor lattice transition region that is configured to alleviate mechanical stress arising from lattice mismatch is formed between the type IV semiconductor substrate and the type III-V semiconductor channel region. Forming the type III-V semiconductor lattice transition region includes forming a first lattice transition layer having a first metallic concentration over the type IV semiconductor substrate, forming a third lattice transition layer having a third metallic concentration that is higher than the first metallic concentration over the first lattice transition layer, and forming a fourth lattice transition layer having a fourth metallic concentration that is lower than the first metallic concentration over the third lattice transition layer.
    Type: Application
    Filed: June 8, 2020
    Publication date: September 24, 2020
    Inventors: Seong-Eun Park, Jianwei Wan, Mihir Tungare, Peter Kim, Srinivasan Kannan
  • Publication number: 20200302171
    Abstract: A machine trains a first neural network using a first set of images. Training the first neural network comprises computing a first set of weights for a first set of neurons. The machine, for each of one or more alpha values in order from smallest to largest, trains an additional neural network using an additional set of images. The additional set of images comprises a homographic transformation of the first set of images. The homographic transformation is computed based on the alpha value. Training the additional neural network comprises computing an additional set of weights for an additional set of neurons. The additional set of weights is initialized based on a previously computed set of weights. The machine generates a trained ensemble neural network comprising the first neural network and one or more additional neural networks corresponding to the one or more alpha values.
    Type: Application
    Filed: March 20, 2019
    Publication date: September 24, 2020
    Inventors: Peter Kim, Michael J. Sand
  • Patent number: 10720520
    Abstract: A type IV semiconductor substrate having a main surface is provided. A type III-V semiconductor channel region that includes a two-dimensional carrier gas is formed over the type IV semiconductor substrate. A type III-V semiconductor lattice transition region that is configured to alleviate mechanical stress arising from lattice mismatch is formed between the type IV semiconductor substrate and the type III-V semiconductor channel region. Forming the type III-V semiconductor lattice transition region includes forming a first lattice transition layer having a first metallic concentration over the type IV semiconductor substrate, forming a third lattice transition layer having a third metallic concentration that is higher than the first metallic concentration over the first lattice transition layer, and forming a fourth lattice transition layer having a fourth metallic concentration that is lower than the first metallic concentration over the third lattice transition layer.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: July 21, 2020
    Assignee: Infineon Technologies Austria AG
    Inventors: Seong-Eun Park, Jianwei Wan, Mihir Tungare, Peter Kim, Srinivasan Kannan
  • Publication number: 20200167605
    Abstract: A computer architecture for artificial image generation is disclosed. According to some aspects, a computing machine receives a voxel model of a target object. The target object is to be recognized using an image recognizer. The computing machine generates, based on the voxel model, a set of TSB (target shadow background-mask) images of the target object. The computing machine receives, at an auto-encoder, a set of real images of the target object. The computing machine generates, using an auto-encoder and based on the set of real images, one or more artificial images of the target object based on the set of TSB images. The computing machine provides, as output, the generated one or more artificial images of the target object.
    Type: Application
    Filed: August 23, 2019
    Publication date: May 28, 2020
    Inventors: PETER KIM, RYAN QUILLER, JASON R. CHAVES, MARK S. BERLIN, MICHAEL J. SAND
  • Publication number: 20200167593
    Abstract: A dynamic reconfiguration training machine learning computer architecture is disclosed. According to some aspects, a computing machine accesses a configuration file. The configuration file specifies parameters for a machine learning session. The computing machine trains a machine learning module to solve a problem, where the machine learning module operates according to the parameters specified in the configuration file. The computing machine generates an output representing the trained machine learning module.
    Type: Application
    Filed: September 26, 2019
    Publication date: May 28, 2020
    Inventors: Peter Kim, Justin A. Fishbone
  • Patent number: D938318
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: December 14, 2021
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Joonsung Ea, Kengo Iwanaga, Peter Kim
  • Patent number: D938319
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: December 14, 2021
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Kengo Iwanaga, Peter Kim
  • Patent number: D938320
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: December 14, 2021
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Matthew Niven Sperling, Joonsung Ea, Scott Matthew Roller, Peter Kim, Jin Won Kim
  • Patent number: D944120
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: February 22, 2022
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Matthew Niven Sperling, Joonsung Ea, Peter Kim, Kengo Iwanaga, Jin Won Kim