Abstract: A mixed semiconductor-superconductor platform is fabricated in phases. In a masking phase, a dielectric mask is formed on a substrate, such that the dielectric mask leaves one or more regions of the substrate exposed. In a selective area growth phase, a semiconductor material is selectively grown on the substrate in the one or more exposed regions. In a superconductor growth phase, a layer of superconducting material is formed, at least part of which is in direct contact with the selectively grown semiconductor material. The mixed semiconductor-superconductor platform comprises the selectively grown semiconductor material and the superconducting material in direct contact with the selectively grown semiconductor material.

Abstract: A method of forming a thin film of material on a surface of a substrate, the substrate comprising a semiconductor, comprises: depositing a thin film of metal on the surface of the substrate, wherein the deposition is performed in an ultra-high vacuum, and wherein the substrate is at a temperature of less than or equal to 260 K during the deposition. Cooling the substrate during deposition of the thin film of metal may allow for an atomically flat and very uniform thin film to be obtained. Also provided is a device obtainable by the method.

Abstract: A semiconductor device is fabricated by: forming a shadow wall on a substrate; subsequently growing a nanowire of semiconductor material on the substrate; and directionally depositing a layer of a further material on the nanowire from a direction selected such that the shadow wall casts a shadow on the nanowire, the shadow being a region in which the further material is not deposited. The nanowire is vertically orientated relative to the substrate. The shadow wall comprises a base portion and a bridge portion. The bridge portion overhangs the substrate and is supported by the base portion. Patterning of the further material may be achieved without the use of etching, thereby avoiding damage to the semiconductor. Also provided is a semiconductor-superconductor hybrid device; a quantum computing device comprising the semiconductor-superconductor hybrid device; and a shadow wall for controlling directional deposition of a material.

Abstract: A mixed semiconductor-superconductor platform is fabricated in phases. In a masking phase, a dielectric mask is formed on a substrate, such that the dielectric mask leaves one or more regions of the substrate exposed. In a selective area growth phase, a semiconductor material is selectively grown on the substrate in the one or more exposed regions. In a superconductor growth phase, a layer of superconducting material is formed, at least part of which is in direct contact with the selectively grown semiconductor material. The mixed semiconductor-superconductor platform comprises the selectively grown semiconductor material and the superconducting material in direct contact with the selectively grown semiconductor material.

Abstract: A mixed semiconductor-superconductor platform is fabricated in phases. In a masking phase, a dielectric mask is formed on a substrate, such that the dielectric mask leaves one or more regions of the substrate exposed. In a selective area growth phase, a semiconductor material is selectively grown on the substrate in the one or more exposed regions. In a superconductor growth phase, a layer of superconducting material is formed, at least part of which is in direct contact with the selectively grown semiconductor material. The mixed semiconductor-superconductor platform comprises the selectively grown semiconductor material and the superconducting material in direct contact with the selectively grown semiconductor material.

Abstract: A quantum device is fabricated by forming a network of nanowires oriented in a plane of a substrate to produce a Majorana-based topological qubit. The nanowires are formed from combinations of selective-area-grown semiconductor material along with regions of a superconducting material. The selective-area-grown semiconductor material is grown by etching trenches to define the nanowires and depositing the semiconductor material in the trenches. A side gate is formed in an etched trench and situated to control a topological segment of the qubit.

Abstract: A method of fabrication in a vacuum chamber. The method comprises: deploying the wafer within the vacuum chamber; applying a mask in a first position over the wafer in the vacuum chamber; following this, performing a first fabrication step comprising projecting material onto the wafer through the mask while in vacuum in the vacuum chamber; then operating a mask-handling mechanism deployed within the vacuum chamber in order to reposition the mask to a second position while remaining in vacuum in the vacuum chamber, wherein the repositioning comprises receiving readings from one or more sensors sensing a current position of the mask and based thereon aligning the current position of the mask to the second position; and following this repositioning, performing a second fabrication step comprising projecting material onto the wafer through patterned openings in the repositioned mask while still maintaining the vacuum in the vacuum chamber.

Abstract: A semiconductor-ferromagnetic insulator-superconductor hybrid device comprises a semiconductor component, a ferromagnetic insulator component, and a superconductor component. The semiconductor component has at least three facets. The ferromagnetic insulator component is arranged on a first facet and a second facet. The superconductor component is arranged on a third facet and extends over the ferromagnetic insulator component on at least the second facet. The device is useful for generating Majorana zero modes, which are useful for quantum computing. Also provided are a method of fabricating the device, and a method of inducing topological behaviour in the device.

Abstract: According to a first aspect of the disclosure, there is provided a device comprising: a substrate comprising a III-V semiconductor having a crystalline surface; and a kagome lattice formed from atoms of an element with atomic number Z greater than or equal to 14, deposited on said surface of the semiconductor. According to a second aspect there is provided a fabrication method for forming a kagome lattice or other lattice structure such as a honeycomb or Moiré super lattice.

Abstract: A first aspect provides a topological quantum computing device comprising a network of semiconductor-superconductor nanowires, each nanowire comprising a length of semiconductor formed over a substrate and a coating of superconductor formed over at least part of the semiconductor; wherein at least some of the nanowires further comprise a coating of ferromagnetic insulator disposed over at least part of the semiconductor. A second aspect provides a method of fabricating a quantum or spintronic device comprising a heterostructure of semiconductor and ferromagnetic insulator, by: forming a portion of the semiconductor over a substrate in a first vacuum chamber, and growing a coating of the ferromagnetic insulator on the semiconductor by epitaxy in a second vacuum chamber connected to the first vacuum chamber by a vacuum tunnel, wherein the semiconductor comprises InAs and the ferromagnetic insulator comprises EuS.

Abstract: A method for collimating a beam of material being deposited on a substrate at a deposition area of the substrate is disclosed. The substrate is masked with a stencil mask located at a mask distance from the substrate, the mask distance being the distance between a top face of the substrate and an outer face of the mask facing the substrate. The beam is projected from a source cell located at a source distance from the mask, the source distance being the distance between the source cell and an outer face of the mask facing the source cell. The stencil mask comprises two mask layers separated by a layer separation distance which is great than zero. Each mask layer comprises a slit, the slits of the two layers having a width being aligned in a plane of the substrate.

Abstract: Various fabrication method are disclosed. In one such method, at least one structure is formed on a substrate which protrudes outwardly from a plane of the substrate. A beam is used to form a layer of material, at least part of which is in direct contact with a semiconductor structure on the substrate, the semiconductor structure comprising at least one nanowire. The beam has a non-zero angle of incidence relative to the normal of the plane of the substrate such that the beam is incident on one side of the protruding structure, thereby preventing a portion of the nanowire in a shadow region adjacent the other side of the protruding structure in the plane of the substrate from being covered with the material.

Abstract: Various fabrication methods are disclosed. In one such method, at least one structure is formed on a substrate which protrudes outwardly from a plane of the substrate. A beam is used to form a layer of material, at least part of which is in direct contact with a semiconductor structure on the substrate, the semiconductor structure comprising at least one nanowire. The beam has a non-zero angle of incidence relative to the normal of the plane of the substrate such that the beam is incident on one side of the protruding structure, thereby preventing a portion of the nanowire in a shadow region adjacent the other side of the protruding structure in the plane of the substrate from being covered with the material.

Abstract: A device comprising: a portion of semiconductor; a portion of superconductor arranged to a enable a topological phase having a topological gap to be induced in a region of the semiconductor by proximity effect; and a portion of a non-magnetic material comprising an element with atomic number Z greater than or equal to 26, arranged to increase the topological gap in the topological region of the semiconductor.

Abstract: A first aspect provides a topological quantum computing device comprising a network of semiconductor-superconductor nanowires, each nanowire comprising a length of semiconductor formed over a substrate and a coating of superconductor formed over at least part of the semiconductor; wherein at least some of the nanowires further comprise a coating of ferromagnetic insulator disposed over at least part of the semiconductor. A second aspect provides a method of fabricating a quantum or spintronic device comprising a heterostructure of semiconductor and ferromagnetic insulator, by: forming a portion of the semiconductor over a substrate in a first vacuum chamber, and growing a coating of the ferromagnetic insulator on the semiconductor by epitaxy in a second vacuum chamber connected to the first vacuum chamber by a vacuum tunnel, wherein the semiconductor comprises InAs and the ferromagnetic insulator comprises EuS.

Abstract: A device comprising: a portion of semiconductor; a portion of superconductor arranged to a enable a topological phase having a topological gap to be induced in a region of the semiconductor by proximity effect; and a portion of a non-magnetic material comprising an element with atomic number Z greater than or equal to 26, arranged to increase the topological gap in the topological region of the semiconductor.

Abstract: The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.

Abstract: A first aspect provides a topological quantum computing device comprising a network of semiconductor-superconductor nanowires, each nanowire comprising a length of semiconductor formed over a substrate and a coating of superconductor formed over at least part of the semiconductor; wherein at least some of the nanowires further comprise a coating of ferromagnetic insulator disposed over at least part of the semiconductor. A second aspect provides a method of fabricating a quantum or spintronic device comprising a heterostructure of semiconductor and ferromagnetic insulator, by: forming a portion of the semiconductor over a substrate in a first vacuum chamber, and growing a coating of the ferromagnetic insulator on the semiconductor by epitaxy in a second vacuum chamber connected to the first vacuum chamber by a vacuum tunnel, wherein the semiconductor comprises InAs and the ferromagnetic insulator comprises EuS.

Abstract: A method of fabrication in a vacuum chamber. The method comprises: deploying the wafer within the vacuum chamber; applying a mask in a first position over the wafer in the vacuum chamber; following this, performing a first fabrication step comprising projecting material onto the wafer through the mask while in vacuum in the vacuum chamber; then operating a mask-handling mechanism deployed within the vacuum chamber in order to reposition the mask to a second position while remaining in vacuum in the vacuum chamber, wherein the repositioning comprises receiving readings from one or more sensors sensing a current position of the mask and based thereon aligning the current position of the mask to the second position; and following this repositioning, performing a second fabrication step comprising projecting material onto the wafer through patterned openings in the repositioned mask while still maintaining the vacuum in the vacuum chamber.

Abstract: The disclosure concerns fabricating a quantum device. In an embodiment, a method is disclosed comprising: providing a substrate and an insulator formed on the substrate; from combinations of selective-area-grown semiconductor material along with regions of a superconducting material, forming a network of nanowires oriented in a plane of the substrate which can be used to produce a Majorana-based topological qubit; and fabricating a side gate for controlling a topological segment of the qubit; wherein the selective-area-grown semiconductor material is grown on the substrate, by etching trenches in the insulator formed on the substrate to define the nanowires and depositing the semiconductor material in the trenches defining the nanowires; and wherein the fabricating of the side gate comprises etching the dielectric to create a trench for the side gate and depositing the side gate in the trench for the side gate.