Patents by Inventor Peter Krogstrup

Peter Krogstrup has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10720562
    Abstract: The present disclosure relates to nanoscale device comprising an elongated crystalline nanostructure, such as a nanowire crystal, a nanowhisker crystal or a nanorod crystal, and a method for producing thereof. One embodiment relates to a nanoscale device comprising an elongated crystalline semiconductor nanostructure, such as a nanowire (crystal) or nanowhisker (crystal) or nanorod (crystal), having a plurality of substantially plane side facets, a crystalline structured first facet layer of a superconductor material covering at least a part of one or more of said side facets, and a second facet layer of a superconductor material covering at least a part of the first facet layer, the superconductor material of the second facet layer being different from the superconductor material of the first facet layer, wherein the crystalline structure of the semiconductor nanostructure is epitaxially matched with the crystalline structure of the first facet layer on the interface between the two crystalline structures.
    Type: Grant
    Filed: July 10, 2019
    Date of Patent: July 21, 2020
    Assignee: University of Copenhagen
    Inventors: Peter Krogstrup, Thomas Sand Jespersen, Charles M. Marcus, Jesper Nygård
  • Publication number: 20200227636
    Abstract: A first aspect provides a topological quantum computing device comprising a network of semiconductor-superconductor nanowires, each nanowire comprising a length of semiconductor formed over a substrate and a coating of superconductor formed over at least part of the semiconductor; wherein at least some of the nanowires further comprise a coating of ferromagnetic insulator disposed over at least part of the semiconductor. A second aspect provides a method of fabricating a quantum or spintronic device comprising a heterostructure of semiconductor and ferromagnetic insulator, by: forming a portion of the semiconductor over a substrate in a first vacuum chamber, and growing a coating of the ferromagnetic insulator on the semiconductor by epitaxy in a second vacuum chamber connected to the first vacuum chamber by a vacuum tunnel, wherein the semiconductor comprises InAs and the ferromagnetic insulator comprises EuS.
    Type: Application
    Filed: January 11, 2019
    Publication date: July 16, 2020
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Peter Krogstrup Jeppesen, Yu Liu, Alessandra Luchini
  • Patent number: 10692010
    Abstract: The disclosure relates to a quantum device and method of fabricating the same. The device comprises one or more semiconductor-superconductor nanowires, each comprising a length of semiconductor material and a coating of superconductor material coated on the semiconductor material. The nanowires may be formed over a substrate. In a first aspect at least some of the nanowires are full-shell nanowires with superconductor material being coated around a full perimeter of the semiconductor material along some or all of the length of the wire, wherein the device is operable to induce at least one Majorana zero mode, MZM, in one or more active ones of the full-shell nanowires. In a second aspect at least some of the nanowires are arranged vertically relative to the plane of the substrate in the finished device.
    Type: Grant
    Filed: September 3, 2018
    Date of Patent: June 23, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Michael Hartley Freedman, Bernard van Heck, Georg Wolfgang Winkler, Torsten Karzig, Roman Lutchyn, Peter Krogstrup Jeppesen, Chetan Nayak, Charles Masamed Marcus, Saulius Vaitiekenas
  • Publication number: 20200176663
    Abstract: A mixed semiconductor-superconductor platform is fabricated in phases. In a masking phase, a dielectric mask is formed on a substrate, such that the dielectric mask leaves one or more regions of the substrate exposed. In a selective area growth phase, a semiconductor material is selectively grown on the substrate in the one or more exposed regions. in a superconductor growth phase, a layer of superconducting material is formed, at least part of which is in direct contact with the selectively grown semiconductor material. The mixed semiconductor-superconductor platform comprises the selectively grown semiconductor material and the superconducting material in direct contact with the selectively grown semiconductor material.
    Type: Application
    Filed: November 30, 2017
    Publication date: June 4, 2020
    Applicant: Microsoft Technology Licensing, LLC
    Inventor: Peter Krogstrup Jeppesen
  • Patent number: 10669647
    Abstract: The present disclosure relates to a method for producing a network of interconnected nanostructures comprising the steps of: providing a substantially plane substrate; growing a plurality of elongated nanostructures from the substrate; kinking the growth direction of at least a part of the nanostructures such that at least part of the kinked nanostructures are growing in a network plane parallel to the substrate, and creating one or more network(s) of interconnected kinked nanostructures in the network plane, wherein a dielectric support layer is provided below the network plane to support said network(s) of interconnected nanostructures.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: June 2, 2020
    Assignee: University of Copenhagen
    Inventors: Peter Krogstrup, Charles Marcus, Thomas Sand Jespersen, Jesper Nygård
  • Patent number: 10665701
    Abstract: The disclosure relates to a quantum device and method of fabricating the same. The device comprises one or more semiconductor-superconductor nanowires, each comprising a length of semiconductor material and a coating of superconductor material coated on the semiconductor material. The nanowires may be formed over a substrate. In a first aspect at least some of the nanowires are full-shell nanowires with superconductor material being coated around a full perimeter of the semiconductor material along some or all of the length of the wire, wherein the device is operable to induce at least one Majorana zero mode, MZM, in one or more active ones of the full-shell nanowires. In a second aspect at least some of the nanowires are arranged vertically relative to the plane of the substrate in the finished device.
    Type: Grant
    Filed: September 3, 2018
    Date of Patent: May 26, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Michael Hartley Freedman, Bernard van Heck, Georg Wolfgang Winkler, Torsten Karzig, Roman Lutchyn, Peter Krogstrup Jeppesen, Chetan Nayak, Charles Masamed Marcus, Saulius Vaitiekėnas
  • Publication number: 20200027919
    Abstract: Various fabrication method are disclosed. In one such method, at least one structure is formed on a substrate which protrudes outwardly from a plane of the substrate. A beam is used to form a layer of material, at least part of which is in direct contact with a semiconductor structure on the substrate, the semiconductor structure comprising at least one nanowire. The beam has a non-zero angle of incidence relative to the normal of the plane of the substrate such that the beam is incident on one side of the protruding structure, thereby preventing a portion of the nanowire in a shadow region adjacent the other side of the protruding structure in the plane of the substrate from being covered with the material.
    Type: Application
    Filed: October 26, 2018
    Publication date: January 23, 2020
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Kevin Van Hoogdalem, Leonardus Kouwenhoven, Pavel Aseev, Peter Krogstrup Jeppesen
  • Publication number: 20200027030
    Abstract: The disclosure relates to a quantum device and method of fabricating the same. The device comprises one or more semiconductor-superconductor nanowires, each comprising a length of semiconductor material and a coating of superconductor material coated on the semiconductor material. The nanowires may be formed over a substrate. In a first aspect at least some of the nanowires are full-shell nanowires with superconductor material being coated around a full perimeter of the semiconductor material along some or all of the length of the wire, wherein the device is operable to induce at least one Majorana zero mode, MZM, in one or more active ones of the full-shell nanowires. In a second aspect at least some of the nanowires are arranged vertically relative to the plane of the substrate in the finished device.
    Type: Application
    Filed: September 3, 2018
    Publication date: January 23, 2020
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Michael Hartley Freedman, Bernard van Heck, Georg Wolfgang Winkler, Torsten Karzig, Roman Lutchyn, Peter Krogstrup Jeppesen, Chetan Nayak, Charles Masamed Marcus, Saulius Vaitiekenas
  • Publication number: 20200027971
    Abstract: The disclosure relates to a quantum device and method of fabricating the same. The device comprises one or more semiconductor-superconductor nanowires, each comprising a length of semiconductor material and a coating of superconductor material coated on the semiconductor material. The nanowires may be formed over a substrate. In a first aspect at least some of the nanowires are full-shell nanowires with superconductor material being coated around a full perimeter of the semiconductor material along some or all of the length of the wire, wherein the device is operable to induce at least one Majorana zero mode, MZM, in one or more active ones of the full-shell nanowires. In a second aspect at least some of the nanowires are arranged vertically relative to the plane of the substrate in the finished device.
    Type: Application
    Filed: September 3, 2018
    Publication date: January 23, 2020
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Michael Hartley Freedman, Bernard van Heck, Georg Wolfgang Winkler, Torsten Karzig, Roman Lutchyn, Peter Krogstrup Jeppesen, Chetan Nayak, Charles Masamed Marcus, Saulius Vaitiekenas
  • Publication number: 20190363237
    Abstract: The present disclosure relates to nanoscale device comprising an elongated crystalline nanostructure, such as a nanowire crystal, a nanowhisker crystal or a nanorod crystal, and a method for producing thereof. One embodiment relates to a nanoscale device comprising an elongated crystalline semiconductor nanostructure, such as a nanowire (crystal) or nanowhisker (crystal) or nanorod (crystal), having a plurality of substantially plane side facets, a crystalline structured first facet layer of a superconductor material covering at least a part of one or more of said side facets, and a second facet layer of a superconductor material covering at least a part of the first facet layer, the superconductor material of the second facet layer being different from the superconductor material of the first facet layer, wherein the crystalline structure of the semiconductor nanostructure is epitaxially matched with the crystalline structure of the first facet layer on the interface between the two crystalline structures.
    Type: Application
    Filed: July 10, 2019
    Publication date: November 28, 2019
    Inventors: Peter Krogstrup, Thomas Sand Jespersen, Charles M. Marcus, Jesper Nygård
  • Publication number: 20190273196
    Abstract: The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.
    Type: Application
    Filed: January 7, 2019
    Publication date: September 5, 2019
    Inventors: Charles M. Marcus, Peter Krogstrup, Thomas Sand Jespersen, Jesper Nygård, Karl Petersson, Thorvald Larsen, Ferdinand Kuemmeth
  • Patent number: 10403809
    Abstract: The present disclosure relates to a device and method for forming efficient quantum devices, in particular quantum devices that have not been contaminated in ex-situ processes. In particular the presently disclosed method can be applied for manufacturing of a Josephson junction which is an element in a tunable superconducting qubit.
    Type: Grant
    Filed: March 7, 2017
    Date of Patent: September 3, 2019
    Assignee: University of Copenhagen
    Inventors: Peter Krogstrup, Charles M. Marcus
  • Patent number: 10367132
    Abstract: The present disclosure relates to nanoscale device comprising an elongated crystalline nanostructure, such as a nanowire crystal, a nanowhisker crystal or a nanorod crystal, and a method for producing thereof. One embodiment relates to a nanoscale device comprising an elongated crystalline semiconductor nanostructure, such as a nanowire (crystal) or nanowhisker (crystal) or nanorod (crystal), having a plurality of substantially plane side facets, a crystalline structured first facet layer of a superconductor material covering at least a part of one or more of said side facets, and a second facet layer of a superconductor material covering at least a part of the first facet layer, the superconductor material of the second facet layer being different from the superconductor material of the first facet layer, wherein the crystalline structure of the semiconductor nanostructure is epitaxially matched with the crystalline structure of the first facet layer on the interface between the two crystalline structures.
    Type: Grant
    Filed: July 2, 2015
    Date of Patent: July 30, 2019
    Assignee: University of Copenhagen
    Inventors: Peter Krogstrup, Thomas Sand Jespersen, Charles M. Marcus, Jesper Nygård
  • Publication number: 20190131513
    Abstract: The present disclosure relates to a device and method for forming efficient quantum devices, in particular quantum devices that have not been contaminated in ex-situ processes. In particular the presently disclosed method can be applied for manufacturing of a Josephson junction which is an element in a tunable superconducting qubit.
    Type: Application
    Filed: March 7, 2017
    Publication date: May 2, 2019
    Inventors: Peter Krogstrup, Charles M. Marcus
  • Patent number: 10177297
    Abstract: The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: January 8, 2019
    Assignee: University of Copenhagen
    Inventors: Charles M. Marcus, Peter Krogstrup, Thomas Sand Jespersen, Jesper Nygård, Karl Petersson, Thorvald Larsen, Ferdinand Kuemmeth
  • Publication number: 20180195201
    Abstract: The present disclosure relates to a method for producing a network of interconnected nanostructures comprising the steps of: providing a substantially plane substrate; growing a plurality of elongated nanostructures from the substrate; kinking the growth direction of at least a part of the nanostructures such that at least part of the kinked nanostructures are growing in a network plane parallel to the substrate, and creating one or more network(s) of interconnected kinked nanostructures in the network plane, wherein a dielectric support layer is provided below the network plane to support said network(s) of interconnected nanostructures.
    Type: Application
    Filed: June 27, 2016
    Publication date: July 12, 2018
    Inventors: Peter Krogstrup, Charles Marcus, Thomas Sand Jespersen, Jesper Nygård
  • Publication number: 20170141285
    Abstract: The present disclosure relates to nanoscale device comprising an elongated crystalline nanostructure, such as a nanowire crystal, a nanowhisker crystal or a nanorod crystal, and a method for producing thereof. One embodiment relates to a nanoscale device comprising an elongated crystalline semiconductor nanostructure, such as a nanowire (crystal) or nanowhisker (crystal) or nanorod (crystal), having a plurality of substantially plane side facets, a crystalline structured first facet layer of a superconductor material covering at least a part of one or more of said side facets, and a second facet layer of a superconductor material covering at least a part of the first facet layer, the superconductor material of the second facet layer being different from the superconductor material of the first facet layer, wherein the crystalline structure of the semiconductor nanostructure is epitaxially matched with the crystalline structure of the first facet layer on the interface between the two crystalline structures.
    Type: Application
    Filed: July 2, 2015
    Publication date: May 18, 2017
    Inventors: Peter Krogstrup, Thomas Sand Jespersen, Charles M. Marcus, Jesper Nygård
  • Publication number: 20170133576
    Abstract: The present disclosure relates to semiconductor based Josephson junctions and their applications within the field of quantum computing, in particular a tuneable Josephson junction device has been used to construct a gateable transmon qubit. One embodiment relates to a Josephson junction comprising an elongated hybrid nanostructure comprising superconductor and semiconductor materials and a weak link, wherein the weak link is formed by a semiconductor segment of the elongated hybrid nanostructure wherein the superconductor material has been removed to provide a semiconductor weak link.
    Type: Application
    Filed: March 4, 2015
    Publication date: May 11, 2017
    Inventors: Charles M. Marcus, Peter Krogstrup, Thomas Sand Jespersen, Jesper Nygård, Karl Petersson, Thorvald Larsen, Ferdinand Kuemmeth