Patents by Inventor Peter Lin

Peter Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10234500
    Abstract: A method and apparatus for separating real DVC via defects from nuisance based on Net Tracing Classification of eBeam VC die comparison inspection results are provided. Embodiments include performing an eBeam VC die comparison inspection on each via of a plurality of dies; determining DVC vias based on the comparison; performing a Net Tracing Classification on the DVC vias; determining S/D DVC vias based on the Net Tracing Classification; and performing a die repeater analysis on the S/D DVC vias to determine systematic design-related DVC via defects.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: March 19, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Weihong Gao, Xuefeng Zeng, Yan Pan, Peter Lin, Hoang Nguyen, Ho Young Song
  • Publication number: 20180284184
    Abstract: A method in which connectivity tests of integrated circuit structures in a die are performed. The connectivity tests are performed at a first level of the die. Potential defect locations are identified in the die indicating via locations susceptible to systematic failure due to via opens or via shorts. The potential defect locations are translated to via locations for a second level of the die. The second level is below the first level. After translating the hot spot, the second level is inspected for defects. The via locations on the first level are inspected for defects. All defects for the second level are translated to the via locations for the first level. A net trace of defects is created using prior level subtraction of the translated defects for the second level and the defects for the first level.
    Type: Application
    Filed: March 30, 2017
    Publication date: October 4, 2018
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: OLIVER D. PATTERSON, PETER LIN, WEIHONG GAO
  • Patent number: 10060016
    Abstract: Polycrystalline materials are prepared by electrodeposition of a precursor material that is subsequently heat-treated to induce at least a threefold increase in the grain size of the material to yield a relatively high fraction of ‘special’ low ? grain boundaries and a randomized crystallographic texture. The precursor metallic material has sufficient purity and a fine-grained microstructure (e.g., an average grain size of 4 nm to 5 ?m). The resulting metallic material is suited to the fabrication of articles requiring high mechanical or physical isotropy and/or resistance to grain boundary-mediated deformation or degradation mechanisms.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: August 28, 2018
    Assignee: INTEGRAN TECHNOLOGIES INC.
    Inventors: Gino Palumbo, Iain Brooks, Klaus Tomantschger, Peter Lin, Karl Aust, Nandakumar Nagarajan, Francisco Gonzalez
  • Publication number: 20180076320
    Abstract: A planar gate power MOSFET includes a substrate having a semiconductor surface doped a first conductivity type, a plurality of transistor cells (cells) including a first cell and at least a second cell each having a gate stack over a body region. A trench has an aspect ratio of >3 extending down from a top side of the semiconductor surface between the gate stacks providing a source contact (SCT) from a source doped a second conductivity type to the substrate. A field plate (FP) is over the gate stacks that provides a liner for the trench. The trench has a refractory metal or platinum-group metal (PGM) metal filler within. A drain doped the second conductivity type is in the semiconductor surface on a side of the gate stacks opposite the trench.
    Type: Application
    Filed: November 20, 2017
    Publication date: March 15, 2018
    Inventors: FUREN LIN, FRANK BAIOCCHI, YUNLONG LIU, LARK LIU, TIANPING LV, PETER LIN, HO LIN
  • Patent number: 9853144
    Abstract: A planar gate power MOSFET includes a substrate having a semiconductor surface doped a first conductivity type, a plurality of transistor cells (cells) including a first cell and at least a second cell each having a gate stack over a body region. A trench has an aspect ratio of >3 extending down from a top side of the semiconductor surface between the gate stacks providing a source contact (SCT) from a source doped a second conductivity type to the substrate. A field plate (FP) is over the gate stacks that provides a liner for the trench. The trench has a refractory metal or platinum-group metal (PGM) metal filler within. A drain doped the second conductivity type is in the semiconductor surface on a side of the gate stacks opposite the trench.
    Type: Grant
    Filed: June 2, 2016
    Date of Patent: December 26, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Furen Lin, Frank Baiocchi, Yunlong Liu, Lark Liu, Tianping Lv, Peter Lin, Ho Lin
  • Publication number: 20170207335
    Abstract: A planar gate power MOSFET includes a substrate having a semiconductor surface doped a first conductivity type, a plurality of transistor cells (cells) including a first cell and at least a second cell each having a gate stack over a body region. A trench has an aspect ratio of >3 extending down from a top side of the semiconductor surface between the gate stacks providing a source contact (SCT) from a source doped a second conductivity type to the substrate. A field plate (FP) is over the gate stacks that provides a liner for the trench. The trench has a refractory metal or platinum-group metal (PGM) metal filler within. A drain doped the second conductivity type is in the semiconductor surface on a side of the gate stacks opposite the trench.
    Type: Application
    Filed: June 2, 2016
    Publication date: July 20, 2017
    Inventors: FUREN LIN, FRANK BAIOCCHI, YUNLONG LIU, LARK LIU, TIANPING LV, PETER LIN, HO LIN
  • Patent number: 9639702
    Abstract: A method for calculating a partial risk score for a data object may include identifying a request to calculate a partial risk score for a data object, the request including a partial risk score filter, and the data object being associated with one or more policies. The method may further include for each policy associated with the data object, determining whether characteristics associated with the policy match a parameter in the partial risk score filter, and when the characteristics associated with the policy match information in the partial risk score filter, including a data object risk score associated with the policy in the partial risk score for the data object.
    Type: Grant
    Filed: July 2, 2015
    Date of Patent: May 2, 2017
    Assignee: Symantec Corporation
    Inventors: Adam Jackson, Peter Lin, Jeremy Mailen
  • Publication number: 20160306009
    Abstract: A method and apparatus for separating real DVC via defects from nuisance based on Net Tracing Classification of eBeam VC die comparison inspection results are provided. Embodiments include performing an eBeam VC die comparison inspection on each via of a plurality of dies; determining DVC vias based on the comparison; performing a Net Tracing Classification on the DVC vias; determining S/D DVC vias based on the Net Tracing Classification; and performing a die repeater analysis on the S/D DVC vias to determine systematic design-related DVC via defects.
    Type: Application
    Filed: April 17, 2015
    Publication date: October 20, 2016
    Inventors: Weihong GAO, Xuefeng ZENG, Yan PAN, Peter LIN, Hoang NGUYEN, Ho Young SONG
  • Publication number: 20160208369
    Abstract: Polycrystalline materials are prepared by electrodeposition of a precursor material that is subsequently heat-treated to induce at least a threefold increase in the grain size of the material to yield a relatively high fraction of ‘special’ low ? grain boundaries and a randomized crystallographic texture. The precursor metallic material has sufficient purity and a fine-grained microstructure (e.g., an average grain size of 4 nm to 5 pm). The resulting metallic material is suited to the fabrication of articles requiring high mechanical or physical isotropy and/or resistance to grain boundary-mediated deformation or degradation mechanisms.
    Type: Application
    Filed: January 21, 2016
    Publication date: July 21, 2016
    Applicant: INTEGRAN TECHNOLOGIES INC.
    Inventors: Gino PALUMBO, Iain BROOKS, Klaus TOMANTSCHGER, Peter LIN, Karl AUST, Nandakumar NAGARAJAN, Francisco GONZALEZ
  • Patent number: 9260790
    Abstract: Polycrystalline materials are prepared by electrodeposition of a precursor material that is subsequently heat-treated to induce at least a threefold increase in the grain size of the material to yield a relatively high fraction of ‘special’ low ? grain boundaries and a randomized crystallographic texture. The precursor metallic material has sufficient purity and a fine-grained microstructure (e.g., an average grain size of 4 nm to 5 ?m). The resulting metallic material is suited to the fabrication of articles requiring high mechanical or physical isotropy and/or resistance to grain boundary-mediated deformation or degradation mechanisms.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: February 16, 2016
    Assignee: INTEGRAN TECHNOLOGIES INC.
    Inventors: Gino Palumbo, Iain Brooks, Klaus Tomantschger, Peter Lin, Karl Aust, Nandakumar Nagarajan, Francisco Gonzalez
  • Patent number: 9094291
    Abstract: A method for calculating a partial risk score for a data object may include identifying a request to calculate a partial risk score for a data object, the request including a partial risk score filter, and the data object being associated with one or more policies. The method may further include for each policy associated with the data object, determining whether characteristics associated with the policy match a parameter in the partial risk score filter, and when the characteristics associated with the policy match information in the partial risk score filter, including a data object risk score associated with the policy in the partial risk score for the data object.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: July 28, 2015
    Assignee: Symantec Corporation
    Inventors: Adam Jackson, Peter Lin, Jeremy Mallen
  • Patent number: 8744411
    Abstract: A method for informing mobile stations in a geographic area of an important message is provided. The method includes identifying a geographic area, or zone, comprising at least one base station associated with a cell. A standard registration message associated with each cell in the zone is modified, which modifying results in a modified registration message with a command that is directed towards instructing mobile stations (MSs) that are already registered in the zone to re-register with the zone. The modified registration message then is broadcast from the base station. In response to the transmitting of the modified registration message, the method performs a processing of registration request messages sent from each of the MSs to the base station. In response to the processing, an acknowledge registration message is transmitted to each of the MSs, which acknowledge registration message includes data informing each of the MSs of the important message.
    Type: Grant
    Filed: September 8, 2008
    Date of Patent: June 3, 2014
    Assignee: Motorola Mobility LLC
    Inventors: John M. Harris, Peter Lin
  • Patent number: 8675486
    Abstract: An approach for providing flow control in a radio communication system is disclosed. A request from a non-satellite system specific side of a transport interface is made to a system specific side of the transport interface for a flow control allocation that specifies an amount of data to be stored in a queue of the system specific side of the transport interface. The system specific side supports a signaling function that is based on a transmission characteristic of the radio communication system. The flow control allocation is generated based upon availability of the queue, wherein the destination address is a link layer address of the satellite communication system. This arrangement has particular applicability to a satellite network (e.g., Very Small Aperture Terminal (VSAT) network) that provides data communication services.
    Type: Grant
    Filed: May 17, 2005
    Date of Patent: March 18, 2014
    Assignee: Hughes Network Systems, LLC
    Inventors: Daniel Friedman, Robert Torres, Patrick Stevens, Craig Schweinhart, Mangala Kannan, Deepak Arur, Peter Lin, Matthew Butehorn, Ken Burrell
  • Patent number: 8618144
    Abstract: The present invention provides compounds of Formula (I), pharmaceutical compositions thereof, and method of using the same in the treatment or prevention of diseases mediated by the activation of ?3-adrenoceptor.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: December 31, 2013
    Assignee: Merck Sharp & Dohme Corp
    Inventors: Peter Lin, Lehua Chang, Scott D. Edmondson
  • Patent number: 8544957
    Abstract: A chair includes a supporting structure, a seat moveably mounted on the supporting structure and moveable with respect to the supporting structure in a vertical direction, and a backrest including a first frame pivotally connected to the seat and a second frame separate from and pivotally mounted on the first frame to connect to the seat. Further, a first control device is mounted and concealed between the first and second frames in order to prevent the user from inadvertently colliding with it. The first control device is adjusted for various relative pivotal positions of the first and second frames.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: October 1, 2013
    Inventor: Peter Lin
  • Publication number: 20130062495
    Abstract: An office chair foot base providing to support an office chair has a top end disposed towards the office chair, and a bottom end disposed opposite to the top end towards the ground. The office chair foot base comprises a main boy and a plurality of legs. The main boy includes an interior wall formed circularly and a connecting portion connecting to the interior wall at the bottom end. The plurality of legs formed radially extending opposite to the interior wall to a radial extent. Each of the plurality of legs includes a joining portion formed at the bottom end. The joining portion connects with the connecting portion.
    Type: Application
    Filed: September 13, 2011
    Publication date: March 14, 2013
    Inventor: Peter Lin
  • Patent number: 8232402
    Abstract: Novel quinolinone farnesyl transferase inhibitors are provided. These new compounds are useful in the treatment or prevention of synucleinopathies, such as Parkinson's Disease, Diffuse Lewy Body Disease, multiple system atrophy, and disorders of brain iron concentration including pantothenate kinase-associated neurodegeneration (e.g., PANK1), or other neurodegenerative/neurological diseases. Provided compounds are also useful in the treatment of proliferative diseases such as cancer, and in the treatment of neurological diseases, such as cognitive impairment, depression, and anxiety. The treatment including administering to a subject a therapeutically effective amount of an inventive farnesyl transferase inhibitor compound.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: July 31, 2012
    Assignee: Link Medicine Corporation
    Inventors: Peter T. Lansbury, Jr., Craig J. Justman, Ross A. Fredenburg, Robin Kate Meray, Mark E. Duggan, Peter Lin
  • Publication number: 20120053181
    Abstract: The present invention provides compounds of Formula (I), pharmaceutical compositions thereof, and method of using the same in the treatment or prevention of diseases mediated by the activation of ?3-adrenoceptor.
    Type: Application
    Filed: April 28, 2010
    Publication date: March 1, 2012
    Applicant: Merck Sharp & Dohme, Corp.
    Inventors: Peter Lin, Lehua Chang, Scott D. Edmondson
  • Publication number: 20120025575
    Abstract: A chair includes a supporting structure, a seat moveably mounted on the supporting structure and being moveable with respect to the supporting structure in a vertical direction, and a backrest including a first frame pivotally connected to the seat and a second frame separate from and pivotally mounted on the first frame so as to connect to the seat. Further, a first control device is mounted and concealed between the first and second frames in order to prevent the user from inadvertently colliding with it. The first control device is adjusted for various relative pivotal positions of first and second frames.
    Type: Application
    Filed: October 7, 2010
    Publication date: February 2, 2012
    Inventor: Peter Lin
  • Publication number: 20100307642
    Abstract: Polycrystalline materials are prepared by electrodeposition of a precursor material that is subsequently heat-treated to induce at least a threefold increase in the grain size of the material to yield a relatively high fraction of ‘special’ low ? grain boundaries and a randomized crystallographic texture. The precursor metallic material has sufficient purity and a fine-grained microstructure (e.g., an average grain size of 4 nm to 5 ?m). The resulting metallic material is suited to the fabrication of articles requiring high mechanical or physical isotropy and/or resistance to grain boundary-mediated deformation or degradation mechanisms.
    Type: Application
    Filed: December 18, 2008
    Publication date: December 9, 2010
    Applicant: INTEGRAN TECHNOLOGIES, INC.
    Inventors: Gino Palumbo, Iain Brooks, Klaus Tomantschger, Peter Lin, Karl Aust, Nandakumar Nagarajan, Francisco Gonzalez