Patents by Inventor Peter M. Pani

Peter M. Pani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8981814
    Abstract: In one embodiment, the integrated circuit has a L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors. The integrated circuit can be used in electronic devices, such as switching networks, routers, and programmable logic circuits, etc.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: March 17, 2015
    Assignee: Advantage Logic, Inc.
    Inventors: Peter M. Pani, Benjamin S. Ting
  • Patent number: 8698519
    Abstract: A L-level permutable switching network (L-PSN) having switches and multiple levels of conductors that are used to connect a first plurality of conductors to other multiple sets of conductors within respective interconnect resources constraints. The L-PSN can be applied in a wide range of applications, in tandem or hierarchically, to provide a large switch network used in network, routers, and programmable logic circuits. The L-PSN is used to connect a first set of conductors, through the L-PSN, to multiple sets of conductors in a given logic circuit hierarchy whereby the conductors in each of the multiple sets are equivalent or exchangeable, which in term, by construction, makes the first set of conductors equivalent when used in the next level of circuit hierarchy. The L-PSN is scalable for large sized sets of conductors and can be used in tandem or hierarchically to enable programmable interconnections among large sized circuits.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: April 15, 2014
    Assignee: Advantage Logic, Inc.
    Inventors: Peter M. Pani, Benjamin S. Ting
  • Publication number: 20130257478
    Abstract: In one embodiment, the integrated circuit has a L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors. The integrated circuit can be used in electronic devices, such as switching networks, routers, and programmable logic circuits, etc.
    Type: Application
    Filed: May 29, 2013
    Publication date: October 3, 2013
    Inventors: Peter M. Pani, Benjamin S. Ting
  • Patent number: 8456192
    Abstract: In one embodiment, the integrated circuit has a L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors. The integrated circuit can be used in electronic devices, such as switching networks, routers, and programmable logic circuits, etc.
    Type: Grant
    Filed: January 3, 2012
    Date of Patent: June 4, 2013
    Assignee: Advantage Logic, Inc.
    Inventors: Peter M. Pani, Benjamin S. Ting
  • Publication number: 20130097569
    Abstract: A routing fabric using multiple levels of switching networks along with associated routing matrices to allow for better interconnection or routing path among logic modules or routing modules compared with those in the conventional designs. The resulting routing fabric can be used in electronic devices, such as switching networks, routers, and programmable logic circuits, etc.
    Type: Application
    Filed: December 4, 2012
    Publication date: April 18, 2013
    Inventors: Peter M. Pani, Benjamin S. Ting
  • Patent number: 8395415
    Abstract: An integrated circuit having an L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors and (L+2) levels of conductors for L at least equal to one. At least an (i?1)-th level of conductors of the L-PSN comprising Ii?1 number of conductors selectively couple to the i-th level of conductors comprising Ii number of conductors which comprise of D[i] sets of conductors in the L-PSN, where i is selected from [1:L+1], through ((Ii?1×D[i])+Ii) number of switches where each conductor of the Ii?1 number of conductors selectively couples to at least (D[i]+1) number of conductors of the Ii number of conductors, at least one conductor from each of the D[i] sets of conductors, for D[i] greater than one. The integrated circuit can be used in various electronic devices.
    Type: Grant
    Filed: July 8, 2011
    Date of Patent: March 12, 2013
    Assignee: Advantage Logic, Inc.
    Inventors: Benjamin S. Ting, Peter M. Pani
  • Patent number: 8341580
    Abstract: A routing fabric using multiple levels of switching networks along with associated routing matrices to allow a more uniform and shorter interconnection or routing path among logic modules or routing modules compared with those in the conventional designs. The resulting routing fabric can be used in electronic devices, such as switching networks, routers, and programmable logic circuits, etc.
    Type: Grant
    Filed: September 28, 2009
    Date of Patent: December 25, 2012
    Assignee: Advantage Logic, Inc.
    Inventors: Peter M Pani, Benjamin S. Ting
  • Publication number: 20120280712
    Abstract: A L-level permutable switching network (L-PSN) having switches and multiple levels of conductors that are used to connect a first plurality of conductors to other multiple sets of conductors within respective interconnect resources constraints. The L-PSN can be applied in a wide range of applications, in tandem or hierarchically, to provide a large switch network used in network, routers, and programmable logic circuits. The L-PSN is used to connect a first set of conductors, through the L-PSN, to multiple sets of conductors in a given logic circuit hierarchy whereby the conductors in each of the multiple sets are equivalent or exchangeable, which in term, by construction, makes the first set of conductors equivalent when used in the next level of circuit hierarchy. The L-PSN is scalable for large sized sets of conductors and can be used in tandem or hierarchically to enable programmable interconnections among large sized circuits.
    Type: Application
    Filed: July 17, 2012
    Publication date: November 8, 2012
    Inventors: Peter M. Pani, Benjamin S. Ting
  • Patent number: 8242807
    Abstract: A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect a first plurality of conductors to other multiple sets of conductors in a generally unrestricted fashion within respective interconnect resources constraints. The SN can be applied in a wide range of applications, in tandem or hierarchically, to provide a large switch network used in network, routers, and programmable logic circuits. The SN is used to connect a first set of conductors, through the SN, to multiple sets of conductors in a given logic circuit hierarchy whereby the conductors in each of the multiple sets are equivalent or exchangeable, which in term, by construction, makes the first set of conductors equivalent when used in the next level of circuit hierarchy. The SN is scalable for large sized sets of conductors and can be used hierarchically to enable programmable interconnections among large sized circuits.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: August 14, 2012
    Assignee: Advantage Logic, Inc.
    Inventors: Peter M. Pani, Benjamin S. Ting
  • Publication number: 20120105104
    Abstract: In one embodiment, the integrated circuit has a L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors. The integrated circuit can be used in electronic devices, such as switching networks, routers, and programmable logic circuits, etc.
    Type: Application
    Filed: January 3, 2012
    Publication date: May 3, 2012
    Inventors: Peter M. Pani, Benjamin S. Ting
  • Patent number: 8106682
    Abstract: In one embodiment, the integrated circuit has a L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors. The integrated circuit can be used in electronic devices, such as switching networks, routers, and programmable logic circuits, etc.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: January 31, 2012
    Assignee: Advantage Logic, Inc.
    Inventors: Peter M. Pani, Benjamin S. Ting
  • Publication number: 20110267104
    Abstract: An integrated circuit having an L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors and (L+2) levels of conductors for L at least equal to one. At least an (i?1)-th level of conductors of the L-PSN comprising Li?1 number of conductors selectively couple to the i-th level of conductors comprising Ii number of conductors which comprise of D[i] sets of conductors in the L-PSN, where i is selected from [1:L+1], through ((Ii?1×D[i])+Ii) number of switches where each conductor of the Li?1 number of conductors selectively couples to at least (D[i]+1) number of conductors of the Ii number of conductors, at least one conductor from each of the D[i] sets of conductors, for D[i] greater than one. The integrated circuit can be used in various electronic devices.
    Type: Application
    Filed: July 8, 2011
    Publication date: November 3, 2011
    Inventors: Benjamin S. Ting, Peter M. Pani
  • Publication number: 20110248744
    Abstract: A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect a first plurality of conductors to other multiple sets of conductors in a generally unrestricted fashion within respective interconnect resources constraints. The SN can be applied in a wide range of applications, in tandem or hierarchically, to provide a large switch network used in network, routers, and programmable logic circuits. The SN is used to connect a first set of conductors, through the SN, to multiple sets of conductors in a given logic circuit hierarchy whereby the conductors in each of the multiple sets are equivalent or exchangeable, which in term, by construction, makes the first set of conductors equivalent when used in the next level of circuit hierarchy. The SN is scalable for large sized sets of conductors and can be used hierarchically to enable programmable interconnections among large sized circuits.
    Type: Application
    Filed: June 21, 2011
    Publication date: October 13, 2011
    Inventors: Peter M. Pani, Benjamin S. Ting
  • Patent number: 7999570
    Abstract: In one embodiment, an integrated circuit has an L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors and (L+2) levels of conductors for L at least equal to one. An (i?1)-th level of conductors comprising Ii?1 number of conductors selectively couple to the i-th level of conductors comprising Ii number of conductors which comprise of D[i] sets of conductors in the L-PSN, where i is selected from [1:L+1], through ((Ii?1×D[i])+Ii×Q) number of switches where each conductor of the Ii?1 number of conductors selectively couples to at least (D[i]+Q) number of conductors of the Ii number of conductors, at least one conductor from each of the D[i] sets of conductors, for Q at least equal to one and D[i] greater than one. The integrated circuit can be used in various electronic devices.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: August 16, 2011
    Assignee: Advantage Logic, Inc.
    Inventors: Benjamin S. Ting, Peter M. Pani
  • Patent number: 7986163
    Abstract: A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect a first plurality of conductors to other multiple sets of conductors in a generally unrestricted fashion within respective interconnect resources constraints. The SN can be applied in a wide range of applications, in tandem or hierarchically, to provide a large switch network used in network, routers, and programmable logic circuits. The SN is used to connect a first set of conductors, through the SN, to multiple sets of conductors in a given logic circuit hierarchy whereby the conductors in each of the multiple sets are equivalent or exchangeable, which in term, by construction, makes the first set of conductors equivalent when used in the next level of circuit hierarchy. The SN is scalable for large sized sets of conductors and can be used hierarchically to enable programmable interconnections among large sized circuits.
    Type: Grant
    Filed: November 29, 2010
    Date of Patent: July 26, 2011
    Assignee: Advantage Logic, Inc.
    Inventors: Peter M. Pani, Benjamin S. Ting
  • Publication number: 20110089972
    Abstract: A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect a first plurality of conductors to other multiple sets of conductors in a generally unrestricted fashion within respective interconnect resources constraints. The SN can be applied in a wide range of applications, in tandem or hierarchically, to provide a large switch network used in network, routers, and programmable logic circuits. The SN is used to connect a first set of conductors, through the SN, to multiple sets of conductors in a given logic circuit hierarchy whereby the conductors in each of the multiple sets are equivalent or exchangeable, which in term, by construction, makes the first set of conductors equivalent when used in the next level of circuit hierarchy. The SN is scalable for large sized sets of conductors and can be used hierarchically to enable programmable interconnections among large sized circuits.
    Type: Application
    Filed: November 29, 2010
    Publication date: April 21, 2011
    Inventors: Peter M. Pani, Benjamin S. Ting
  • Publication number: 20110084728
    Abstract: In one embodiment, the integrated circuit has a L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors. The integrated circuit can be used in electronic devices, such as switching networks, routers, and programmable logic circuits, etc.
    Type: Application
    Filed: December 15, 2010
    Publication date: April 14, 2011
    Inventors: Peter M. Pani, Benjamin S. Ting
  • Publication number: 20110078648
    Abstract: A routing fabric using multiple levels of switching networks along with associated routing matrices to allow a more uniform and shorter interconnection or routing path among logic modules or routing modules compared with those in the conventional designs. The resulting routing fabric can be used in electronic devices, such as switching networks, routers, and programmable logic circuits, etc.
    Type: Application
    Filed: September 28, 2009
    Publication date: March 31, 2011
    Applicant: ADVANTAGE LOGIC, INC.
    Inventors: Peter M. Pani, Benjamin S. Ting
  • Patent number: 7915918
    Abstract: An integrated circuit including a programmable logic array with a plurality of logic cells and programmable interconnections to receive input signals and to perform logical functions to transmit output signals. The integrated circuit may also include megacells comprising a plurality of functional blocks receiving inputs and transmitting outputs. The integrated circuit may also include a programmable interconnections subsystem to cascade the megacells. The megacells are coupled to the programmable logic array.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: March 29, 2011
    Assignee: Actel Corporation
    Inventors: Peter M. Pani, Benjamin S. Ting
  • Publication number: 20110043248
    Abstract: An integrated circuit including a programmable logic array with a plurality of logic cells and programmable interconnections to receive input signals and to perform logical functions to transmit output signals. The integrated circuit may also include megacells comprising a plurality of functional blocks receiving inputs and transmitting outputs. The integrated circuit may also include a programmable interconnections subsystem to cascade the megacells. The megacells are coupled to the programmable logic array.
    Type: Application
    Filed: October 29, 2010
    Publication date: February 24, 2011
    Inventors: Peter M. Pani, Benjamin S. Ting