Patents by Inventor Peter Mayer
Peter Mayer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240326328Abstract: Additive manufacturing apparatuses, components of additive manufacturing apparatuses, and methods of using such manufacturing apparatuses and components are disclosed. An additive manufacturing apparatus may include a recoat head for distributing build material in a build area, a print head for depositing material in the build area, one or more actuators for moving the recoat head and the print head relative to the build area, and a cleaning station for cleaning the print head.Type: ApplicationFiled: June 10, 2024Publication date: October 3, 2024Applicant: General Electric CompanyInventors: Vadim Bromberg, John Sterle, Victor Fulton, Tyler Andrew Griffith, Peter Douglas Lueschen, Carlos H. Bonilla, Joseph L. Smolenski, Timothy Francis Andrews, Younkoo Jeong, Jacob Mayer, Kwok Pong Chan, Mary Kathryn Thompson, Ruben E. Fairman
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Patent number: 12087393Abstract: Methods, systems, and devices for multi-driver signaling are described. An apparatus may include a first voltage source configured to supply a positive voltage and a second voltage source configured to supply a negative voltage. The apparatus may also include a first driver configured to couple a transmission line of a bus with the first voltage source and a second driver configured to couple the transmission line of the bus with the second voltage source. The first driver may be configured to transfer current to the transmission line based on a configurable resistance of the first driver. And the second driver configured to transfer current from the transmission line of the bus based on a configurable resistance of the second driver.Type: GrantFiled: April 13, 2022Date of Patent: September 10, 2024Assignee: Micron Technology, Inc.Inventors: Peter Mayer, Rethin Raj, Nobuyuki Umeda, Andreas Schneider, Casto Salobrena Garcia
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Patent number: 12086005Abstract: Methods, systems, and devices for tracking a reference voltage (also referred to as VREFD) after boot-up are described. For example, a host device or a memory device may determine a temperature value associated with the memory device. The host device or the memory device may select a reference voltage offset value for the memory device based on mapping the temperature value associated with the memory device to a relationship between reference voltage offset values and temperature differential values associated with the memory device. The host device or the memory device may adjust a reference voltage value associated with the memory device based on the reference voltage offset value. The host device, or the memory device, may operate the memory device in accordance with the reference voltage value based on adjusting the reference voltage value.Type: GrantFiled: April 26, 2022Date of Patent: September 10, 2024Assignee: Micron Technology, Inc.Inventors: Martin Brox, Thomas Hein, Wolfgang Anton Spirkl, Andrea Sorrentino, Peter Mayer
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Patent number: 12081331Abstract: Methods, systems, and devices for operating memory cell(s) using adapting the current on a channel are described. A current on a channel may be adapted during a transition period between signaling a first logic value over the channel and signaling a second (e.g. subsequent) logic value over the channel. Adapting the current may include increasing or decreasing the current on the channel during the transition period. The degree of adaptation may be based on a difference between the first logic value and the subsequent logic value. In some cases, a logic circuit may be configured to determine a difference between the first and subsequent logic value. The logic circuit may be further configured to communicate the difference to an adaptive driver. And the adaptive driver may adapt a current of the channel based on the communicated difference.Type: GrantFiled: September 23, 2019Date of Patent: September 3, 2024Assignee: Micron Technology, Inc.Inventors: Martin Brox, Peter Mayer, Michael Dieter Richter, Thomas Hein, Wolfgang Anton Spirkl
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Publication number: 20240266563Abstract: A fuel cell exhaust-gas system includes at least one condenser for receiving water-containing fuel cell exhaust gas that has been discharged from a fuel cell and for discharging water-depleted fuel cell exhaust gas. The at least one condenser includes a separator for separating off water that has been condensed out of the water-containing fuel cell exhaust gas that has been fed to the at least one condenser and at least one heat exchanger, wherein the water-containing fuel cell exhaust gas that is fed to at least one condenser, and water-depleted fuel cell exhaust gas that has been discharged from at least one condenser, can flow through the at least one heat exchanger in order for heat of the water-containing fuel cell exhaust gas to be transferred to the water-depleted fuel cell exhaust gas.Type: ApplicationFiled: February 6, 2024Publication date: August 8, 2024Inventors: Jochen Hammer, Peter Wink, Michael Mayer, Gerd Gaiser, Patrick Schaller, Tadeusz-Jozef Juroszek
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Patent number: 12042988Abstract: Additive manufacturing apparatuses, components of additive manufacturing apparatuses, and methods of using such manufacturing apparatuses and components are disclosed. An additive manufacturing apparatus may include a recoat head for distributing build material in a build area, a print head for depositing material in the build area, one or more actuators for moving the recoat head and the print head relative to the build area, and a cleaning station for cleaning the print head.Type: GrantFiled: May 22, 2020Date of Patent: July 23, 2024Assignee: General Electric CompanyInventors: Vadim Bromberg, John Sterle, Victor Fulton, Tyler Andrew Griffith, Peter Douglas Lueschen, Carlos H. Bonilla, Joseph L. Smolenski, Timothy Francis Andrews, Younkoo Jeong, Jacob Mayer, Kwok Pong Chan, Mary Kathryn Thompson, Ruben E. Fairman
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Patent number: 12027231Abstract: Systems, methods, and apparatuses for offset cancellation are described. A memory device may determine that a channel is in a state that interrupts an active termination of the channel and enable the calibration of a reference voltage (e.g., by the memory device). For example, a channel used for data communications with a second device (e.g., a controller) may initially be in a state of active termination. The memory device may determine that the channel has transitioned to another state that interrupts the active termination. While the channel is in the other state, the memory device may calibrate a reference voltage of a receiver by transmitting calibration signals on the channel and detecting an offset associated with a reference voltage. The memory device may use the detected offset and the reference voltage to identify signals transmitted to the memory device over the channel.Type: GrantFiled: February 10, 2022Date of Patent: July 2, 2024Inventors: Martin Brox, Wolfgang Anton Spirkl, Thomas Hein, Michael Dieter Richter, Peter Mayer
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Patent number: 12019900Abstract: Methods, systems, and devices for temperature-based memory management are described. A system may include a memory device and a host device. The host device may identify a temperature (e.g., of the memory device). The host device may determine a value for a parameter for operating the memory device—such as a timing, voltage, or frequency parameter—based on the temperature of the memory device. The host device may transmit signaling to the memory device or another component of the system based on the value of the parameter. In some cases, the host device may determine the temperature of the memory device based on an indication (e.g., provided by the memory device). In some cases, the host device may determine the temperature of the memory device based on a temperature of the host device or a temperature of another component of the system.Type: GrantFiled: March 17, 2022Date of Patent: June 25, 2024Assignee: Micron Technology, Inc.Inventors: Peter Mayer, Thomas Hein, Wolfgang Anton Spirkl, Martin Brox, Michael Dieter Richter
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Publication number: 20240176695Abstract: Methods, systems, and devices for error detection, error correction, and error management by memory devices are described. Programmable thresholds may be configured for a memory device based on a type of data or a location of stored data, among other aspects. For example, a host device may configure a threshold quantity of errors for data at a memory device. When retrieving the data, the memory device may track or count errors in the data and determine whether the threshold has been satisfied. The memory device may transmit (e.g., to the host device) an indication whether the threshold has been satisfied, and the system may perform functions to correct the errors and/or prevent further errors. The memory device may also identify errors in received commands or may identify errors introduced in data after the data was received (e.g., using an error detecting code associated with a command or bus).Type: ApplicationFiled: February 7, 2024Publication date: May 30, 2024Inventors: Michael Dieter Richter, Thomas Hein, Wolfgang Anton Spirkl, Martin Brox, Peter Mayer
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Patent number: 11989140Abstract: Methods, systems, and devices for signal path biasing in an electronic system (e.g., a memory system) are described. In one example, a memory device, a host device, or both may be configured to bias a signal path, between an idle state and an information transfer or between an information transfer and an idle state, to an intermediate or mid-bias voltage level, which may reduce signal interference associated with such transitions. In various examples, the described biasing to a voltage, such as a mid-bias voltage, may be associated with an access command or other command for information to be communicated between devices of the electronic system, such as a command for information to be communicated between a memory device and a host device.Type: GrantFiled: February 10, 2023Date of Patent: May 21, 2024Assignee: Micron Technology, Inc.Inventors: Wolfgang Anton Spirkl, Thomas Hein, Martin Brox, Peter Mayer, Michael Dieter Richter
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Publication number: 20240157676Abstract: Disclosed is a building board construction with increased surface strength. More specifically, increased nail pull strength is achieved via the application of an external surface coating. The surface coating is ideally applied to a paper faced gypsum building board. In one possible embodiment, the coating is formed from a water soluble polymer.Type: ApplicationFiled: January 23, 2024Publication date: May 16, 2024Inventors: Robin Daniel Fisher, Devang Umesh Khariwala, Jeffrey Hamilton Peet, Peter Mayer
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Publication number: 20240126644Abstract: Methods, systems, and devices for channel modulation for a memory device are described. A system may include a memory device and a host device coupled with the memory device. The system may be configured to communicate a first signal modulated using a first modulation scheme and communicate a second signal that is based on the first signal and that is modulated using a second modulation scheme. The first modulation scheme may include a first quantity of voltage levels that span a first range of voltages, and the second modulation scheme may include a second quantity of voltage levels that span a second range of voltages different than (e.g., smaller than) the first range of voltages. The first signal may include write data carried over a data channel, and the second signal may include error detection information based on the write data that is carried over an error detection channel.Type: ApplicationFiled: December 27, 2023Publication date: April 18, 2024Inventors: Martin Brox, Peter Mayer, Wolfgang Anton Spirkl, Thomas Hein, Michael Dieter Richter, Timothy M. Hollis, Roy Greeff
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Publication number: 20240095119Abstract: Systems, apparatuses, and methods for transmission failure feedback associated with a memory device are described. A memory device may detect errors in received data and transmit an indication of the error when detected. The memory device may receive data and checksum information for the data from a controller. The memory device may generate a checksum for the received data and may detect transmission errors. The memory device may transmit an indication of detected errors to the controller, and the indication may be transmitted using a line that is different than an error detection code (EDC) line. A low-speed tracking clock signal may also be transmitted by the memory device over a line different than the EDC line. The memory device may transmit a generated checksum to the controller with a time offset applied to the checksum signaled over the EDC line.Type: ApplicationFiled: June 19, 2023Publication date: March 21, 2024Inventors: Peter Mayer, Thomas Hein, Martin Brox, Wolfgang Anton Spirkl, Michael Dieter Richter
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Patent number: 11914467Abstract: Methods, systems, and devices for error detection, error correction, and error management by memory devices are described. Programmable thresholds may be configured for a memory device based on a type of data or a location of stored data, among other aspects. For example, a host device may configure a threshold quantity of errors for data at a memory device. When retrieving the data, the memory device may track or count errors in the data and determine whether the threshold has been satisfied. The memory device may transmit (e.g., to the host device) an indication whether the threshold has been satisfied, and the system may perform functions to correct the errors and/or prevent further errors. The memory device may also identify errors in received commands or may identify errors introduced in data after the data was received (e.g., using an error detecting code associated with a command or bus).Type: GrantFiled: October 11, 2022Date of Patent: February 27, 2024Inventors: Michael Dieter Richter, Thomas Hein, Wolfgang Anton Spirkl, Martin Brox, Peter Mayer
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Patent number: 11909568Abstract: Methods, systems, and devices for techniques for communicating multi-level signals are described. A first device may be configured to communicate signals with a second device according to a modulation scheme. The first device may transmit a first signal to the second device at a first voltage level of the modulation scheme corresponding to a first multi-bit value. The first device may select a second voltage level of the modulation scheme based on a difference between the first voltage level and a third voltage level of the PAM scheme, and may transmit a second signal to the second device at the second voltage level to indicate a second multi-bit value corresponding to the third voltage level. The second device may decode the second signal to determine the second multi-bit value based on receiving the first signal at the first voltage level and the second signal at the second voltage level.Type: GrantFiled: June 14, 2022Date of Patent: February 20, 2024Assignee: Micron Technology, Inc.Inventors: Peter Mayer, Nobuyuki Umeda, Casto Salobrena Garcia, Rethin Raj, Andreas Schneider
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Patent number: 11878486Abstract: Disclosed is a building board construction with increased surface strength. More specifically, increased nail pull strength is achieved via the application of an external surface coating. The surface coating is ideally applied to a paper faced gypsum building board. In one possible embodiment, the coating is formed from a water soluble polymer.Type: GrantFiled: September 6, 2022Date of Patent: January 23, 2024Assignee: CertainTeed Gypsum, Inc.Inventors: Robin Daniel Fisher, Devang Umesh Khariwala, Jeffrey Hamilton Peet, Peter Mayer
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Patent number: 11860731Abstract: Methods, systems, and devices for channel modulation for a memory device are described. A system may include a memory device and a host device coupled with the memory device. The system may be configured to communicate a first signal modulated using a first modulation scheme and communicate a second signal that is based on the first signal and that is modulated using a second modulation scheme. The first modulation scheme may include a first quantity of voltage levels that span a first range of voltages, and the second modulation scheme may include a second quantity of voltage levels that span a second range of voltages different than (e.g., smaller than) the first range of voltages. The first signal may include write data carried over a data channel, and the second signal may include error detection information based on the write data that is carried over an error detection channel.Type: GrantFiled: July 5, 2022Date of Patent: January 2, 2024Inventors: Martin Brox, Peter Mayer, Wolfgang Anton Spirkl, Thomas Hein, Michael Dieter Richter, Timothy M. Hollis, Roy E. Greeff
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Patent number: 11848044Abstract: Methods, systems, and devices for controlled and mode-dependent heating of a memory device are described. In various examples, a memory device or an apparatus that includes a memory device may have circuitry configured to heat the memory device. The circuitry configured to heat the memory device may be activated, deactivated, or otherwise operated based on an indication of a temperature (e.g., of the memory device). In some examples, activating or otherwise operating the circuitry configured to heat the memory device may be based on an operating mode (e.g., of the memory device), which may be associated with certain access operations or operational states (e.g., of the memory device). Various operations or operating modes (e.g., of the memory device) may also be based on indications of a temperature (e.g., of the memory device).Type: GrantFiled: December 29, 2021Date of Patent: December 19, 2023Assignee: Micron Technology, Inc.Inventors: Peter Mayer, Michael Dieter Richter, Martin Brox, Wolfgang Anton Spirkl, Thomas Hein
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Publication number: 20230386527Abstract: Methods, systems, and devices for drive strength calibration for multi-level signaling are described. A driver may be configured to have an initial drive strength and to drive an output pin of a transmitting device toward an intermediate voltage level of a multi-level modulation scheme, where the output pin is coupled with a receiving device via a channel. The receiving device may generate, and the transmitting device may receive, a feedback signal indicating a relationship between the resulting voltage of the channel and an value for the intermediate voltage level. The transmitting device may determine and configure the driver to use an adjusted drive strength for the intermediate voltage level based on the feedback signal. The driver may be calibrated (e.g., independently) for each intermediate voltage level of the multi-level modulation scheme. Further, the driver may be calibrated for the associated channel.Type: ApplicationFiled: May 26, 2023Publication date: November 30, 2023Inventors: Peter Mayer, Wolfgang Anton Spirkl, Michael Dieter Richter, Martin Brox, Thomas Hein
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Publication number: 20230341915Abstract: Methods, systems, and devices for tracking a reference voltage (also referred to as VREFD) after boot-up are described. For example, a host device or a memory device may determine a temperature value associated with the memory device. The host device or the memory device may select a reference voltage offset value for the memory device based on mapping the temperature value associated with the memory device to a relationship between reference voltage offset values and temperature differential values associated with the memory device. The host device or the memory device may adjust a reference voltage value associated with the memory device based on the reference voltage offset value. The host device, or the memory device, may operate the memory device in accordance with the reference voltage value based on adjusting the reference voltage value.Type: ApplicationFiled: April 26, 2022Publication date: October 26, 2023Inventors: Martin Brox, Thomas Hein, Wolfgang Anton Spirkl, Andrea Sorrentino, Peter Mayer