Abstract: Methods, systems, and devices for memory device operation are described. A memory device may operate in different modes in response to various conditions and user constraints. Such modes may include a power-saving or low power mode. While in the low power mode, the memory device may refrain from operations, such as self-refresh operations, on one or more of the memory array(s) included in the memory device. The memory device may deactivate external interface components and components that may generate operating voltages for the memory array(s), while the memory device may continue to power circuits that store operating information for the memory device. The memory device may employ similar techniques in other operating modes to accommodate or react to different conditions or user constraints.

Abstract: Methods, systems, and devices for error detection, error correction, and error management by memory devices are described. Programmable thresholds may be configured for a memory device based on a type of data or a location of stored data, among other aspects. For example, a host device may configure a threshold quantity of errors for data at a memory device. When retrieving the data, the memory device may track or count errors in the data and determine whether the threshold has been satisfied. The memory device may transmit (e.g., to the host device) an indication whether the threshold has been satisfied, and the system may perform functions to correct the errors and/or prevent further errors. The memory device may also identify errors in received commands or may identify errors introduced in data after the data was received (e.g., using an error detecting code associated with a command or bus).

Abstract: Methods, systems, and devices for testing of multi-level signaling associated with a memory device are described. A tester may be used to test one or more operations of a memory device. The memory device may be configured to communicate data using a modulation scheme that includes three or more symbols. The tester may be configured to communicate data using a modulation scheme that includes three or fewer symbols. Techniques for testing the memory device using such a tester are described.

Abstract: Methods, systems, and devices for memory operations that support configuring a channel, such as a command/address (C/A) channel, are described. A configuration of a C/A channel may be dynamically adapted based on power saving considerations, control information execution latency, or both. Configuring a C/A channel may include determining a quantity of pins, or a quantity of cycles, both for communicating control information over the C/A channel. The quantity of pins may be determined based on previous control information transmissions, characteristics of a memory device, or predicted control information transmissions, or any combination thereof in some cases. The determined quantity of pins, quantity of cycles, or both may be explicitly or implicitly indicated to other devices (e.g., that use the C/A channel).

Abstract: Methods, systems, and devices for temperature-based memory management are described. A system may include a memory device and a host device. The host device may identify a temperature (e.g., of the memory device). The host device may determine a value for a parameter for operating the memory device—such as a timing, voltage, or frequency parameter—based on the temperature of the memory device. The host device may transmit signaling to the memory device or another component of the system based on the value of the parameter. In some cases, the host device may determine the temperature of the memory device based on an indication (e.g., provided by the memory device). In some cases, the host device may determine the temperature of the memory device based on a temperature of the host device or a temperature of another component of the system.

Abstract: Methods, systems, and devices for controlled and mode-dependent heating of a memory device are described. In various examples, a memory device or an apparatus that includes a memory device may have circuitry configured to heat the memory device. The circuitry configured to heat the memory device may be activated, deactivated, or otherwise operated based on an indication of a temperature (e.g., of the memory device). In some examples, activating or otherwise operating the circuitry configured to heat the memory device may be based on an operating mode (e.g., of the memory device), which may be associated with certain access operations or operational states (e.g., of the memory device). Various operations or operating modes (e.g., of the memory device) may also be based on indications of a temperature (e.g., of the memory device).

Abstract: Methods, systems, and devices for multi-level receivers with various operating modes (e.g., on-die termination mode, termination-off mode, etc.) are described. Different modes may be utilized for receiving different types of signaling over a channel. Each mode may correspond to the use of a respective set of receivers configured for the different types of signaling. For example, a device may include a first set of receivers used to receive a first type of signal (e.g., with the channel being actively terminated) and a second set of receivers used to receive a second type of signal (e.g., with the channel being non-terminated). When communicating with another device, based on the type of signaling used for communications, either the first set of receivers or the second set of receivers may be enabled (e.g., through selecting a receiver path for the corresponding mode).

Abstract: Systems, methods, and apparatuses for offset cancellation are described. A memory device may determine that a channel is in a state that interrupts an active termination of the channel and enable the calibration of a reference voltage (e.g., by the memory device). For example, a channel used for data communications with a second device (e.g., a controller) may initially be in a state of active termination. The memory device may determine that the channel has transitioned to another state that interrupts the active termination. While the channel is in the other state, the memory device may calibrate a reference voltage of a receiver by transmitting calibration signals on the channel and detecting an offset associated with a reference voltage. The memory device may use the detected offset and the reference voltage to identify signals transmitted to the memory device over the channel.

Abstract: Methods, systems, and devices for operating memory cell(s) using adapting the current on a channel are described. A current on a channel may be adapted during a transition period between signaling a first logic value over the channel and signaling a second (e.g. subsequent) logic value over the channel. Adapting the current may include increasing or decreasing the current on the channel during the transition period. The degree of adaptation may be based on a difference between the first logic value and the subsequent logic value. In some cases, a logic circuit may be configured to determine a difference between the first and subsequent logic value. The logic circuit may be further configured to communicate the difference to an adaptive driver. And the adaptive driver may adapt a current of the channel based on the communicated difference.

Abstract: Methods, systems, and devices for dynamically configuring transmission lines of a bus between two electronic devices (e.g., a controller and memory device) are described. A first device may determine a quantity of bits (e.g., data bits, control bits) to be communicated with a second device over a data bus. The first device may partition the data bus into a first set of transmission lines (e.g., based on the quantity of data bits) and a second set of transmission lines (e.g., based on the quantity of control bits). The first device may communicate the quantity of data bits over the first set of transmission lines and communicate the quantity of control bits over the second set of transmission lines. In some cases, the first device may repartition the data bus based on different quantities of data bits and control bits to be communicated with the second device at a different time.

Abstract: The invention relates to a motor vehicle headlight (100), comprising a headlight housing (102) and a cover plate (103) having at least one light source (104, 105) arranged in said motor vehicle headlight (100). In order to cool the at least one light source (104, 105), a heat sink device (200) is provided. Said heat sink device (200) comprises two heat sink elements (106, 107, 201, 202, 501, 502, 601, 602, 701, 702, 801, 802, 901, 902, 1001, 1002) that are separated from one another by an air gap (209) and that are arranged in such a way that a first heat sink element (106, 201, 501, 601, 701, 801, 901, 1001) is mounted inside the motor vehicle headlight (100), and a second heat sink element (107, 202, 502, 602, 702, 802, 902, 1002) is mounted outside the motor vehicle headlight (100).

Abstract: A housing for an electronic device includes at least one damping unit which is movable between a retracted position and an extended position, the damping unit including a spring and a damper, at least one sensor which is configured to detect a fall of the electronic device, a release unit which is configured to cause the at least one damping unit to move from the retracted position to the extended position when the fall is detected, the spring and the damper being configured to change their shape when moving from the retracted position to the extended position.

Abstract: The invention relates to a motor vehicle headlight (100), comprising a headlight housing (102) and a cover plate (103) having at least one light source (104, 105) arranged in said motor vehicle headlight (100). In order to cool the at least one light source (104, 105), a heat sink device (200) is provided. Said heat sink device (200) comprises two heat sink elements (106, 107, 201, 202, 501, 502, 601, 602, 701, 702, 801, 802, 901, 902, 1001, 1002) that are separated from one another by an air gap (209) and that are arranged in such a way that a first heat sink element (106, 201, 501, 601, 701, 801, 901, 1001) is mounted inside the motor vehicle headlight (100), and a second heat sink element (107, 202, 502, 602, 702, 802, 902, 1002) is mounted outside the motor vehicle headlight (100).

Abstract: Systems, apparatuses, and methods for transmission failure feedback associated with a memory device are described. A memory device may detect errors in received data and transmit an indication of the error when detected. The memory device may receive data and checksum information for the data from a controller. The memory device may generate a checksum for the received data and may detect transmission errors. The memory device may transmit an indication of detected errors to the controller, and the indication may be transmitted using a line that is different than an error detection code (EDC) line. A low-speed tracking clock signal may also be transmitted by the memory device over a line different than the EDC line. The memory device may transmit a generated checksum to the controller with a time offset applied to the checksum signaled over the EDC line.

Abstract: Methods, systems, and devices for drive strength calibration for multi-level signaling are described. A driver may be configured to have an initial drive strength and to drive an output pin of a transmitting device toward an intermediate voltage level of a multi-level modulation scheme, where the output pin is coupled with a receiving device via a channel. The receiving device may generate, and the transmitting device may receive, a feedback signal indicating a relationship between the resulting voltage of the channel and an value for the intermediate voltage level. The transmitting device may determine and configure the driver to use an adjusted drive strength for the intermediate voltage level based on the feedback signal. The driver may be calibrated (e.g., independently) for each intermediate voltage level of the multi-level modulation scheme. Further, the driver may be calibrated for the associated channel.

Abstract: Methods, systems, and devices for pre-distortion of multi-level signaling are described. A device may identify two multi-level signals that are to be transmitted over two transmission lines at the same time. The device may estimate the crosstalk expected to be caused by one of the multi-level signals on the other during propagation. Based on the expected crosstalk, the device may generate a signal that compensates for the expected crosstalk. In some examples, the signal may be a combination of the first signal and a cancelation signal. In some examples, once the compensated signal has been generated, it is transmitted over its respective transmission line at the same time that the other multi-level is transmitted over its respective transmission line.

Abstract: Systems, apparatuses, and methods for training procedures on reference voltages and sampling times associated with symbols communicated with a memory device are described. The training procedures may be configured to compensate for variations that may occur in different symbols of a signal. For example, an individual training operation may be performed for each reference voltage within a first unit interval. These individual training operations may allow a reference voltage of the first unit interval to be positionable independent of other reference voltages in the same unit interval or in different unit intervals. In another example, an individual training operation may be performed for the sampling time associated with a reference voltage. These individual training operations may allow a sampling time associated with a reference voltage in the first unit interval to be positionable independent of other sampling times in the same unit interval or in different unit intervals.

Abstract: A headlamp (1) for vehicles having at least one laser light module (3l, 3m, 3r) which has a laser light source (11) and a phosphorus element (13) which is arranged downstream of the latter in the beam path and a front-end optical system (16) in which the at least one laser light module is arranged in a housing (2) of the headlamp which has a projection optical system (4) for projecting the light distribution generated in the focal plane of the projection optical system of the at least one laser light module into the carriageway space, and at least one deflection prism (20; 22, 23) is integrated into the at least one front-end optical system (16), which deflection prism (20; 22, 23) lies in the region of the laser beam (15; 15-1, 15-2) which occurs when the phosphorus element (13) is defective or missing and which deflects this laser beam occurring in the event of disruption and keeps it away from the projection optical system and therefore from the carriageway space.

Abstract: A method includes varying a number of clock characteristics of each a plurality of memory devices of a memory concurrently, determining a fitness of the memory for each variation of the number of clock characteristics, selecting a particular variation of the number of clock characteristics based on the determined fitness of the memory for the particular variation, changing a setting in each of the plurality of memory devices corresponding to the particular variation to generate an additional variation of the number of clock characteristics, and determining a fitness of the memory for the additional variation.

Abstract: The invention relates to a lighting device for a motor vehicle (10) that has one or preferably two such lighting devices that are set up to produce a headlamp flasher signaling function, the lighting device being associated with a controller, the controller controlling the lighting device upon activation of the headlamp flasher signaling function to produce, from the lighting device, a headlamp flasher light distribution, especially in the form of a high beam light distribution (LHV), especially for a defined period of time, in an area in front of the at least one lighting device or in an area in front of the vehicle (10).