Patents by Inventor Peter N Ehlig
Peter N Ehlig has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 6243801Abstract: A data processing device is used with peripheral devices having addressees and differing communication response periods. The data processing device includes a digital processor adapted for selecting different ones of the peripheral devices by asserting addresses of each selected peripheral device. Addressable programmable registers hold wait state values representative of distinct numbers of wait states corresponding to different address ranges. Circuitry responsive to an asserted address to the peripheral devices asserted by the digital processor generates the number of wait states represented by the value held in one of the addressable programmable registers corresponding to the one of the address ranges in which the asserted address occurs, thereby accommodating the differing communication response periods of the peripheral devices.Type: GrantFiled: November 1, 1999Date of Patent: June 5, 2001Assignee: Texas Instruments IncorporatedInventors: Frederic Boutaud, Peter N. Ehlig
-
Patent number: 6240504Abstract: A data processing device is used with peripheral devices having addressees and differing communication response periods. The data processing device includes a digital processor adapted for selecting different ones of the peripheral devices by asserting addresses of each selected peripheral device. Addressable programmable registers hold wait state values representative of distinct numbers of wait states corresponding to different address ranges. Circuitry responsive to an asserted address to the peripheral devices asserted by the digital processor generates the number of wait states represented by the value held in one of the addressable programmable registers corresponding to the one of the address ranges in which the asserted address occurs, thereby accommodating the differing communication response periods of the peripheral devices.Type: GrantFiled: November 1, 1999Date of Patent: May 29, 2001Assignee: Texas Instruments IncorporatedInventors: Frederic Boutaud, Peter N Ehlig
-
Patent number: 6240505Abstract: A data processing device is used with peripheral devices having addressees and differing communication response periods. The data processing device includes a digital processor adapted for selecting different ones of the peripheral devices by asserting addresses of each selected peripheral device. Addressable programmable registers hold wait state values representative of distinct numbers of wait states corresponding to different address ranges. Circuitry responsive to an asserted address to the peripheral devices asserted by the digital processor generates the number of wait states represented by the value held in one of the addressable programmable registers corresponding to the one of the address ranges in which the asserted address occurs, thereby accommodating the differing communication response periods of the peripheral devices.Type: GrantFiled: November 1, 1999Date of Patent: May 29, 2001Assignee: Texas Instruments IncorporatedInventors: Frederic Boutaud, Peter N. Ehlig
-
Patent number: 6134578Abstract: A data processing device includes an electronic processor responsive to a context signal and operable in alternative processing contexts identified by the context signal. First and second registers are connected to the electronic processor to participate in one processing context while retaining information from another processing context until a return thereto. A context switching circuit is connected to the first and second registers and operates to selectively control input and output operations of the registers to and from the electronic processor depending on the processing context. Other devices, systems and methods are also disclosed.Type: GrantFiled: May 2, 1996Date of Patent: October 17, 2000Assignee: Texas Instruments IncorporatedInventors: Peter N. Ehlig, Frederic Boutaud, James F. Hollander
-
Patent number: 6032268Abstract: The invention provides improved architectures and methods for emulation, simulation, and testability of data processing devices and systems without requiring physical probing or special test fixtures. A data processing device may include a semiconductor chip that is divided into domains. One domain may be halted and tested while another domain continues to operate. For example, the semiconductor chip may have a electronic processor domain and an analysis domain. The analysis domain may include an on-chip condition sensor that is connected to the electronic processor domain. The chip can further include control logic circuitry to allow the analysis domain to operate while the electronic processor is halted and tested.Type: GrantFiled: February 4, 1992Date of Patent: February 29, 2000Assignee: Texas Instruments IncorporatedInventors: Gary L. Swoboda, Peter N. Ehlig
-
Patent number: 5946483Abstract: A data processing device includes a circuit having status conditions wherein a particular set of the status conditions can occur in operation of the circuit. An instruction register operates to hold a branch instruction conditional on a particular set of the status conditions. A decoder is connected to the instruction register and the circuit. A program counter is coupled to the decoder wherein the decoder is operable to enter a branch address into the program counter in response to the branch instruction when the particular set of the status conditions of the circuit are present.Type: GrantFiled: August 6, 1997Date of Patent: August 31, 1999Assignee: Texas Instruments IncorporatedInventors: Frederic Boutaud, Peter N. Ehlig
-
Patent number: 5907714Abstract: A data processing device includes a circuit having status conditions wherein a particular set of the status conditions can occur in operation of the circuit. An instruction register operates to hold a branch instruction conditional on a particular set of the status conditions. A decoder is connected to the instruction register and the circuit. A program counter is coupled to the decoder wherein the decoder is operable to enter a branch address into the program counter in response to the branch instruction when the particular set of the status conditions of the circuit are present.Type: GrantFiled: August 19, 1994Date of Patent: May 25, 1999Assignee: Texas Instruments IncorporatedInventors: Frederic Boutaud, Peter N. Ehlig
-
Patent number: 5828577Abstract: An electronic device includes an electronic circuit having points for introducing power supply voltage, ground return, and at least one output. A keyless device package holds the electronic circuit, and the keyless device package is subject to misorientation. Terminals, including terminals for power supply voltage, the ground return and the output, are connected to the electronic circuit and secured to the device package. The terminals are distributed on the device package so that a turning reorientation of the entire electronic device translates the terminals to each other only in a way which prevents electrical stress to the electronic circuit due to possible misorientation of the electronic device under test. Other devices, systems and methods are also disclosed.Type: GrantFiled: June 7, 1995Date of Patent: October 27, 1998Assignee: Texas Instruments IncorporatedInventor: Peter N. Ehlig
-
Patent number: 5777885Abstract: An electronic device includes an electronic circuit having points for introducing power supply voltage, ground return, and at least one output. A keyless device package holds the electronic circuit, and the keyless device package is subject to misorientation. Terminals, including terminals for power supply voltage, the ground return and the output, are connected to the electronic circuit and secured to the device package. The terminals are distributed on the device package so that a turning reorientation of the entire electronic device translates the terminals to each other only in a way which prevents electrical stress to the electronic circuit due to possible misorientation of the electronic device under test. Other devices, systems and methods are also disclosed.Type: GrantFiled: June 7, 1995Date of Patent: July 7, 1998Assignee: Texas Instruments IncorporatedInventor: Peter N. Ehlig
-
Patent number: 5724248Abstract: An electronic device includes an electronic circuit having points for introducing power supply voltage, ground return, and at least one output. A keyless device package holds the electronic circuit, and the keyless device package is subject to misorientation. Terminals, including terminals for power supply voltage, the ground return and the output, are connected to the electronic circuit and secured to the device package. The terminals are distributed on the device package so that a turning reorientation of the entire electronic device translates the terminals to each other only in a way which prevents electrical stress to the electronic circuit due to possible misorientation of the electronic device under test. Other devices, systems and methods are also disclosed.Type: GrantFiled: July 22, 1992Date of Patent: March 3, 1998Assignee: Texas Instruments IncorporatedInventor: Peter N. Ehlig
-
Patent number: 5652910Abstract: A data processing device includes a circuit having status conditions wherein a particular set of the status conditions can occur in operation of the circuit. An instruction register operates to hold a branch instruction conditional on a particular set of the status conditions. A decoder is connected to the instruction register and the circuit. A program counter is coupled to the decoder wherein the decoder is operable to enter a branch address into the program counter in response to the branch instruction when the particular set of the status conditions of the circuit are present. Other data processing devices, systems and methods are also disclosed.Type: GrantFiled: June 7, 1995Date of Patent: July 29, 1997Assignee: Texas Instruments IncorporatedInventors: Frederic Boutaud, Peter N. Ehlig
-
Patent number: 5617574Abstract: A data processing device includes a circuit having status conditions wherein a particular set of the status conditions can occur in operation of the circuit. An instruction register operates to hold a branch instruction conditional on a particular set of the status conditions. A decoder is connected to the instruction register and the circuit. A program counter is coupled to the decoder wherein the decoder is operable to enter a branch address into the program counter in response to the branch instruction when the particular set of the status conditions of the circuit are present. Other data processing devices, systems and methods are also disclosed.Type: GrantFiled: August 10, 1994Date of Patent: April 1, 1997Assignee: Texas Instruments IncorporatedInventors: Frederic Boutaud, Peter N. Ehlig
-
Patent number: 5586275Abstract: A data processing device includes a data bus and a program bus, a data memory connected to the data bus and having data memory locations, and an electronic computation unit connected to the data bus and an accumulator connected to the electronic computation unit and to the data bus. A logic circuit is connected to the program bus for receiving instructions and connected to the data bus for executing logic operations in accordance with at least some of the instructions. The logic operations affect bits in at least one of the data memory locations independently of the electronic computation unit without affecting the accumulator. A control circuit sends instructions to the logic circuit on the program bus and to the electronic computation unit. Other devices, systems and methods are also disclosed.Type: GrantFiled: April 26, 1994Date of Patent: December 17, 1996Assignee: Texas Instruments IncorporatedInventors: Peter N. Ehlig, Frederic Boutaud
-
Patent number: 5583767Abstract: A data processing device includes a data bus and a program bus, a data memory connected to the data bus and having data memory locations, and an electronic computation unit connected to the data bus and an accumulator connected to the electronic computation unit and to the data bus. A logic circuit is connected to the program bus for receiving instructions and connected to the data bus for executing logic operations in accordance with at least some of the instructions. The logic operations affect bits in at least one of the data memory locations independently of the electronic computation unit without affecting the accumulator. A control circuit sends instructions to the logic circuit on the program bus and to the electronic computation unit. Other devices, systems and methods are also disclosed.Type: GrantFiled: June 7, 1995Date of Patent: December 10, 1996Assignee: Texas Instruments IncorporatedInventors: Peter N. Ehlig, Frederic Boutaud
-
Patent number: 5579218Abstract: A data processing device includes a data bus and a program bus, a data memory connected to the data bus and having data memory locations, and an electronic computation unit connected to the data bus and an accumulator connected to the electronic computation unit and to the data bus. A logic circuit is connected to the program bus for receiving instructions and connected to the data bus for executing logic operations in accordance with at least some of the instructions. The logic operations affect bits in at least one of the data memory locations independently of the electronic computation unit without affecting the accumulator. A control circuit sends instructions to the logic circuit on the program bus and to the electronic computation unit. Other devices, systems and methods are also disclosed.Type: GrantFiled: June 7, 1995Date of Patent: November 26, 1996Assignee: Texas Instruments IncorporatedInventors: Peter N. Ehlig, Frederic Boutaud
-
Patent number: 5579497Abstract: A data processing device includes a data bus and a program bus, a data memory connected to the data bus and having data memory locations, and an electronic computation unit connected to the data bus and an accumulator connected to the electronic computation unit and to the data bus. A logic circuit is connected to the program bus for receiving instructions and connected to the data bus for executing logic operations in accordance with at least some of the instructions. The logic operations affect bits in at least one of the data memory locations independently of the electronic computation unit without affecting the accumulator. A control circuit sends instructions to the logic circuit on the program bus and to the electronic computation unit. Other devices, systems and methods are also disclosed.Type: GrantFiled: June 7, 1995Date of Patent: November 26, 1996Assignee: Texas Instruments IncorporatedInventors: Peter N. Ehlig, Frederic Boutaud
-
Patent number: 5551050Abstract: A system and method for real time internal bus monitoring of a data processing device is disclosed. A plurality of processors having address outputs, data lines, and clocks are connected to a synchronizing circuit to lock the clocks of the processors in phase. A memory is connected to all of the data lines in common and is connected to the address outputs of fewer than all of the processors. Emulation circuitry is connected to the address outputs of a processor instead of said memory. The method discloses synchronizing the processors by locking the clocks in phase. Then accessing the system memory by addressing it with the address output of only one of the processors. And finally, monitoring at least one of the other processors via its address output.Type: GrantFiled: November 14, 1994Date of Patent: August 27, 1996Assignee: Texas Instruments IncorporatedInventors: Peter N. Ehlig, Gary L. Swoboda
-
Patent number: 5550993Abstract: A data processing device includes an electronic processor responsive to a context signal and operable in alternative processing contexts identified by the context signal. First and second registers are connected to the electronic processor to participate in one processing context while retaining information from another processing context until a return thereto. A context switching circuit is connected to the first and second registers and operates to selectively control input and output operations of the registers to and from the electronic processor depending on the processing context. Other devices, systems and methods are also disclosed.Type: GrantFiled: August 9, 1994Date of Patent: August 27, 1996Assignee: Texas Instruments IncorporatedInventors: Peter N. Ehlig, Frederic Boutaud, James F. Hollander
-
Patent number: 5535331Abstract: Operations of a data processing device are traced by detecting a jump address in the program counter sequence, and pushing the jump address onto a trace stack.Type: GrantFiled: February 3, 1992Date of Patent: July 9, 1996Assignee: Texas Instruments IncorporatedInventors: Gary L. Swoboda, Peter N. Ehlig
-
Patent number: 5349687Abstract: A speech recognition system includes an electronic processor responsive to a context signal and operable in alternative processing contexts identified by the context signal. First and second registers are connected to the electronic processor to participate in one processing context while retaining information from another processing context until a return thereto. A context switching circuit is connected to the first and second registers and operates to selectively control input and output operations of the registers to and from the electronic processor depending on the processing context. Other devices, systems and methods are also disclosed.Type: GrantFiled: October 9, 1992Date of Patent: September 20, 1994Assignee: Texas Instruments IncorporatedInventors: Peter N. Ehlig, Frederic Boutaud, James F. Hollander