Patents by Inventor Peter PeßL

Peter PeßL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6570512
    Abstract: The invention relates to a circuit configuration for quantization of digital signals and for filtering quantization noise. Said circuit configuration comprises a multitude of digital control loops connected in series and having quantizers. The digital signals having a word length of m-bits are fed to a first control loop in the series. The quantization error signal of each quantizer is filtered and fed back to the corresponding digital control loop. It is then fed to a downstream digital control loop. The quantized output signal of the first digital control loop is adapted to a third word length of u-bits which is smaller than the first word length. Except for the quantized output signal of the first digital control loop, the quantized output signals of the digital control loops of the series are respectively filtered by a digital filter.
    Type: Grant
    Filed: August 21, 2001
    Date of Patent: May 27, 2003
    Assignee: Infineon Technologies AG
    Inventors: Jörg Hauptmann, Peter Pessl, Dietmar Sträussnigg
  • Publication number: 20020119753
    Abstract: Programmable echo cancellation filter for echo signal cancellation for a transceiver having a signal input (13) for receiving the transmission signal emitted by the transceiver (1), an input resistor (36) connected to the signal input (13), an operational amplifier (39), whose signal input (38) is connected to the input resistor (36) and whose signal output (41) is connected to an output resistor (43), a first programmable resistor circuit (48), which is provided between the signal output (41) of the operational amplifier (39) and the signal input (38) of the operational amplifier, a second programmable resistor circuit (51), which is provided between the output resistor (43) and a signal output (15) of the echo cancellation filter (14), a third programmable resistor circuit (55), which is provided between the first programmable resistor circuit (48) and the signal output (15) of the echo cancellation filter (14), the programmable resistor circuits (48, 51, 55) each having a plurality of resistors (65) which
    Type: Application
    Filed: October 11, 2001
    Publication date: August 29, 2002
    Inventors: Antonio Digiandomenico, Peter Pessl, Christian Fleischhacker