Abstract: A system to monitor performance of a computing device includes a first bridge to interface with a first set of devices, and a second bridge to interface with a second set of devices. Configuration registers store configuration data associated with the second set of devices, and are accessible through the second bridge. A hub interface allows data to transfer downstream from the first bridge to the second bridge, and allows data to transfer upstream from the second bridge to the first bridge. A controller, external to the first and second bridges, accesses the configuration registers via the second bridge. A logic device allows the second bridge to send data to, and receive data from, the controller.

Abstract: Embodiments of the present invention provide a method and apparatus to allow an I/O controller to alert an external controller using an enhanced SMBus implementation that enables bi-directional capability on SMBALERT#. I/O controller includes an auxiliary control register and alert output enable (AOEN) register. When host sets AOE bit in auxiliary control register, SMBALERT# signal is configured as an output signal with bi-directional functionality. External controller uses an interface command to write to AOEN register and determine events/conditions it wants to be alerted on. SMBALERT# is activated in response to a detected event/condition. In response to SMBALERT#, external controller determines the alert generation condition using byte read commands on the system management bus, and clears SMBALERT#.

Abstract: According to one embodiment a computer system is disclosed. The computer system includes a central processing unit (CPU) and a memory device, coupled to the CPU. The memory device includes a charge pump circuit to amplify a first voltage, and a voltage detection circuit coupled to the charge pump circuit to disable the charge pump circuit if a second voltage is detected.

Abstract: Embodiments of the present invention provide a system event log for a computer system. The system event log may comprise a RAM coupled to a system bus. The system event log may be configured to record information in the RAM corresponding to bus transactions on the system bus. The information may be used to de-bug system problems.

Abstract: A watchdog timer including a counter, a watchdog enable mechanism, and a timeout control. The watchdog enable mechanism is set to an enabled state by receiving an enabling input and set to a disabled state only by a power cycle or a hardware reset. The timeout control is coupled to the counter and to the watchdog enable mechanism. The timeout control enables a error signal if the watchdog enable mechanism is enabled and the counter is not updated before completing a count.

Abstract: A method and device for combining packets is disclosed. In various embodiments, a plurality of packets that are compliant with a particular protocol are combined into a single packet of the same protocol. The single packet also preserves identification information for each of the combined packets within the single packet. The identification information can be used to partition and/or route the combined packets to their respective destinations.

Abstract: A method and apparatus for allocating a variable amount of memory to a device coupled to a bus are disclosed. In one embodiment, a first register contains a first value. A second register (e.g., Base Address Register) contains a second value that represents a default amount of memory to allocate to the device. The second value is automatically altered to indicate an updated amount of memory to allocate based on the first value. The ability to alter the default memory value substantially eliminates memory holes, which are unused portions of memory that have been allocated to devices coupled to the bus.

Abstract: Machine-readable media, methods, and apparatus are described for performing direct memory access (DMA) transfers. In some embodiments, a device may generate an interrupt to request a DMA transfer. A DMA controller may claim the interrupt and may prevent a processor from receiving and/or servicing the claimed interrupt. The DMA controller may further transfer a data block in response to the claimed interrupt.

Abstract: The present invention relates to a system and method to configure input/output (SIO) devices to use selected pairs of port addresses. The method includes writing a first unique value to a selected port address. The method further includes writing a second unique value to the selected port address. The method also includes performing a read operation on the selected port address to obtain a read value. The method additionally includes setting an input/output (IO) device to use the selected port address.

Abstract: Embodiments of the present invention provide a method and apparatus to allow an I/O controller to alert an external controller using an enhanced SMBus implementation that enables bi-directional capability on SMBALERT#. I/O controller includes an auxiliary control register and alert output enable (AOEN) register. When host sets AOE bit in auxiliary control register, SMBALERT# signal is configured as an output signal with bi-directional functionality. External controller uses an interface command to write to AOEN register and determine events/conditions it wants to be alerted on. SMBALERT# is activated in response to a detected event/condition. In response to SMBALERT#, external controller determines the alert generation condition using byte read commands on the system management bus, and clears SMBALERT#.

Abstract: A method and apparatus for booting from a selection of multiple boot images. Control logic is coupled with a plurality of memory devices containing a plurality of boot images. The control logic employs a device select value to map device requests to memory devices. An event agent monitors the apparatus for various events including a corrupted primary boot image. The event agent notifies the control logic when an event occurs and the control logic changes the device select value responsive to the event. The mapping from device requests to memory devices changes when the device select value changes.

Abstract: The present invention relates to a system and method to configure input/output (SIO) devices to use selected pairs of port addresses. The method includes writing a first unique value to a selected port address. The method further includes writing a second unique value to the selected port address. The method also includes performing a read operation on the selected port address to obtain a read value. The method additionally includes setting an input/output (IO) device to use the selected port address.

Abstract: A system to monitor performance of a computing device includes a first bridge to interface with a first set of devices, and a second bridge to interface with a second set of devices. Configuration registers store configuration data associated with the second set of devices, and are accessible through the second bridge. A hub interface allows data to transfer downstream from the first bridge to the second bridge, and allows data to transfer upstream from the second bridge to the first bridge. A controller, external to the first and second bridges, accesses the configuration registers via the second bridge. A logic device allows the second bridge to send data to, and receive data from, the controller.