Patents by Inventor Peter Shah
Peter Shah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240123138Abstract: A fluid management and medical device system may include a fluid management system and a medical device. The fluid management system may include a pump configured to pump fluid to the medical device and a processing device configured to control the pump to maintain a target fluid flow range. The medical device may include an elongate shaft in fluid communication with the pump of the fluid management system, a pressure sensor, and a workstation in electronic communication with the pressure sensor and the processing device of the fluid management system. The processing device may be configured to adjust a fluid flow rate based on data received from the pressure sensor of the medical device and configured to verify the medical device is in a patient's body prior to adjusting the fluid flow rate based on the data received from the pressure sensor.Type: ApplicationFiled: December 22, 2023Publication date: April 18, 2024Applicant: BOSTON SCIENTIFIC SCIMED, INC.Inventors: VIVEK SHAH, PETER J. PEREIRA, NIRAJ PRASAD RAUNIYAR
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Patent number: 11953678Abstract: Aspects of the present disclosure describe systems, methods, and structures for aberration correction of optical phased arrays that employ a corrective optical path difference (OPD) in the near-field of an OPA to correct or cancel out aberrations in emitted beams of the OPA including those reaching far-field distances by generating a spatially-varying OPD across the aperture of the OPA that is substantially equal and opposite to an equivalent OPD of the aberration(s).Type: GrantFiled: March 16, 2021Date of Patent: April 9, 2024Assignee: Analog Photonics LLCInventors: Peter Nicholas Russo, Ehsan Shah Hosseini, Christopher Vincent Poulton, Erman Timurdogan, Diedrik Vermeulen, Michael Robert Watts, Michael J. Whitson
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Publication number: 20240108900Abstract: A system for adjusting neuromodulation parameters used by a neuromodulator operably connected to a plurality of electrodes to modulate a neural target, may comprise a translation trigger detector configured to determine that a translation trigger has occurred, a first parameter setting storage configured to store first parameter settings for use by the neuromodulator to modulate the neural target, and a neuromodulation parameter translator. The neuromodulation parameter translator may be operably connected to the translation trigger detector to automatically translate the first parameter settings into a second parameter settings in response to determining the translation trigger has occurred, and replace the first parameter settings with the second parameter settings, or store the second parameter settings in a second parameter setting storage.Type: ApplicationFiled: December 12, 2023Publication date: April 4, 2024Inventors: Richard Mustakos, Stephen Carcieri, Chirag Shah, Peter J. Yoo
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Patent number: 11946796Abstract: A method of generating feedback for a container load process includes: during a load process for a container at a load bay, controlling a sensor assembly disposed at the load bay to capture sensor data depicting an interior of the container; at a computing device connected to the sensor assembly, detecting, based on the sensor data, a wall of items placed in the container interior; determining, at the computing device from the sensor data: (i) a boundary attribute of the detected wall, and (ii) a composition attribute of the detected wall; comparing, at the computing device, (i) the boundary attribute to a boundary criterion, and (ii) the composition attribute to a composition criterion; and responsive to at least one of the boundary attribute not meeting the boundary criterion, or the composition attribute not meeting the composition attribute, generating an alert for transmission to a client computing device.Type: GrantFiled: August 18, 2021Date of Patent: April 2, 2024Assignee: Zebra Technologies CorporationInventors: Seth David Silk, Andrew Ehlers, Nirav Shah, Peter S. Carberry, IV
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Patent number: 11923883Abstract: A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.Type: GrantFiled: January 25, 2023Date of Patent: March 5, 2024Assignee: pSemi CorporationInventors: Rong Jiang, Khushali Shah, Peter Bacon
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Patent number: 11677408Abstract: A combined I/Q DAC is provided with a plurality of sources corresponding to a plurality of selectors in which the corresponding source drives the corresponding selector with a source signal to produce a corresponding pair of in-phase and quadrature-phase analog input signals to a summation network. Each selector routes its source signal responsive to a digital value of a corresponding in-phase and quadrature-phase bit pair.Type: GrantFiled: September 23, 2021Date of Patent: June 13, 2023Assignee: QUALCOMM IncorporatedInventors: Peter Shah, Matthew Sienko
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Publication number: 20230085720Abstract: A combined I/Q DAC is provided with a plurality of sources corresponding to a plurality of selectors in which the corresponding source drives the corresponding selector with a source signal to produce a corresponding pair of in-phase and quadrature-phase analog input signals to a summation network. Each selector routes its source signal responsive to a digital value of a corresponding in-phase and quadrature-phase bit pair.Type: ApplicationFiled: September 23, 2021Publication date: March 23, 2023Inventors: Peter Shah, Matthew Sienko
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Publication number: 20230073817Abstract: Certain aspects of the present disclosure generally relate to jamming detection for radio frequency (RF) front-end circuitry. For example, certain aspects provide an apparatus having a first counter configured to count a number of times that a power of a reception signal exceeds a first threshold. The apparatus also includes a second counter configured to count a number of measurements of the power of the reception signal. The apparatus further includes control logic having a first input coupled to an output of the first counter and having a second input coupled to an output of the second counter. The control logic is configured to determine an amount of jamming over a measurement window based on the number of times that the power of the reception signal exceeds the first threshold and on the number of measurements.Type: ApplicationFiled: September 7, 2021Publication date: March 9, 2023Inventors: Peter SHAH, Ajay Devadatta KANETKAR, Siavash EKBATANI, Yuanning YU, Shrenik PATEL, Dongjiang QIAO, Rajagopalan RANGARAJAN
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Patent number: 11502717Abstract: A switching mixer array is disclosed for the mixing of a digital LO signal with an analog input signal. Each switching mixer in the array is configured to assume either a first switching state or second switching state responsive to a respective bit of the digital LO signal.Type: GrantFiled: January 22, 2021Date of Patent: November 15, 2022Assignee: QUALCOMM IncoporatedInventors: Matthew Sienko, Peter Shah, Francesco Gatta
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Publication number: 20220303027Abstract: An RF power detector controls an amplitude of a replica input signal so that a power of the replica input signal substantially equals a power of an input signal to the RF power detector. A signal generator generates the replica input signal responsive to a digital control word. A feedback circuit adjusts the digital control word responsive to a comparison of output signals from an analog power sensor.Type: ApplicationFiled: March 19, 2021Publication date: September 22, 2022Inventor: Peter SHAH
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Patent number: 11451310Abstract: An RF power detector controls an amplitude of a replica input signal so that a power of the replica input signal substantially equals a power of an input signal to the RF power detector. A signal generator generates the replica input signal responsive to a digital control word. A feedback circuit adjusts the digital control word responsive to a comparison of output signals from an analog power sensor.Type: GrantFiled: March 19, 2021Date of Patent: September 20, 2022Assignee: QUALCOMM IncorporatedInventor: Peter Shah
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Publication number: 20220247445Abstract: A switching mixer array is disclosed for the mixing of a digital LO signal with an analog input signal. Each switching mixer in the array is configured to assume either a first switching state or second switching state responsive to a respective bit of the digital LO signal.Type: ApplicationFiled: January 22, 2021Publication date: August 4, 2022Inventors: Matthew SIENKO, Peter SHAH, Francesco GATTA
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Patent number: 10685128Abstract: Methods and systems for a networked computing system are provided. One method includes detecting that a processor executable, policy decision point (PDP) has not responded to a request for accessing data associated with a storage system; predicting a response to the request using a machine-learned, request-response association maintained by a processor executable training device; and presenting the predicted response to a processor executable, policy enforcement point (PEP) for granting access to the data and denying access to the data, based on the predicted response.Type: GrantFiled: February 15, 2018Date of Patent: June 16, 2020Assignee: NETAPP, INC.Inventors: David Anthony Slik, James Alan Kelley, Peter Shah
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Patent number: 10664001Abstract: A circuit includes a first transistor that conducts a first current responsive to a DC bias voltage and an RF signal. A second transistor conducts a second current responsive to the DC bias voltage. The first current and the second current are mirrored through a pair of current mirrors coupled together through a low-pass filter to filter the envelope of the RF signal.Type: GrantFiled: March 18, 2019Date of Patent: May 26, 2020Assignee: QUALCOMM IncorporatedInventors: Mohamed Abouzied, Rajagopalan Rangarajan, Peter Shah
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Publication number: 20200073428Abstract: A circuit includes a first transistor that conducts a first current responsive to a DC bias voltage and an RF signal. A second transistor conducts a second current responsive to the DC bias voltage. The first current and the second current are mirrored through a pair of current mirrors coupled together through a low-pass filter to filter the envelope of the RF signal.Type: ApplicationFiled: March 18, 2019Publication date: March 5, 2020Inventors: Mohamed Abouzied, Rajagopalan Rangarajan, Peter Shah
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Publication number: 20190251273Abstract: Methods and systems for a networked computing system are provided. One method includes detecting that a processor executable, policy decision point (PDP) has not responded to a request for accessing data associated with a storage system; predicting a response to the request using a machine-learned, request-response association maintained by a processor executable training device; and presenting the predicted response to a processor executable, policy enforcement point (PEP) for granting access to the data and denying access to the data, based on the predicted response.Type: ApplicationFiled: February 15, 2018Publication date: August 15, 2019Applicant: NETAPP, INC.Inventors: David Anthony Slik, James Alan Kelley, Peter Shah
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Patent number: 10289579Abstract: A host integrated circuit is provided with an interrupt aggregator having a signal terminal for coupling to the signal end of an R-2R resistor ladder that has a plurality of rungs corresponding to a plurality of peripheral devices. The interrupt aggregator is configured to process a voltage signal received at the signal terminal to identify any of the peripheral device that intend to trigger an interrupt to a processor.Type: GrantFiled: December 10, 2015Date of Patent: May 14, 2019Assignee: QUALCOMM IncorporatedInventors: Lalan Jee Mishra, Richard Dominic Wietfeldt, Peter Shah
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Publication number: 20190025872Abstract: Methods and USB devices correlating clock domains are presented. A USB device includes at least one signal line adapted to carry signals in a first clock domain. The signals are received from a USB host. A clock operates a second clock domain. A periodic packet detection circuit detects a missing periodic packet from the signals received in the first clock domain. A device controller correlates a USB operation in the second clock domain with the first clock domain based on the periodic packet detection circuit detecting the missing periodic packet. A USB device includes at least one signal line carrying UTMI or ULPI signaling. A USB controller decodes packet identification from the UTMI or ULPI signaling. A periodic packet detection circuit, separate from the USB controller, decodes packet identification from the UTMI or ULPI signaling.Type: ApplicationFiled: July 18, 2017Publication date: January 24, 2019Inventors: Ren Li, Peter Shah, Matthew Sienko, Hui-ya Liao Nelson, Stefan Rohrer, Arash Mehrabi, Stefan Mueller, Ralf Herz, Magesh Hariharan, Maoxin Wei
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Patent number: 9916250Abstract: A method, device, and non-transitory computer readable medium that dynamically allocates cache resources includes monitoring a hit or miss rate of a service level objective for each of a plurality of prior workloads and a performance of each of a plurality of cache storage resources. At least one configuration for the cache storage resources for one or more current workloads is determined based at least on a service level objective for each of the current workloads, the monitored hit or miss rate for each of the plurality of prior workloads and the monitored performance of each of the plurality of cache storage resources. The cache storage resources are dynamically partitioned among each of the current workloads based on the determined configuration.Type: GrantFiled: February 21, 2017Date of Patent: March 13, 2018Assignee: NetApp, Inc.Inventors: Peter Shah, Keith Smith
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Patent number: 9836407Abstract: A method, device, and non-transitory computer readable medium that dynamically allocates cache resources includes monitoring a hit or miss rate of a service level objective for each of a plurality of prior workloads and a performance of each of a plurality of cache storage resources. At least one configuration for the cache storage resources for one or more current workloads is determined based at least on a service level objective for each of the current workloads, the monitored hit or miss rate for each of the plurality of prior workloads and the monitored performance of each of the plurality of cache storage resources. The cache storage resources are dynamically partitioned among each of the current workloads based on the determined configuration.Type: GrantFiled: October 23, 2014Date of Patent: December 5, 2017Assignee: NetApp, Inc.Inventors: Peter Shah, Keith Smith