Abstract: Provided herein is an apparatus including a first CMOS wafer and a second CMOS wafer. A number of eutectic bonds connect the first CMOS wafer to the second CMOS wafer. The eutectic bond includes combinations where the eutectic bonding temperature is lower than the maximum temperature a CMOS circuit can withstand without being damaged during processing.

Abstract: An integrated MEMS device comprises two substrates where the first and second substrates are coupled together and have two enclosures there between. One of the first and second substrates includes an outgassing source layer and an outgassing barrier layer to adjust pressure within the two enclosures. The method includes depositing and patterning an outgassing source layer and a first outgassing barrier layer on the substrate, resulting in two cross-sections. In one of the two cross-sections a top surface of the outgassing source layer is not covered by the outgassing barrier layer and in the other of the two cross-sections the outgassing source layer is encapsulated in the outgassing barrier layer. The method also includes depositing conformally a second outgassing barrier layer and etching the second outgassing barrier layer such that a spacer of the second outgassing barrier layer is left on sidewalls of the outgassing source layer.

Abstract: Provided herein is a method including forming a trench in a handle substrate, and a trench lining is formed in the trench. A first cavity and a second cavity are formed in the handle substrate, wherein the first cavity is connected to the trench. A first MEMS structure and the handle substrate are sealed for maintaining a first pressure within the trench and the first cavity. A second MEMS structure and the handle substrate are sealed for maintaining the first pressure within the second cavity. A portion of the trench lining is exposed, and the first pressure is changed to a second pressure within the first cavity. The first cavity and the trench are sealed to maintain the second pressure within the trench and the first cavity.

Abstract: A method for forming a MEMS device is disclosed. The MEMS device includes a MEMS substrate and a base substrate. The MEMS substrate, where includes a handle layer, a device layer and an insulating layer in between. The method includes the sequential steps of: providing a standoff on the device layer; etching a via through the device layer and the insulating layer; providing a contact layer within the via, wherein the contact layer provides electrical connection between the device layer and the handle layer; providing a bonding layer on the standoff; and bonding the bonding layer to pads on the base substrate.

Abstract: An improved FinFET has a gate structure on only a portion of the available surface on a fin, thereby providing a FinFET with a finer granularity width dimension. To form the FinFET, a first etch-resistant sacrificial layer and a second etch-resistant spacer layer are formed on the fin. The spacer layer is etched anisotropically to remove the spacer layer from the top and upper sidewalls of the fin while leaving the spacer layer on the lower sidewalls of the FinFET. A gate dielectric and conducting layer are then deposited and shaped to form a structure that is effective as a gate only on the top and upper sidewalls of the fin.

Abstract: An integrated MEMS device comprises two substrates where the first and second substrates are coupled together and have two enclosures there between. One of the first and second substrates includes an outgassing source layer and an outgassing barrier layer to adjust pressure within the two enclosures. The method includes depositing and patterning an outgassing source layer and a first outgassing barrier layer on the substrate, resulting in two cross-sections. In one of the two cross-sections a top surface of the outgassing source layer is not covered by the outgassing barrier layer and in the other of the two cross-sections the outgassing source layer is encapsulated in the outgassing barrier layer.

Abstract: A method and system for providing a MEMS sensor integrated with a flip chip are disclosed. In a first aspect, the system comprises a MEMS sensor, at least one flip chip coupled to the MEMS sensor, and at least one through-silicon via (TSV) that electrically connects the at least one flip chip to the MEMS sensor. In a second aspect, the system comprises a MEMS sensor that includes a CMOS coupled to a MEMS structure, wherein the CMOS comprises a substrate coupled to an interconnect in contact with the MEMS structure. The system further comprises a plurality of flip chips coupled to the substrate, a plurality of TSV that electrically connect the plurality of flip chips to the interconnect, and a plurality of layers on the substrate to provide electrical connections between the plurality of flip chips and from the plurality of flip chips to at least one external component.

Abstract: A MEMS device is disclosed. The MEMS device includes a first substrate. At least one structure is formed within the first substrate. The first substrate includes at least one first conductive pad thereon. The MEMS device also includes a second substrate. The second substrate includes a passivation layer. The passivation layer includes a plurality of layers. A top layer of the plurality of layers comprises an outgassing barrier layer. At least one second conductive pad and at least one electrode are coupled to the top layer. At least one first conductive pad is coupled to the at least one second conductive pad.

Abstract: A method and system for forming a MEMS device are disclosed. In a first aspect, the method comprises providing a conductive material over at least a portion of a top metal layer of a base substrate, patterning the conductive material and the at least a portion of the top metal layer, and bonding the conductive material with a device layer of a MEMS substrate via metal silicide formation. In a second aspect, the MEMS device comprises a MEMS substrate, wherein the MEMS substrate includes a handle layer, a device layer, and an insulating layer in between. The MEMS device further comprises a base substrate, wherein the base substrate includes a top metal layer and a conductive material over at least a portion of the top metal layer, wherein the conductive material is bonded with the device layer via metal silicide formation.

Abstract: A MEMS device is disclosed. The MEMS device includes a first substrate. At least one structure is formed within the first substrate. The first substrate includes at least one first conductive pad thereon. The MEMS device also includes a second substrate. The second substrate includes a passivation layer. The passivation layer includes a plurality of layers. A top layer of the plurality of layers comprises an outgassing barrier layer. At least one second conductive pad and at least one electrode are coupled to the top layer. At least one first conductive pad is coupled to the at least one second conductive pad.

Abstract: An improved FinFET has a gate structure on only a portion of the available surface on a fin, thereby providing a FinFET with a finer granularity width dimension. To form the FinFET, a first etch-resistant sacrificial layer and a second etch-resistant spacer layer are formed on the fin. The spacer layer is etched anisotropically to remove the spacer layer from the top and upper sidewalls of the fin while leaving the spacer layer on the lower sidewalls of the FinFET. A gate dielectric and conducting layer are then deposited and shaped to form a structure that is effective as a gate only on the top and upper sidewalls of the fin.

Abstract: A sensor chip combining a substrate comprising at least one CMOS circuit, a MEMS substrate and another substrate comprising at least one CMOS circuit in one package that is vertically stacked is disclosed. The package comprises a sensor chip further comprising a first substrate with a first surface and a second surface comprising at least one CMOS circuit; a MEMS substrate with a first surface and a second surface; and a second substrate comprising at least one CMOS circuit. Where the first surface of the first substrate is attached to a packaging substrate and the second surface of the first substrate is attached to the first surface of the MEMS substrate. The second surface of the MEMS substrate is attached to the second substrate. The first substrate, the MEMS substrate, the second substrate and the packaging substrate are mechanically attached and provided with electrical inter-connects.

Abstract: A method for forming a MEMS device is disclosed. The MEMS device includes a MEMS substrate and a base substrate. The MEMS substrate, where includes a handle layer, a device layer and an insulating layer in between. The method includes the sequential steps of: providing a standoff on the device layer; etching a via through the device layer and the insulating layer; providing a contact layer within the via, wherein the contact layer provides electrical connection between the device layer and the handle layer; providing a bonding layer on the standoff; and bonding the bonding layer to pads on the base substrate.

Abstract: Provided herein is a method including forming a trench in a handle substrate, and a trench lining is formed in the trench. A first cavity and a second cavity are formed in the handle substrate, wherein the first cavity is connected to the trench. A first MEMS structure and the handle substrate are sealed for maintaining a first pressure within the trench and the first cavity. A second MEMS structure and the handle substrate are sealed for maintaining the first pressure within the second cavity. A portion of the trench lining is exposed, and the first pressure is changed to a second pressure within the first cavity. The first cavity and the trench are sealed to maintain the second pressure within the trench and the first cavity.

Abstract: A method of providing a CMOS-MEMS structure is disclosed. The method comprises patterning a first top metal on a MEMS actuator substrate and a second top metal on a CMOS substrate. Each of the MEMS actuator substrate and the CMOS substrate include an oxide layer thereon. The method includes etching each of the oxide layers on the MEMS actuator substrate and the base substrate, utilizing a first bonding step to bond the first patterned top metal of the MEMS actuator substrate to the second patterned top metal of the base substrate. Finally the method includes etching an actuator layer into the MEMS actuator substrate and utilizing a second bonding step to bond the MEMS actuator substrate to a MEMS handle substrate.

Abstract: Provided herein is an apparatus including a first CMOS wafer and a second CMOS wafer. A number of eutectic bonds connect the first CMOS wafer to the second CMOS wafer. The eutectic bond includes combinations where the eutectic bonding temperature is lower than the maximum temperature a CMOS circuit can withstand without being damaged during processing.

Abstract: A MEMS device is disclosed. The MEMS device includes a first substrate. At least one structure is formed within the first substrate. The first substrate includes at least one first conductive pad thereon. The MEMS device also includes a second substrate. The second substrate includes a passivation layer. The passivation layer includes a plurality of layers. A top layer of the plurality of layers comprises an outgassing barrier layer. At least one second conductive pad and at least one electrode are coupled to the top layer. At least one first conductive pad is coupled to the at least one second conductive pad.

Abstract: An integrated circuit may include interconnects formed from alternating metal interconnect layers and inter-metal dielectric layers. A metal-insulator-metal capacitor may be formed within a selected inter-metal dielectric layer. The metal-insulator-metal capacitor may include first and second capacitor electrodes. The first capacitor electrode may contact a first conductive interconnect line in an underlying metal interconnect layer. The second capacitor electrode may overlap the first capacitor electrode and a portion of a second conductive interconnect line in the underlying metal layer. A via may be formed between the underlying metal interconnect layer and an additional metal interconnect layer. The via may simultaneously contact the second capacitor electrode and the second conductive interconnect line.

Abstract: A MEMS device having a channel configured to avoid particle contamination is disclosed. The MEMS device includes a MEMS substrate and a base substrate. The MEMS substrate includes a MEMS device area, a seal ring and a channel. The seal ring provides for dividing the MEMS device area into a plurality of cavities, wherein at least one of the plurality of cavities includes one or more vent holes. The channel is configured between the one or more vent holes and the MEMS device area. Preferably, the channel is configured to minimize particles entering the MEMS device area directly. The base substrate is coupled to the MEMS device substrate.

Abstract: A method and system for providing a MEMS sensor integrated with a flip chip are disclosed. In a first aspect, the system comprises a MEMS sensor, at least one flip chip coupled to the MEMS sensor, and at least one through-silicon via (TSV) that electrically connects the at least one flip chip to the MEMS sensor. In a second aspect, the system comprises a MEMS sensor that includes a CMOS coupled to a MEMS structure, wherein the CMOS comprises a substrate coupled to an interconnect in contact with the MEMS structure. The system further comprises a plurality of flip chips coupled to the substrate, a plurality of TSV that electrically connect the plurality of flip chips to the interconnect, and a plurality of layers on the substrate to provide electrical connections between the plurality of flip chips and from the plurality of flip chips to at least one external component.