Patents by Inventor Peter STONES
Peter STONES has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11931713Abstract: A data storage medium is disclosed comprising a solid support matrix including an optional stabilising reagent or reagents in a dry form, for use as a support for artificially synthesised oligonucleotide sequences encoded with data. Preferably the matrix is fibrous (for example cellulose, or glass, fibres) formed into a support of sufficient strength to hold the oligonucleotide sequences. The stabilising reagents are preferably a combination of a weak base, and a chelating agent, optionally, uric acid or a urate salt, and optionally an anionic surfactant.Type: GrantFiled: November 26, 2014Date of Patent: March 19, 2024Assignee: Global Life Sciences Solutions Operations UK LtdInventors: Jeffrey Kenneth Horton, Peter James Tatnell, Robert Stone
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Publication number: 20240075641Abstract: A razor cartridge having a housing including a frame with a non-cutting element, a guard and a cap. The non-cutting element has a plurality of open slots defined between a pair of projections disposed next to each other. A first razor blade is positioned between the guard and the non-cutting element and has a blade edge extending toward the guard. The non-cutting element is spaced apart from the first razor blade. A second razor blade is positioned between the non-cutting element and the cap and has a blade edge extending toward the guard. The non-cutting element is spaced apart from the second razor blade. A first rinse-through gap between the first razor blade and the non-cutting element of about 0.05 mm to about 0.5 mm. A second rinse-through gap between the second razor blade and the non-cutting of about 0.05 mm to about 0.6 mm.Type: ApplicationFiled: November 13, 2023Publication date: March 7, 2024Inventors: Sean Peter Clarke, Ashok Bakul Patel, Matthew Robert Stone
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Patent number: 11918943Abstract: A turbine engine having a compressor section, a combustor section, a turbine section, and a rotatable drive shaft that couples a portion of the turbine section and a portion of the compressor section. A bypass conduit couples the compressor section to the turbine section while bypassing at least the combustion section. At least one particle separator is located in the turbine engine having a separator inlet that receives a bypass stream, a separator outlet that receives a reduced-particle stream flows, and a particle outlet that receives a concentrated-particle stream comprising separated particles. A conduit, fluidly coupled to the particle outlet, extends through an interior of at least one stationary vane.Type: GrantFiled: November 23, 2022Date of Patent: March 5, 2024Assignee: General Electric CompanyInventors: Timothy Deryck Stone, Gregory Michael Laskowski, Robert Proctor, Curtis Stover, Robert Francis Manning, Victor Hugo Silva Correia, Jared Peter Buhler, Robert Carl Murray, Corey Bourassa, Byron Andrew Pritchard, Jr., Jonathan Russell Ratzlaff
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Patent number: 11885567Abstract: A method of recording images within a furnace using a thermal imaging camera comprising a bore scope connected to a digital camera unit is described, comprising the steps of: (a) inserting the borescope into the interior of the furnace, (b) collecting one of more images of the interior of the furnace using the thermal imaging camera with the borescope at a first position, and (c) moving the borescope from the first position to a second position and collecting one or more images of the interior of the furnace as the borescope is moved from the first position to the second position, wherein the borescope movement is guided by means of a guide device comprising a movable borescope mounting, mounted externally on the furnace.Type: GrantFiled: May 18, 2020Date of Patent: January 30, 2024Assignee: JOHNSON MATTHEY PUBLIC LIMITED COMPANYInventors: Matthew John Cousins, Michael Davies, Andrew Johnson, Peter Stones, Paul White
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Publication number: 20230368041Abstract: Experience replay (ER) is an important component of many deep reinforcement learning (RL) systems. However, uniform sampling from an ER buffer can lead to slow convergence and unstable asymptotic behaviors. Stratified Sampling from Event Tables (SSET), which partitions an ER buffer into Event Tables, each capturing important subsequences of optimal behavior. A theoretical advantage is proven over the traditional monolithic buffer approach and the combination of SSET with an existing prioritized sampling strategy can further improve learning speed and stability. Empirical results in challenging MiniGrid domains, benchmark RL environments, and a high-fidelity car racing simulator demonstrate the advantages and versatility of SSET over existing ER buffer sampling approaches.Type: ApplicationFiled: April 6, 2023Publication date: November 16, 2023Inventors: Varun Kompella, Thomas Walsh, Samuel Barrett, Peter Wurman, Peter Stone
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Publication number: 20230199151Abstract: A method and apparatus are disclosed for enabling an existing wire supplying DC current to an electrical load of a vehicle to serve as a clean line for transmission of a data signal without interference from electrical systems of the vehicle. The method comprises identifying opposite ends of the existing wire, cutting the wire at the opposite ends and inserting a respective inductor in series with the wire at each of the opposite ends, to define an intermediate wire section that extends between the two inductors, and coupling data transmitting and receiving units to the intermediate section of the wire to permit data transfer between the transmitting and receiving units.Type: ApplicationFiled: April 15, 2021Publication date: June 22, 2023Applicant: SCC Worldwide LTDInventors: Joe Stewart, Peter Stone
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Publication number: 20230116550Abstract: Provided are flexible hybrid interconnect circuits and methods of forming thereof. A flexible hybrid interconnect circuit comprises multiple conductive layers, stacked and spaced apart along the thickness of the circuit. Each conductive layer comprises one or more conductive elements, one of which is operable as a high frequency (HF) signal line. Other conductive elements, in the same and other conductive layers, form an electromagnetic shield around the HF signal line. Some conductive elements in the same circuit are used for electrical power transmission. All conductive elements are supported by one or more inner dielectric layers and enclosed by outer dielectric layers. The overall stack is thin and flexible and may be conformally attached to a non-planar surface. Each conductive layer may be formed by patterning the same metallic sheet. Multiple pattern sheets are laminated together with inner and outer dielectric layers to form a flexible hybrid interconnect circuit.Type: ApplicationFiled: October 31, 2022Publication date: April 13, 2023Applicant: CelLink CorporationInventors: Kevin Michael Coakley, Malcom Parker Brown, Jose Juarez, Emily Hernandez, Joseph Pratt, Peter Stone, Vidya Viswanath, Will Findlay
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Patent number: 11516904Abstract: Provided are flexible hybrid interconnect circuits and methods of forming thereof. A flexible hybrid interconnect circuit comprises multiple conductive layers, stacked and spaced apart along the thickness of the circuit. Each conductive layer comprises one or more conductive elements, one of which is operable as a high frequency (HF) signal line. Other conductive elements, in the same and other conductive layers, form an electromagnetic shield around the HF signal line. Some conductive elements in the same circuit are used for electrical power transmission. All conductive elements are supported by one or more inner dielectric layers and enclosed by outer dielectric layers. The overall stack is thin and flexible and may be conformally attached to a non-planar surface. Each conductive layer may be formed by patterning the same metallic sheet. Multiple pattern sheets are laminated together with inner and outer dielectric layers to form a flexible hybrid interconnect circuit.Type: GrantFiled: November 17, 2021Date of Patent: November 29, 2022Assignee: CelLink CorporationInventors: Kevin Michael Coakley, Malcolm Parker Brown, Jose Juarez, Emily Hernandez, Joseph Pratt, Peter Stone, Vidya Viswanath, Will Findlay
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Publication number: 20220221225Abstract: A method of recording images within a furnace using a thermal imaging camera comprising a bore scope connected to a digital camera unit is described, comprising the steps of: (a) inserting the borescope into the interior of the furnace, (b) collecting one of more images of the interior of the furnace using the thermal imaging camera with the borescope at a first position, and (c) moving the borescope from the first position to a second position and collecting one or more images of the interior of the furnace as the borescope is moved from the first position to the second position, wherein the borescope movement is guided by means of a guide device comprising a movable borescope mounting, mounted externally on the furnace.Type: ApplicationFiled: May 18, 2020Publication date: July 14, 2022Inventors: Matthew John COUSINS, Michael DAVIES, Andrew JOHNSON, Peter STONES, Paul WHITE
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Publication number: 20220101064Abstract: A task prioritized experience replay (TaPER) algorithm enables simultaneous learning of multiple RL tasks off policy. The algorithm can prioritize samples that were part of fixed length episodes that led to the achievement of tasks. This enables the agent to quickly learn task policies by bootstrapping over its early successes. Finally, TaPER can improve performance on all tasks simultaneously, which is a desirable characteristic for multi-task RL. Unlike conventional ER algorithms that are applied to single RL task learning settings or that require rewards to be binary or abundant, or are provided as a parameterized specification of goals, TaPER poses no such restrictions and supports arbitrary reward and task specifications.Type: ApplicationFiled: September 29, 2020Publication date: March 31, 2022Inventors: Varun Kompella, James MacGlashan, Peter Wurman, Peter STONE
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Publication number: 20220078902Abstract: Provided are flexible hybrid interconnect circuits and methods of forming thereof. A flexible hybrid interconnect circuit comprises multiple conductive layers, stacked and spaced apart along the thickness of the circuit. Each conductive layer comprises one or more conductive elements, one of which is operable as a high frequency (HF) signal line. Other conductive elements, in the same and other conductive layers, form an electromagnetic shield around the HF signal line. Some conductive elements in the same circuit are used for electrical power transmission. All conductive elements are supported by one or more inner dielectric layers and enclosed by outer dielectric layers. The overall stack is thin and flexible and may be conformally attached to a non-planar surface. Each conductive layer may be formed by patterning the same metallic sheet. Multiple pattern sheets are laminated together with inner and outer dielectric layers to form a flexible hybrid interconnect circuit.Type: ApplicationFiled: November 17, 2021Publication date: March 10, 2022Applicant: CelLink CorporationInventors: Kevin Michael Coakley, Malcolm Parker Brown, Jose Juarez, Emily Hernandez, Joseph Pratt, Peter Stone, Vidya Viswanath, Will Findlay
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Patent number: 11206730Abstract: Provided are flexible hybrid interconnect circuits and methods of forming thereof. A flexible hybrid interconnect circuit comprises multiple conductive layers, stacked and spaced apart along the thickness of the circuit. Each conductive layer comprises one or more conductive elements, one of which is operable as a high frequency (HF) signal line. Other conductive elements, in the same and other conductive layers, form an electromagnetic shield around the HF signal line. Some conductive elements in the same circuit are used for electrical power transmission. All conductive elements are supported by one or more inner dielectric layers and enclosed by outer dielectric layers. The overall stack is thin and flexible and may be conformally attached to a non-planar surface. Each conductive layer may be formed by patterning the same metallic sheet. Multiple pattern sheets are laminated together with inner and outer dielectric layers to form a flexible hybrid interconnect circuit.Type: GrantFiled: November 17, 2020Date of Patent: December 21, 2021Assignee: CelLink CorporationInventors: Kevin Michael Coakley, Malcolm Parker Brown, Jose Juarez, Emily Hernandez, Joseph Pratt, Peter Stone, Vidya Viswanath, Will Findlay
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Patent number: 11087979Abstract: Implementations of the present disclosure generally relate to methods and apparatuses for epitaxial deposition on substrate surfaces. More particularly, implementations of the present disclosure generally relate to methods and apparatuses for surface preparation prior to epitaxial deposition. In one implementation, a method of processing a substrate is provided. The method comprises etching a surface of a silicon-containing substrate by use of a plasma etch process, where at least one etching process gas comprising chlorine gas and an inert gas is used during the plasma etch process and forming an epitaxial layer on the surface of the silicon-containing substrate.Type: GrantFiled: February 4, 2019Date of Patent: August 10, 2021Assignee: Applied Materials, Inc.Inventors: Christopher S. Olsen, Peter Stone, Teng-fang Kuo, Ping Han Hsieh, Manoj Vellaikal
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Patent number: 11054211Abstract: The electromagnetic launcher with at least two power coils spaced from each other along an axis substantially coextensive with an intended trajectory of non-conductive, non-magnetic projectile with a projectile winding shorted by a diode. The power coils to inductively couple a magnetic flux to the projectile winding. A non-magnetic, electrically conductive electromagnetic shield positioned inside to each of power coils. Each shield has a central opening and at least one radial cut. The power coils with shields in this position keep holding by non-conductive, non-magnetic holder with the same size of central opening as the central openings of shields. A diameter of central opening is less than inner diameter of power coils and more than outer diameter of projectile. Circuit means connected to power coils for selectively and sequentially applying pulse voltages to power coils to excite the projectile winding and accelerate the projectile by pushing and pulling electromagnetic forces simultaneously.Type: GrantFiled: March 27, 2020Date of Patent: July 6, 2021Inventor: Peter Stone
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Publication number: 20210076485Abstract: Provided are flexible hybrid interconnect circuits and methods of forming thereof. A flexible hybrid interconnect circuit comprises multiple conductive layers, stacked and spaced apart along the thickness of the circuit. Each conductive layer comprises one or more conductive elements, one of which is operable as a high frequency (HF) signal line. Other conductive elements, in the same and other conductive layers, form an electromagnetic shield around the HF signal line. Some conductive elements in the same circuit are used for electrical power transmission. All conductive elements are supported by one or more inner dielectric layers and enclosed by outer dielectric layers. The overall stack is thin and flexible and may be conformally attached to a non-planar surface. Each conductive layer may be formed by patterning the same metallic sheet. Multiple pattern sheets are laminated together with inner and outer dielectric layers to form a flexible hybrid interconnect circuit.Type: ApplicationFiled: November 17, 2020Publication date: March 11, 2021Applicant: CelLink CorporationInventors: Kevin Michael Coakley, Malcolm Parker Brown, Jose Juarez, Emily Hernandez, Joseph Pratt, Peter Stone, Vidya Viswanath, Will Findlay
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Publication number: 20210010160Abstract: Embodiments of the present invention generally relate to methods for removing contaminants and native oxides from substrate surfaces. The methods generally include removing contaminants disposed on the substrate surface using a plasma process, and then cleaning the substrate surface by use of a remote plasma assisted dry etch process.Type: ApplicationFiled: September 29, 2020Publication date: January 14, 2021Inventors: Christopher S. OLSEN, Theresa Kramer GUARINI, Jeffrey A. TOBIN, Lara HAWRYLCHAK, Peter STONE, Chi Wei LO, Saurabh CHOPRA
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Patent number: 10874015Abstract: Provided are flexible hybrid interconnect circuits and methods of forming thereof. A flexible hybrid interconnect circuit comprises multiple conductive layers, stacked and spaced apart along the thickness of the circuit. Each conductive layer comprises one or more conductive elements, one of which is operable as a high frequency (HF) signal line. Other conductive elements, in the same and other conductive layers, form an electromagnetic shield around the HF signal line. Some conductive elements in the same circuit are used for electrical power transmission. All conductive elements are supported by one or more inner dielectric layers and enclosed by outer dielectric layers. The overall stack is thin and flexible and may be conformally attached to a non-planar surface. Each conductive layer may be formed by patterning the same metallic sheet. Multiple pattern sheets are laminated together with inner and outer dielectric layers to form a flexible hybrid interconnect circuit.Type: GrantFiled: April 16, 2020Date of Patent: December 22, 2020Assignee: CELLINK CORPORATIONInventors: Kevin Michael Coakley, Malcolm Parker Brown, Jose Juarez, Emily Hernandez, Joseph Pratt, Peter Stone, Vidya Viswanath, Will Findlay
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Patent number: 10861693Abstract: Implementations of the present disclosure generally relate to methods and apparatuses for epitaxial deposition on substrate surfaces. More particularly, implementations of the present disclosure generally relate to methods and apparatuses for surface preparation prior to epitaxial deposition. In one implementation, a method of processing a substrate is provided. The method comprises etching a surface of a silicon-containing substrate by use of a plasma etch process to form an etched surface of the silicon-containing substrate and forming an epitaxial layer on the etched surface of the silicon-containing substrate. The plasma etch process comprises flowing an etchant gas mixture comprising a fluorine-containing precursor and a hydrogen-containing precursor into a substrate-processing region of a first processing chamber and forming a plasma from the etchant gas mixture flowed into the substrate-processing region.Type: GrantFiled: December 12, 2016Date of Patent: December 8, 2020Assignee: Applied Materials, Inc.Inventors: Peter Stone, Christopher S. Olsen, Teng-fang Kuo, Ping Han Hsieh, Zhenwen Ding
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Patent number: 10837122Abstract: Embodiments of the present invention generally relate to methods for removing contaminants and native oxides from substrate surfaces. The methods generally include removing contaminants disposed on the substrate surface using a plasma process, and then cleaning the substrate surface by use of a remote plasma assisted dry etch process.Type: GrantFiled: August 26, 2019Date of Patent: November 17, 2020Assignee: APPLIED MATERIALS, INC.Inventors: Christopher S. Olsen, Theresa K. Guarini, Jeffrey Tobin, Lara Hawrylchak, Peter Stone, Chi Wei Lo, Saurabh Chopra
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Publication number: 20200245449Abstract: Provided are flexible hybrid interconnect circuits and methods of forming thereof. A flexible hybrid interconnect circuit comprises multiple conductive layers, stacked and spaced apart along the thickness of the circuit. Each conductive layer comprises one or more conductive elements, one of which is operable as a high frequency (HF) signal line. Other conductive elements, in the same and other conductive layers, form an electromagnetic shield around the HF signal line. Some conductive elements in the same circuit are used for electrical power transmission. All conductive elements are supported by one or more inner dielectric layers and enclosed by outer dielectric layers. The overall stack is thin and flexible and may be conformally attached to a non-planar surface. Each conductive layer may be formed by patterning the same metallic sheet. Multiple pattern sheets are laminated together with inner and outer dielectric layers to form a flexible hybrid interconnect circuit.Type: ApplicationFiled: April 16, 2020Publication date: July 30, 2020Applicant: CelLink CorporationInventors: Kevin Michael Coakley, Malcolm Parker Brown, Jose Juarez, Emily Hernandez, Joseph Pratt, Peter Stone, Vidya Viswanath, Will Findlay