Abstract: A frequency-dependent resistor and circuitry employing the same are provided. In some embodiments, a resistor includes a substrate, an input port, an output port, and a conductive trace on the substrate between the input port and the output port. A resistance between the input port and the output port for a low frequency signal is at least five times lower than the resistance between the input port and the output port for an RF signal and the ratio of the frequencies of the RF signal to the low frequency signal is at least fifty. Circuitry including a transistor adapted to selectively couple the input to the output in response to a control signal provided via a resistor with resistance for a low frequency signal at least five times lower than resistance for an RF signal will have a reduced switching time while still isolating the RF signal.

Abstract: The present disclosure provides a method for fabricating a compound varactor. The method includes steps of depositing a collector layer, depositing a first base layer arranged in a first plurality of parallel fingers directly onto the collector layer, and depositing a second base layer arranged in a second plurality of parallel fingers that are interleaved with the first plurality of parallel fingers directly onto the collector layer.

Abstract: Embodiments include semiconductor devices related to compound varactor circuits. Specifically, a semiconductor device may be constructed of a modified anti-series string of varactor pairs, wherein one varactor in a varactor pair has an effective area larger than the other varactor. Varactor pairs in the anti-series string are arranged such that adjacent varactors coupling varactor pairs have equal effective areas. In some embodiments, the anti-series string may have four varactors (two varactor pairs.) In other embodiments, the anti-series string may have eight varactors (four varactor pairs) or twelve varactors (six varactor pairs). The compound varactor using the modified anti-series string of varactor pairs may be advantageous in reducing second harmonics related to parasitic capacitances in anti-series varactor applications.

Abstract: A frequency-dependent resistor and circuitry employing the same are provided. In some embodiments, a resistor includes a substrate, an input port, an output port, and a conductive trace on the substrate between the input port and the output port. A resistance between the input port and the output port for a low frequency signal is at least five times lower than the resistance between the input port and the output port for an RF signal and the ratio of the frequencies of the RF signal to the low frequency signal is at least fifty. Circuitry including a transistor adapted to selectively couple the input to the output in response to a control signal provided via a resistor with resistance for a low frequency signal at least five times lower than resistance for an RF signal will have a reduced switching time while still isolating the RF signal.

Abstract: The present disclosure provides a method for fabricating a compound varactor. The method includes steps of depositing a collector layer, depositing a first base layer arranged in a first plurality of parallel fingers directly onto the collector layer, and depositing a second base layer arranged in a second plurality of parallel fingers that are interleaved with the first plurality of parallel fingers directly onto the collector layer.

Abstract: Embodiments include semiconductor devices related to compound varactor circuits. Specifically, a semiconductor device may be constructed of a modified anti-series string of varactor pairs, wherein one varactor in a varactor pair has an effective area larger than the other varactor. Varactor pairs in the anti-series string are arranged such that adjacent varactors coupling varactor pairs have equal effective areas. In some embodiments, the anti-series string may have four varactors (two varactor pairs.) In other embodiments, the anti-series string may have eight varactors (four varactor pairs) or twelve varactors (six varactor pairs). The compound varactor using the modified anti-series string of varactor pairs may be advantageous in reducing second harmonics related to parasitic capacitances in anti-series varactor applications.

Abstract: Embodiments include apparatuses and methods related to a compound varactor. A first varactor in the compound varactor may include a collector layer and a first base layer that is arranged in a first plurality of parallel fingers. A second varactor in the compound varactor may include a second base layer arranged in a second plurality of parallel fingers, and the base layer may be coupled with the collector layer. In embodiments, the fingers of the base layers of the first varactor and the second varactor may be interleaved with one another. Other embodiments may be disclosed or claimed herein.

Abstract: Embodiments include apparatuses and methods related to a compound varactor. A first varactor in the compound varactor may include a collector layer and a first base layer that is arranged in a first plurality of parallel fingers. A second varactor in the compound varactor may include a second base layer arranged in a second plurality of parallel fingers, and the base layer may be coupled with the collector layer. In embodiments, the fingers of the base layers of the first varactor and the second varactor may be interleaved with one another. Other embodiments may be disclosed or claimed herein.

Abstract: A semiconductor device includes a first varactor diode and a second varactor diode. The second varactor diode is coupled in series with the first varactor diode and vertically disposed over the first varactor diode. By vertically disposing the second varactor diode over the first varactor diode, the space occupied by the pair of varactor diodes can be significantly reduced.

Abstract: Embodiments include apparatuses and methods related to vertically stacked varactors. Specifically two varactors may be constructed of vertically stacked layers including an anode layer, a contact layer, and a varactor layer. The two varactors may share one or more layers in common and may be electrically coupled to form a parallel varactor pair. In some embodiments the two varactors may share the anode layer in common, while in other embodiments the two varactors may share the contact layer in common. The parallel varactor pair may be advantageous in reducing die area for compound varactor circuits.

Abstract: Embodiments include apparatuses and methods related to a compound varactor. A first varactor in the compound varactor may include a collector layer and a first base layer that is arranged in a first plurality of parallel fingers. A second varactor in the compound varactor may include a second base layer arranged in a second plurality of parallel fingers, and the base layer may be coupled with the collector layer. In embodiments, the fingers of the base layers of the first varactor and the second varactor may be interleaved with one another. Other embodiments may be disclosed or claimed herein.

Abstract: Embodiments include but are not limited to apparatuses and systems including a quadrature lattice matching network including first path having a series inductor and a shunt inductor, and a second path having a series capacitor and a shunt capacitor. Other embodiments may be described and claimed.

Abstract: Embodiments include apparatuses and methods related to vertically stacked varactors. Specifically two varactors may be constructed of vertically stacked layers including an anode layer, a contact layer, and a varactor layer. The two varactors may share one or more layers in common. In some embodiments the two varactors may share the anode layer in common, while in other embodiments the two varactors may share the contact layer in common.

Abstract: Embodiments include but are not limited to apparatuses and systems including a quadrature lattice matching network including first path having a series inductor and a shunt inductor, and a second path having a series capacitor and a shunt capacitor. Other embodiments may be described and claimed.

Abstract: Embodiments of apparatuses, methods, and systems for a radio frequency amplification circuit providing for fast loadline modulation are generally described herein. Other embodiments may be described and claimed.

Abstract: Embodiments include but are not limited to apparatuses and systems including a quadrature lattice matching network including first path having a series inductor and a shunt inductor, and a second path having a series capacitor and a shunt capacitor. Other embodiments may be described and claimed.

Abstract: Embodiments of circuits, apparatuses, and systems for a quadrature hybrid circuit are disclosed. The quadrature hybrid circuit may include a ladder structure, may act as a combiner or a divider, and may transform a source impedance to a load impedance.

Abstract: Various embodiments may provide a circuit including a radio frequency (RF) power amplifier (PA) and a coupler (e.g., a directional coupler). The coupler may be coupled between a first impedance matching section and a second impedance matching section. The first matching section may transform a first impedance at the RF PA to a second impedance at an RF input port of the coupler. The second matching section may transform the second impedance at an RF output port of the coupler to a third impedance at an output terminal. The second impedance may be a real impedance and the third impedance may be a complex impedance. A real part of the third impedance may be greater than a real part of the second impedance. Additionally, the second impedance may be greater than the first impedance.

Abstract: Embodiments of apparatuses, methods, and systems for a radio frequency amplification circuit providing for fast loadline modulation are generally described herein. Other embodiments may be described and claimed.

Abstract: Embodiments of circuits, apparatuses, and systems for a lattice matching network are disclosed. Embodiments may include a power amplifier to provide single-ended amplification of a radio frequency signal. A lattice matching network may be coupled with the power amplifier and may transform a source impedance associated with an output of the power amplifier to a load impedance. In some embodiments, the lattice matching network may include first and second arms coupled in parallel between the power amplifier and an output node. The first arm may include a serial high-low network and the second arm may include a serial low-high network. The serial high-low network and the serial low-high network may provide a passband response with respect to the radio frequency signal. The serial high-low network and serial low-high network may include one or more Pi networks. Other embodiments may be described and claimed.