Abstract: The present invention relates to a process and plant for treating feed water containing nitrate. The process includes, sorbing nitrate from the feed water onto an ion exchange resin to form a loaded resin and produce a treated water stream depleted in nitrate, regenerating the loaded resin so that the resin can be reused and produce a brine stream high in nitrate; and converting nitrate in the brine stream into molecular nitrogen gas with the assistance of a bioactive agent.

Abstract: A damper for a high-pressure pump includes a housing and a cover that can be coupled to the housing to form a damping space. The cover has an elevation including a plurality of concave regions and a plurality of convex regions, wherein the concave and convex regions are arranged about a central region of the elevation. Each of the concave regions is arranged between two of the convex regions in order to scatter sound.

Abstract: A solenoid valve which regulates the pressure in a pressurized fuel injection system includes a body containing a needle that is pressed by an electromagnet including a coil and a magnetic core. The core has a cavity that is in fluid communication via an internal channel with a counterbore in the body into which the needle protrudes and into which fuel flows during use. The core also has a restriction which restricts the fluid communication and which attenuates pressure waves propagating in the fuel to prevent the waves from moving the core.

Abstract: A process for removing suspended particles and at least one ionic species from a feed water stream to produce a product water stream, the process includes the steps of forming agglomerates of the suspended particles in the feed water stream; passing the feed water stream containing agglomerated particles through a bed of particulate sorbent material so as to sorb the ionic species from the feed water onto the sorbent to provide a loaded sorbent and filter the agglomerated particles from the feed water using the bed of particulate sorbent material as a filtration medium to load the bed with the agglomerated particles, and thereby produce the product water stream; removing the filtered particles and the ionic species from the filtration medium; and re-using the regenerated sorbent in step b).

Abstract: A damper for a high-pressure pump includes a housing and a cover that can be coupled to the housing to form a damping space. The cover has an elevation including a plurality of concave regions and a plurality of convex regions, wherein the concave and convex regions are arranged about a central region of the elevation. Each of the concave regions is arranged between two of the convex regions in order to scatter sound.

Abstract: A process for removing suspended particles and at least one ionic species from a feed water stream to produce a product water stream, the process includes the steps of forming agglomerates of the suspended particles in the feed water stream; passing the feed water stream containing agglomerated particles through a bed of particulate sorbent material so as to sorb the ionic species from the feed water onto the sorbent to provide a loaded sorbent and filter the agglomerated particles from the feed water using the bed of particulate sorbent material as a filtration medium to load the bed with the agglomerated particles, and thereby produce the product water stream; removing the filtered particles and the ionic species from the filtration medium; and re-using the regenerated sorbent in step b).

Abstract: A water treatment process for substantially removing one or more ionic species from a feed water includes an ion containing aqueous solution to produce a treated water product, the process including: (a) a sorption step, including contacting a solid sorbent with said feed water to produce a solution depleted in said one or more ionic species and a loaded sorbent; (b) a concentrating step, includes concentrating an inlet stream including the ionic species depleted solution to produce a concentrate rich in said one or more ionic species and said treated water product; and (c) a desorbing step, including contacting said loaded sorbent with an aqueous desorbant including said concentrate to thereby desorb at least some of said one or more ionic species from said loaded sorbent.

Abstract: In a semiconductor memory including an array of memory cells, each memory cell includes a trench capacitor, the trench capacitor including an inner electrode, an outer electrode and a dielectric layer disposed between the inner electrode and the outer electrode, and a selection transistor, the selection transistor including a first source/drain area, a second source/drain area and a channel region disposed between the first source/drain area and the second source/drain area in a recess, the trench capacitor and the selection transistor of each memory cell are disposed side by side, the first source/drain area of the selection transistor being electrically connected to the inner electrode of the trench capacitor, the recess in which the channel region of the selection transistor is formed being located self aligned between the trench capacitor of the memory cell and the trench capacitor of an adjacent memory cell.

Abstract: A buried strap contact between a trench capacitor of a memory cell and the subsequently formed selection transistor of the memory cell is fabricated such that the inner capacitor electrode layer is etched back in the trench of the trench capacitor and the uncovered insulator layer is then removed at the trench wall in order to define the region of the buried strap contact area. A liner layer is subsequently deposited in order to cover the inner capacitor electrode layer in the trench and the uncovered trench wall and thus to form a barrier layer. A spacer layer with the material of the inner electrode layer is then formed on the liner layer at the trench wall. Finally, the uncovered liner layer is removed above the inner electrode layer and the trench is filled with the material of the inner electrode layer in order to fabricate the buried strap contact.

Abstract: A buried strap contact between a trench capacitor of a memory cell and the subsequently formed selection transistor of the memory cell is fabricated such that the inner capacitor electrode layer is etched back in the trench of the trench capacitor and the uncovered insulator layer is then removed at the trench wall in order to define the region of the buried strap contact area. A liner layer is subsequently deposited in order to cover the inner capacitor electrode layer in the trench and the uncovered trench wall and thus to form a barrier layer. A spacer layer with the material of the inner electrode layer is then formed on the liner layer at the trench wall. Finally, the uncovered liner layer is removed above the inner electrode layer and the trench is filled with the material of the inner electrode layer in order to fabricate the buried strap contact.

Abstract: A method for fabricating a gate structure of a FET, having: (a) deposition and patterning of a sacrificial layer sequence on a semiconductor substrate and uncovering of a gate section; (b) implantation of a channel doping into the gate section; (c) deposition and patterning of spacers at the sidewalls of the sacrificial layer sequence with the formation of a gate section that is not covered by the spacers; (d) introduction of a mask material into the gate section that is not covered by the spacers; (e) removal of the spacers selectively with respect to the sacrificial layer sequence and mask material); (f) implantation of a halo doping in regions uncovered by the removed spacers; (g) removal of the mask material; (h) formation of a gate on the gate section; and (j) removal of the sacrificial layer sequence selectively with respect to the gate.

Abstract: The present invention relates to a method for producing a vertical transistor, and to a vertical transistor. A sacrificial gate oxide and a sacrificial gate electrode are used during the production of the vertical transistor to makes it possible to considerably reduce or entirely avoid negative effects that normally result from the production of insulation structures between the vertical transistors. In particular, broadening of the gate oxide at the edge of the gate electrode can be prevented, and the edge of the gate electrode can be influenced deliberately. This allows vertical transistors to be produced having a current/voltage characteristic that can be adjusted specifically. In particular, vertical transistors can be produced having a pronounced corner effect.

Abstract: A method for fabricating a semiconductor gate structure including depositing at least one sacrificial layer on a semiconductor substrate; patterning the at least one sacrificial layer to form at least one cutout in the at least one sacrificial layer for uncovering the semiconductor substrate; forming a sidewall spacer over the sidewalls of the at least one sacrificial layer in the at least one cutout; forming a gate dielectric on the semiconductor substrate in the cutout; providing a gate electrode in the at least one cutout in the at lest one sacrificial layer; and removing the at least one sacrificial layer for the uncovering the gate electrode surrounded by the sidewall spacer. A semiconductor device is also provided.

Abstract: The present invention relates to a method for producing a vertical transistor, and to a vertical transistor. A sacrificial gate oxide and a sacrificial gate electrode are used during the production of the vertical transistor to makes it possible to considerably reduce or entirely avoid negative effects that normally result from the production of insulation structures between the vertical transistors. In particular, broadening of the gate oxide at the edge of the gate electrode can be prevented, and the edge of the gate electrode can be influenced deliberately. This allows vertical transistors to be produced having a current/voltage characteristic that can be adjusted specifically. In particular, vertical transistors can be produced having a pronounced corner effect.

Abstract: A field-effect transistor includes a semiconductor substrate, a source region formed in the semiconductor substrate, a drain region formed in the semiconductor substrate, a channel region formed in the semiconductor substrate, wherein the source region is connected to a source terminal electrode and the drain region is connected to a drain terminal electrode, wherein the channel region comprises a first narrow width channel region and a second narrow width channel region connected in parallel regarding the source terminal electrode and the drain terminal electrode, and wherein the first narrow width channel region and/or the second narrow width channel region comprise lateral edges narrowing the width of the narrow width channel region is such a way that a channel formation in the narrow width channel region is influenced by a mutually influencing effect of the lateral edges, and a gate electrode arranged above the first and second narrow width channel regions.

Abstract: A fuel injection system having a high-pressure pump and a fuel injection valve for each cylinder of the engine in which the pump has a work chamber, and the injection valve has a valve member movable in an opening direction counter to the force of a closing spring braced between the injection valve member and a displaceable storage piston that is acted upon, on its side remote from the closing spring, by the pressure in the pump work chamber. The storage piston is movable into a storage chamber counter to the force of the closing spring, and the deflection stroke motion of the storage piston is limited by a stop. The storage piston has one shaft portion of smaller cross section, disposed in an outset position in a connecting bore, and one portion of larger cross section disposed outside the connecting bore toward the pump work chamber, and upon the deflection stroke motion of the storage piston into the storage chamber, its shaft portion of larger cross section dips into the connecting bore.

Abstract: A method for fabricating a gate structure of a FET, having: (a) deposition and patterning of a sacrificial layer sequence on a semiconductor substrate and uncovering of a gate section; (b) implantation of a channel doping into the gate section; (c) deposition and patterning of spacers at the sidewalls of the sacrificial layer sequence with the formation of a gate section that is not covered by the spacers; (d) introduction of a mask material into the gate section that is not covered by the spacers; (e) removal of the spacers selectively with respect to the sacrificial layer sequence and mask material); (f) implantation of a halo doping in regions uncovered by the removed spacers; (g) removal of the mask material; (h) formation of a gate on the gate section; and (j) removal of the sacrificial layer sequence selectively with respect to the gate.

Abstract: A buried strap contact between a trench capacitor of a memory cell and the subsequently formed selection transistor of the memory cell is fabricated such that the inner capacitor electrode layer is etched back in the trench of the trench capacitor and the uncovered insulator layer is then removed at the trench wall in order to define the region of the buried strap contact area. A liner layer is subsequently deposited in order to cover the inner capacitor electrode layer in the trench and the uncovered trench wall and thus to form a barrier layer. A spacer layer with the material of the inner electrode layer is then formed on the liner layer at the trench wall. Finally, the uncovered liner layer is removed above the inner electrode layer and the trench is filled with the material of the inner electrode layer in order to fabricate the buried strap contact.

Abstract: The fuel injection system has one high-pressure fuel pump and one fuel injection valve for one cylinder of the engine. The fuel pump has a work chamber, and the injection valve has a valve member, and which is movable in an opening direction, counter to the force of a closing spring, by the pressure in a pressure chamber communicating with the pump work chamber; the closing spring is braced between the injection valve member and a displaceable deflection piston which, defines a prechamber that communicates with the pump work chamber. The deflection piston is movable into a storage chamber counter to the force of the closing spring. The prechamber communicates with the pump work chamber via a first throttle restriction, and the pressure chamber of the fuel injection valve communicates with the pump work chamber via a second throttle restriction, circumventing the prechamber.

Abstract: A semiconductor memory is fabricated with a vertical transistor situated in an upper section of a trench above a trench capacitor. First, an auxiliary insulation layer is applied to the conductive material of an inner electrode or to a connecting material of the trench capacitor. The connecting material is situated on the inner electrode, so that, during an epitaxial deposition, semiconductor material grows only on the uncovered sidewalls in the upper section of the trench. A nitride layer, is deposited conformally and the residual cavity between the inner electrode and the epitaxial semiconductor layer is filled with a doped further conductive material. The nitride layer isolates the epitaxial semiconductor layer from the further conductive material, so that no crystal lattice defects can propagate from there into the epitaxial semiconductor layer. Dopants are outdiffused from the further conductive material into the epitaxial semiconductor layer to form a doping region.