Patents by Inventor Peter Voigt
Peter Voigt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20040262697Abstract: A method for fabricating a semiconductor gate structure including depositing at least one sacrificial layer on a semiconductor substrate; patterning the at least one sacrificial layer to form at least one cutout in the at least one sacrificial layer for uncovering the semiconductor substrate; forming a sidewall spacer over the sidewalls of the at least one sacrificial layer in the at least one cutout; forming a gate dielectric on the semiconductor substrate in the cutout; providing a gate electrode in the at least one cutout in the at lest one sacrificial layer; and removing the at least one sacrificial layer for the uncovering the gate electrode surrounded by the sidewall spacer. A semiconductor device is also provided.Type: ApplicationFiled: May 27, 2004Publication date: December 30, 2004Applicant: INFINEON TECHNOLOGIESInventors: Gerhard Enders, Helmut Schneider, Peter Voigt
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Publication number: 20040245576Abstract: A field-effect transistor includes a semiconductor substrate, a source region formed in the semiconductor substrate, a drain region formed in the semiconductor substrate, a channel region formed in the semiconductor substrate, wherein the source region is connected to a source terminal electrode and the drain region is connected to a drain terminal electrode, wherein the channel region comprises a first narrow width channel region and a second narrow width channel region connected in parallel regarding the source terminal electrode and the drain terminal electrode, and wherein the first narrow width channel region and/or the second narrow width channel region comprise lateral edges narrowing the width of the narrow width channel region is such a way that a channel formation in the narrow width channel region is influenced by a mutually influencing effect of the lateral edges, and a gate electrode arranged above the first and second narrow width channel regions.Type: ApplicationFiled: April 23, 2004Publication date: December 9, 2004Inventors: Gerhard Enders, Bjoern Fischer, Helmut Schneider, Peter Voigt
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Patent number: 6823848Abstract: A fuel injection system having a high-pressure pump and a fuel injection valve for each cylinder of the engine in which the pump has a work chamber, and the fuel injection valve has a valve member movable in an opening direction counter to the force of a closing spring braced between the injection valve member and a displaceable storage piston that is acted upon, on its side remote from the closing spring, by the pressure in the pump work chamber. The storage piston is movable into a storage chamber counter to the force of the closing spring and the deflection stroke motion of the storage piston is limited by a stop.Type: GrantFiled: August 27, 2003Date of Patent: November 30, 2004Assignee: Robert Bosch GmbHInventors: GĂ©rard Duplat, Raphael Pourret, Peter Voigt
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Patent number: 6822281Abstract: A trench cell for use in a DRAM array includes a vertical selection transistor of a first conductivity type at the—seen in the bit line direction—first side of the trench hole, a blocking doping region near the surface, of a second conductivity type, is provided adjacent to the trench hole, the blocking doping region lying opposite the vertical selection transistor. As a result, leakage currents can be avoided and, in addition, the trench cells can be disposed at a shorter distance from one another.Type: GrantFiled: March 24, 2003Date of Patent: November 23, 2004Assignee: Infineon Technologies AGInventors: Peter Voigt, Gerhard Enders
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Patent number: 6797562Abstract: A method is provided for manufacturing a buried strap contact between a transistor and a trench capacitor in a memory cell, particularly a DRAM memory cell. In this method, the two spacers of the gate electrode lying opposite one another and the gate path applied on the trench insulation of the memory cell serve as part of the mask that is employed for etching the contact trench and in which the buried bridge of the trench capacitor is subsequently generated. As a result, the position of that sidewall of the bridge facing toward the gate electrode is generated in self-aligning fashion relative to the gate electrode. This avoids photolithographic tolerances in the positioning of the bridge relative to the gate electrode.Type: GrantFiled: June 26, 2003Date of Patent: September 28, 2004Assignee: Infineon Technologies AGInventors: Dietrich Bonart, Gerhard Enders, Bjoern Fischer, Peter Voigt
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Publication number: 20040099250Abstract: The fuel injection system has one high-pressure fuel pump (10) and one fuel injection valve (12) for one cylinder of the engine. The high-pressure fuel pump has a pump work chamber (22), and the fuel injection valve (12) has an injection valve member (28), by which at least one injection opening (32) is controlled and which is movable in an opening direction (29), counter to the force of a closing spring (44), by the pressure prevailing in a pressure chamber (40) communicating with the pump work chamber (22); the closing spring (44) is braced on one end on the injection valve member (28) and on the other on a displaceable deflection piston (50), which on its side remote from the closing spring (44) defines a prechamber (85) that communicates with the pump work chamber (22). The deflection piston (50) is movable into a storage chamber (55) counter to the force of the closing spring (44).Type: ApplicationFiled: July 18, 2003Publication date: May 27, 2004Inventors: Herbert Strahberger, Serge Moling, Peter Voigt, Alain Amblard
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Publication number: 20040048436Abstract: A method is provided for manufacturing a buried strap contact between a transistor and a trench capacitor in a memory cell, particularly a DRAM memory cell. In this method, the two spacers of the gate electrode lying opposite one another and the gate path applied on the trench insulation of the memory cell serve as part of the mask that is employed for etching the contact trench and in which the buried bridge of the trench capacitor is subsequently generated. As a result, the position of that sidewall of the bridge facing toward the gate electrode is generated in self-aligning fashion relative to the gate electrode. This avoids photolithographic tolerances in the positioning of the bridge relative to the gate electrode.Type: ApplicationFiled: June 26, 2003Publication date: March 11, 2004Inventors: Dietrich Bonart, Gerhard Enders, Bjoern Fischer, Peter Voigt
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Patent number: 6696335Abstract: For particularly simple and targeted formations of a diffusion region, an interfacial region of a semiconductor substrate is subjected to a thermal transformation process and thereby carry out the thermally activated diffusion of a dopant in a substantially directed form, in particular in substantially a preferential direction, by interaction of a provided dopant with a transforming interfacial region.Type: GrantFiled: July 31, 2002Date of Patent: February 24, 2004Assignee: Infineon Technologies AGInventors: Dietrich Bonart, Peter Voigt
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Publication number: 20040025840Abstract: The fuel injection system has a high-pressure fuel pump (10) and a fuel injection valve (12) for a cylinder of the engine. The high-pressure fuel pump (10) has a pump work chamber (22), and the fuel injection valve (12) has an injection valve member (28) by which at least one injection opening (32) is controlled and which is movable in an opening direction (29) counter to the force of a closing spring (44); the closing spring (44) is braced on one end on the injection valve member (28) and on the other end on a displaceable storage piston (50) that is acted upon, on its side remote from the closing spring (44), by the pressure prevailing in the pump work chamber (22). The storage piston (50) is movable into a storage chamber (54) counter to the force of the closing spring (44), and the deflection stroke motion of the storage piston (50) into the storage chamber (54) is limited by a stop (53).Type: ApplicationFiled: August 27, 2003Publication date: February 12, 2004Inventors: Gerard Duplat, Raphael Pourret, Peter Voigt
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Publication number: 20040021163Abstract: A semiconductor memory is fabricated with a vertical transistor situated in an upper section of a trench above a trench capacitor. First, an auxiliary insulation layer is applied to the conductive material of an inner electrode or to a connecting material of the trench capacitor. The connecting material is situated on the inner electrode, so that, during an epitaxial deposition, semiconductor material grows only on the uncovered sidewalls in the upper section of the trench. A nitride layer, is deposited conformally and the residual cavity between the inner electrode and the epitaxial semiconductor layer is filled with a doped further conductive material. The nitride layer isolates the epitaxial semiconductor layer from the further conductive material, so that no crystal lattice defects can propagate from there into the epitaxial semiconductor layer. Dopants are outdiffused from the further conductive material into the epitaxial semiconductor layer to form a doping region.Type: ApplicationFiled: July 25, 2003Publication date: February 5, 2004Inventors: Dietrich Bonart, Gerhard Enders, Peter Voigt
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Publication number: 20040005762Abstract: The present invention relates to a method for producing a vertical transistor, and to a vertical transistor. A sacrificial gate oxide and a sacrificial gate electrode are used during the production of the vertical transistor to makes it possible to considerably reduce or entirely avoid negative effects that normally result from the production of insulation structures between the vertical transistors. In particular, broadening of the gate oxide at the edge of the gate electrode can be prevented, and the edge of the gate electrode can be influenced deliberately. This allows vertical transistors to be produced having a current/voltage characteristic that can be adjusted specifically. In particular, vertical transistors can be produced having a pronounced corner effect.Type: ApplicationFiled: July 8, 2003Publication date: January 8, 2004Inventors: Dietrich Bonart, Gerhard Enders, Peter Voigt
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Publication number: 20030178662Abstract: A trench cell for use in a DRAM array includes a vertical selection transistor of a first conductivity type at the—seen in the bit line direction—first side of the trench hole, a blocking doping region near the surface, of a second conductivity type, is provided adjacent to the trench hole, the blocking doping region lying opposite the vertical selection transistor. As a result, leakage currents can be avoided and, in addition, the trench cells can be disposed at a shorter distance from one another.Type: ApplicationFiled: March 24, 2003Publication date: September 25, 2003Inventors: Peter Voigt, Gerhard Enders
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Publication number: 20030060029Abstract: For particularly simple and targeted formations of a diffusion region, an interfacial region of a semiconductor substrate is subjected to a thermal transformation process and thereby carry out the thermally activated diffusion of a dopant in a substantially directed form, in particular in substantially a preferential direction, by interaction of a provided dopant with a transforming interfacial region.Type: ApplicationFiled: July 31, 2002Publication date: March 27, 2003Inventors: Dietrich Bonart, Peter Voigt
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Patent number: 5440140Abstract: A method and arrangements for determining an at least approximately circular contacting surface is disclosed. The primary object of finding a simple way of objectively determining the contacting surface of a deformable medium on a plane surface with high accuracy and at a low technical expense is met according to the invention in that a film waveguide is used as a plane surface. An incoherent, parallel, homogeneous bundle of light whose width widens one-dimensionally is coupled into this film waveguide and the decoupled light is fed to a photoreceiver array for recording one-dimensional intensity distributions. An evaluating unit generates a difference curve from a normal curve without contacting medium and from a measurement curve with contacting medium and the exact diameter of the contacting surface is determined from the distance of two associated extremes of the difference curve.Type: GrantFiled: April 4, 1994Date of Patent: August 8, 1995Assignee: Jenoptik GmbHInventors: Steffen Goerlich, Wolfgang Merker, Peter Voigt, Norbert Klose, Klaus Moehr, Joachim Wieser
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Patent number: 4776271Abstract: During silk-screen printing, the stencil (3) is stretched as a result of the pressure exerted by the squeeges (6) This results in a distorted pattern on the material (4) to be printed. To eliminate this error, the design (7') in the stencil (3) is predistorted in such a way that a distortion-free printed pattern (8') is obtained.Type: GrantFiled: May 6, 1986Date of Patent: October 11, 1988Assignee: Standard Electrik Lorenz AGInventors: Michael Schlipf, Kurt M. Tischer, Klaus-Peter Voigt
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Patent number: 4505685Abstract: In the manufacture of display structures--including fluorescent material displays--by means of a print process, a base material (glass or plastic material), prior to the print process, is coated with an electrically conductive layer. During the print process, a strippable coating or pigmented lacquer having the shape of the structure, is deposited onto a first layer. After the print process, the non-printed electrically conductive layer is etched away and in the case of the non-fluorescent display structure, the strippable coating is peeled off the electrically conductive layer. The invention provides an improvement in the manufacture of display structures over the hitherto conventional photographic reproduction of silk-screen printing methods, and provides display structures having sharp edges to a thickness of approximately 10 .mu.m.Type: GrantFiled: January 20, 1982Date of Patent: March 19, 1985Assignee: International Standard Electric CorporationInventors: Kurt M. Tischer, Klaus-Peter Voigt, Rolf Zondler
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Patent number: 4384764Abstract: A rear plate of a liquid-cell display device has louvers embedded therein that allow light to pass from the rear of the display device toward the front only at angles that will cause most or all of the light to be internally reflected at the front plate unless the light has been scattered by the light-scattering fluid of the device.Type: GrantFiled: September 10, 1980Date of Patent: May 24, 1983Assignee: International Standard Electric CorporationInventors: Kurt M. Tischer, Fritz Troster, Klaus-Peter Voigt, Rolf Zondler