Patents by Inventor Petr Kamenicky

Petr Kamenicky has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7218154
    Abstract: A track and hold (or sample and hold) offset compensated amplifier circuit that performs offset compensation in response to a comparison of sign (or sign and value) of the current forced to the output terminal of operational amplifier in order to keep it at the potential of holding capacitor during the holding phase. Based on this comparison, the comparison circuit increases or decreases the voltage differential applied between the positive and negative input terminals of the operational amplifier depending on whether the comparison circuit detects that the current forced to the output terminal of the operational amplifier is positive or negative. During the holding phase, negative feedback is disconnected, and the positive and negative input terminals of the operational amplifier are connected.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: May 15, 2007
    Assignee: AMI Semiconductor, Inc.
    Inventors: Lud{hacek over (e)}k Pantuů{hacek over (c)}ek, Petr Kamenický
  • Publication number: 20060285260
    Abstract: A switching circuit that transitions using a switch transistor. During the initial stages of a high-low transition, a control loop provides supplemental pre-charge to the gate of the switch transistor to reduce high-low switching delays. Once the current flowing through the switch transistor rises to a level causing the output voltage to change at specified speed threshold, a loop opening mechanism opens the loop. Further opening of the switch transistor in the high-low transition is taken care of by a relatively constant current source. At that point, no or negligible feedback current is used to charge the gate of the switch transistor. Low-high transitions may be performed in a similar complementary manner.
    Type: Application
    Filed: June 20, 2005
    Publication date: December 21, 2006
    Inventors: Petr Kamenicky, Ludek Pantucek
  • Patent number: 6670842
    Abstract: A voltage regulator circuit for providing a regulated output voltage at an output terminal, the regulator circuit including a current source (Icontrol) including a current source MOSFET a current mirror circuit including a driver MOSFET (M1) and a follower MOSFET (M2) interposed between the current source and the output terminal, the current source and current mirror being operatively linked as to regulate an input voltage Vin to the regulated output voltage, wherein the circuit further includes an EMC stabilising MOSFET having its drain connected to its substrate and placed in series with any of the driver or follower MOSFETs.
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: December 30, 2003
    Assignee: Alcatel
    Inventor: Petr Kamenicky
  • Publication number: 20030020445
    Abstract: The present invention is related to a voltage regulator circuit for providing a regulated output voltage at an output terminal, said regulator circuit comprising
    Type: Application
    Filed: July 16, 2002
    Publication date: January 30, 2003
    Applicant: ALCATEL
    Inventor: Petr Kamenicky
  • Publication number: 20030020444
    Abstract: The present invention is related to a voltage regulator circuit for providing a regulated output voltage (Vout) at an output terminal, said regulator circuit comprising
    Type: Application
    Filed: July 16, 2002
    Publication date: January 30, 2003
    Applicant: ALCATEL
    Inventor: Petr Kamenicky