Patents by Inventor Petri Raisanen

Petri Raisanen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190027573
    Abstract: Methods for forming a semiconductor device structure are provided. The methods may include forming a molybdenum nitride film on a substrate by atomic layer deposition by contacting the substrate with a first vapor phase reactant comprising a molybdenum halide precursor, contacting the substrate with a second vapor phase reactant comprise a nitrogen precursor, and contacting the substrate with a third vapor phase reactant comprising a reducing precursor. The methods provided may also include forming a gate electrode structure comprising the molybdenum nitride film, the gate electrode structure having an effective work function greater than approximately 5.0 eV. Semiconductor device structures including molybdenum nitride films are also provided.
    Type: Application
    Filed: July 17, 2018
    Publication date: January 24, 2019
    Inventors: Chiyu Zhu, Kiran Shrestha, Petri Raisanen, Michael Eugene Givens
  • Publication number: 20180350588
    Abstract: A method for forming a metal nitride film with good film closure at low temperatures is disclosed. The method may comprise utilizing plasma to form NH and NH2 radicals to allow for the formation of the metal nitride at low temperatures. The method may also comprise flowing an etch gas to result in an amorphous film with uniform thickness. The method may also comprise flowing an alkyl hydrazine to inhibit three-dimensional island growth of the metal nitride film.
    Type: Application
    Filed: May 9, 2018
    Publication date: December 6, 2018
    Inventors: Petri Raisanen, Moataz Bellah Mousa, Peng-Fu Hsu
  • Patent number: 10087522
    Abstract: A method for depositing a metal boride film onto a substrate is disclosed. In particular, the method comprises pulsing a metal halide precursor onto the substrate and pulsing a boron compound precursor onto the substrate. A reaction between the metal halide precursor and the boron compound precursor forms a metal boride film. Specifically, the method discloses forming a tantalum boride (TaB2) or a niobium boride (NbB2) film.
    Type: Grant
    Filed: April 21, 2016
    Date of Patent: October 2, 2018
    Assignee: ASM IP Holding B.V.
    Inventors: Petri Raisanen, Eric Shero, Suvi Haukka, Robert Brennan Milligan, Michael Eugene Givens
  • Patent number: 10002936
    Abstract: A process for depositing titanium aluminum or tantalum aluminum thin films comprising nitrogen on a substrate in a reaction space can include at least one deposition cycle. The deposition cycle can include alternately and sequentially contacting the substrate with a vapor phase Ti or Ta precursor and a vapor phase Al precursor. At least one of the vapor phase Ti or Ta precursor and the vapor phase Al precursor may contact the substrate in the presence of a vapor phase nitrogen precursor.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: June 19, 2018
    Assignee: ASM IP HOLDING B.V.
    Inventors: Suvi Haukka, Michael Givens, Eric Shero, Jerry Winkler, Petri Räisänen, Timo Asikainen, Chiyu Zhu, Jaakko Anttila
  • Publication number: 20180151345
    Abstract: Methods are provided herein for deposition of oxide films. Oxide films may be deposited, including selective deposition of oxide thin films on a first surface of a substrate relative to a second, different surface of the same substrate. For example, an oxide thin film such as an insulating metal oxide thin film may be selectively deposited on a first surface of a substrate relative to a second, different surface of the same substrate. The second, different surface may be an organic passivation layer.
    Type: Application
    Filed: November 29, 2016
    Publication date: May 31, 2018
    Inventors: Suvi P. Haukka, Elina Färm, Raija H. Matero, Eva E. Tois, Hidemi Suemori, Antti Juhani Niskanen, Sung-Hoon Jung, Petri Räisänen
  • Patent number: 9981286
    Abstract: Processes are provided for selectively depositing a metal silicide material on a first H-terminated surface of a substrate relative to a second, different surface of the same substrate. In some aspects, methods of forming a metal silicide contact layer for use in integrated circuit fabrication are provided.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: May 29, 2018
    Assignee: ASM IP HOLDING B.V.
    Inventors: Jacob Huffman Woodruff, Michael Eugene Givens, Bed Sharma, Petri Räisänen
  • Publication number: 20180122642
    Abstract: Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures are provided. In some embodiments, methods may include contacting a substrate with a first vapor phase reactant comprising a transition metal precursor and contacting the substrate with a second vapor phase reactant comprising an alkyl-hydrazine precursor. In some embodiments, related semiconductor device structures may include a PMOS transistor gate structure, the PMOS transistor gate structure including a transition metal nitride film and a gate dielectric between the transition nitride film and a semiconductor body. The transition metal nitride film includes a predominant (200) crystallographic orientation.
    Type: Application
    Filed: September 21, 2017
    Publication date: May 3, 2018
    Inventors: Petri Raisanen, Michael Eugene Givens
  • Publication number: 20180122709
    Abstract: Methods for forming a semiconductor device and related semiconductor device structures are provided. In some embodiments, methods may include forming an NMOS gate dielectric and a PMOS gate dielectric over a substrate and forming a first work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. In some embodiments, methods may also include, removing the first work function metal over the NMOS gate dielectric and forming a second work function metal over the NMOS gate dielectric and over the PMOS gate dielectric. In some embodiments, related semiconductor device structures may include an NMOS gate dielectric and a PMOS gate dielectric disposed over a semiconductor substrate. A PMOS gate electrode may be disposed over the PMOS gate dielectric and the PMOS gate electrode may include a first work function metal disposed over the PMOS gate dielectric and a second work function metal disposed over the first work function metal.
    Type: Application
    Filed: October 27, 2017
    Publication date: May 3, 2018
    Inventors: Qi Xie, Michael Eugen Givens, Petri Raisanen, Jan Willem Maes
  • Patent number: 9911676
    Abstract: Improved methods and systems for passivating a surface of a high-mobility semiconductor and structures and devices formed using the methods are disclosed. The method includes providing a high-mobility semiconductor surface to a chamber of a reactor and exposing the high-mobility semiconductor surface to a gas-phase chalcogen precursor to passivate the high-mobility semiconductor surface.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: March 6, 2018
    Assignee: ASM IP Holding B.V.
    Inventors: Fu Tang, Michael E. Givens, Qi Xie, Xiaoqiang Jiang, Petri Raisanen, Pauline Calka
  • Patent number: 9905492
    Abstract: Improved methods and systems for passivating a surface of a high-mobility semiconductor and structures and devices formed using the methods are disclosed. The method includes providing a high-mobility semiconductor surface to a chamber of a reactor and exposing the high-mobility semiconductor surface to a gas-phase sulfur precursor to passivate the high-mobility semiconductor surface.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: February 27, 2018
    Assignee: ASM IP Holding B.V.
    Inventors: Fu Tang, Michael E. Givens, Qi Xie, Petri Raisanen
  • Publication number: 20170306479
    Abstract: A method for depositing a metal film onto a substrate is disclosed. In particular, the method comprises pulsing a metal halide precursor onto the substrate and pulsing a reducing precursor onto the substrate. A reaction between the metal halide precursor and the reducing precursor forms a metal film. Specifically, the method discloses forming a metal boride or a metal silicide film.
    Type: Application
    Filed: April 21, 2016
    Publication date: October 26, 2017
    Inventors: Petri Raisanen, Eric Shero, Suvi Haukka, Robert Brennan Milligan, Michael Eugene Givens
  • Publication number: 20170306478
    Abstract: A method for depositing a metal boride film onto a substrate is disclosed. In particular, the method comprises pulsing a metal halide precursor onto the substrate and pulsing a boron compound precursor onto the substrate. A reaction between the metal halide precursor and the boron compound precursor forms a metal boride film. Specifically, the method discloses forming a tantalum boride (TaB2) or a niobium boride (NbB2) film.
    Type: Application
    Filed: April 21, 2016
    Publication date: October 26, 2017
    Inventors: Petri Raisanen, Eric Shero, Suvi Haukka, Robert Brennan Milligan, Michael Eugene Givens
  • Patent number: 9790595
    Abstract: Systems and methods of reducing outgassing of a substance within a reaction chamber of a reactor are disclosed. Exemplary methods include depositing a barrier layer within the reaction chamber and using a scavenging precursor to react with species on a surface of the reaction chamber. Exemplary systems include gas-phase deposition systems, such as atomic layer deposition systems, which include a barrier layer source and/or a scavenging precursor source fluidly coupled to a reaction chamber of the system.
    Type: Grant
    Filed: January 27, 2015
    Date of Patent: October 17, 2017
    Assignee: ASM IP Holding B.V.
    Inventors: Sung-Hoon Jung, Petri Raisanen, Eric Jen Cheng Liu, Mike Schmotzer
  • Publication number: 20170259298
    Abstract: Processes are provided for selectively depositing a metal silicide material on a first H-terminated surface of a substrate relative to a second, different surface of the same substrate. In some aspects, methods of forming a metal silicide contact layer for use in integrated circuit fabrication are provided.
    Type: Application
    Filed: March 8, 2016
    Publication date: September 14, 2017
    Inventors: Jacob Huffman Woodruff, Michael Eugene Givens, Bed Sharma, Petri Räisänen
  • Patent number: 9711350
    Abstract: In some embodiments, a semiconductor surface having a high mobility semiconductor may be effectively passivated by nitridation, preferably using hydrazine, a hydrazine derivative, or a combination thereof. The surface may be the semiconductor surface of a transistor channel region. In some embodiments, a semiconductor surface oxide layer is formed at the semiconductor surface and the passivation is accomplished by forming a semiconductor oxynitride layer at the surface, with the nitridation contributing nitrogen to the surface oxide to form the oxynitride layer. The semiconductor oxide layer may be deposited by atomic layer deposition (ALD) and the nitridation may also be conducted as part of the ALD.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: July 18, 2017
    Assignee: ASM IP HOLDING B.V.
    Inventors: Qi Xie, Fu Tang, Michael Givens, Petri Raisanen, Jan Willem Maes
  • Publication number: 20170117202
    Abstract: Improved methods and systems for passivating a surface of a high-mobility semiconductor and structures and devices formed using the methods are disclosed. The method includes providing a high-mobility semiconductor surface to a chamber of a reactor and exposing the high-mobility semiconductor surface to a gas-phase chalcogen precursor to passivate the high-mobility semiconductor surface.
    Type: Application
    Filed: January 3, 2017
    Publication date: April 27, 2017
    Inventors: Fu Tang, Michael E. Givens, Qi Xie, Xiaoqiang Jiang, Petri Raisanen, Pauline Calka
  • Publication number: 20170117203
    Abstract: Improved methods and systems for passivating a surface of a high-mobility semiconductor and structures and devices formed using the methods are disclosed. The method includes providing a high-mobility semiconductor surface to a chamber of a reactor and exposing the high-mobility semiconductor surface to a gas-phase sulfur precursor to passivate the high-mobility semiconductor surface.
    Type: Application
    Filed: January 3, 2017
    Publication date: April 27, 2017
    Inventors: Fu Tang, Michael E. Givens, Qi Xie, Petri Raisanen
  • Patent number: 9558931
    Abstract: Improved methods and systems for passivating a surface of a high-mobility semiconductor and structures and devices formed using the methods are disclosed. The method includes providing a high-mobility semiconductor surface to a chamber of a reactor and exposing the high-mobility semiconductor surface to a gas-phase sulfur precursor to passivate the high-mobility semiconductor surface.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: January 31, 2017
    Assignee: ASM IP Holding B.V.
    Inventors: Fu Tang, Michael Eugene Givens, Qi Xie, Petri Raisanen
  • Publication number: 20160376704
    Abstract: Methods of forming thin-film structures including metal carbide material, and structures and devices including the metal carbide material are disclosed. Exemplary structures include metal carbide material formed using two or more different processes (e.g., two or more different precursors), which enables tuning of various metal carbide material properties, including resistivity, current leakage, and work function.
    Type: Application
    Filed: June 26, 2015
    Publication date: December 29, 2016
    Inventors: Petri Raisanen, Michael Givens, Eric James Shero
  • Publication number: 20160358835
    Abstract: In some embodiments, a semiconductor surface may be effectively passivated by nitridation, preferably using hydrazine, a hydrazine derivative, or a combination thereof. The surface may be the semiconductor surface of a transistor channel region. In some embodiments, native oxide is removed from the semiconductor surface and the surface is subsequently nitrided. In some other embodiments, a semiconductor surface oxide layer is formed at the semiconductor surface and the passivation is accomplished by forming a semiconductor oxynitride layer at the surface, with the nitridation contributing nitrogen to the surface oxide to form the oxynitride layer. The semiconductor oxide layer may be deposited by atomic layer deposition (ALD) and the nitridation may also be conducted as part of the ALD.
    Type: Application
    Filed: May 31, 2016
    Publication date: December 8, 2016
    Inventors: Qi Xie, Fu Tang, Michael Givens, Petri Raisanen, Jan Willem Maes, Xiaoqiang Jiang