Abstract: Power amplification system with adjustable common base bias. A power amplification system can include a cascode amplifier coupled to a radio-frequency input signal and coupled to a radio-frequency output. The power amplification system can further include a biasing component configured to apply one or more biasing signals to the cascode amplifier, the biasing component including a bias controller and one or more bias components. Each respective bias component may be coupled to a respective bias transistor.

Abstract: The present disclosure relates to devices and methods for detecting and preventing occurrence of a saturation state in a power amplifier. A power amplifier module can include a power amplifier including a cascode transistor pair. The cascode transistor pair can include a first transistor and a second transistor. The power amplifier module can include a current comparator configured to compare a first base current of the first transistor and a second base current of the second transistor to obtain a comparison value. The power amplifier module can include a saturation controller configured to supply a reference signal to an impedance matching network based on the comparison value. The impedance matching network can be configured to modify a load impedance of a load line in electrical communication with the power amplifier based at least in part on the reference signal.

Abstract: A radio-frequency amplifier can have an input stage that includes an amplifying transistor having an input node and an output node, such that a signal at the input node has a first power level and an amplified signal at the output node has a second power level. The radio-frequency amplifier can further include a bias circuit configured to provide a bias signal to the amplifying transistor, and a feedback circuit that couples the output node of the amplifying transistor to the input node of the amplifying transistor. The feedback circuit can include a resistance and a capacitance arranged in series. The radio-frequency amplifier can further include a gain compensation circuit implemented relative to the input stage such that the second power level is compensated for a variation in temperature associated with the radio-frequency amplifier.

Abstract: Methods related to power amplification systems with adjustable common base bias. A method of implementing a power amplification system can include providing a cascode amplifier coupled to a radio-frequency input signal and coupled to a radio-frequency output. The method can further include providing a biasing component configured to apply one or more biasing signals to the cascode amplifier, the biasing component including a bias controller and one or more bias components. Each respective bias component may be coupled to a respective bias transistor.

Abstract: In some embodiments, an amplifier system can include an amplifier circuit having first and second amplifiers configured to amplify respective first and second portions of an input signal. Each of the first and second amplifiers can include a cascode stage with input and output transistors arranged in a cascode configuration. The amplifier system can further include an envelope tracking bias circuit coupled to the amplifier circuit and configured to provide a bias signal to the output transistor of the cascode stage of at least one of the first and second amplifiers. The amplifier system can further include a supply circuit configured to provide a non-envelope tracking supply voltage to the output transistor of the cascode stage of the at least one of the first and second amplifiers.

Abstract: Apparatus and methods for saturation detection of power amplifiers are provided. In certain embodiments, a power amplifier system includes a carrier amplifier including a first capacitor and a first gain bipolar transistor having a base configured to receive a radio frequency signal through the first capacitor. The power amplifier system further includes a saturation detector including a resistor and a detection bipolar transistor that is located within 20 ?m of the first gain bipolar transistor. The detection bipolar transistor has a base connected to the base of the first gain bipolar transistor through the resistor and a collector that generates a saturation detection current indicating a saturation of the first gain bipolar transistor.

Abstract: Apparatus and methods for load modulated power amplifiers are provided. In certain embodiments, a load modulated power amplifier system includes a power amplifier that receives a radio frequency signal at an input and provides an amplified radio frequency signal at an output, and a controllable load impedance coupled to the output of the power amplifier. The controllable load impedance receives an envelope signal that changes in relation to an envelope of the radio frequency signal, and the envelope signal is operable to control an impedance of the controllable load impedance to modulate a load at the output of the power amplifier.

Abstract: In some embodiments, a power amplification system can comprise a current source, an input switch configured to alternatively feed current from the current source to a high-power circuit path and a low-power circuit path, and a band switch including a switch arm for switching between a plurality of bands. Each of the high-power circuit path and the low-power circuit path can be connected to the switch arm.

Abstract: The present disclosure relates to devices and methods for detecting and preventing occurrence of a saturation state in a power amplifier. A power amplifier module can include a power amplifier including a cascode transistor pair. The cascode transistor pair can include a first transistor and a second transistor. The power amplifier module can include a current comparator configured to compare a first base current of the first transistor and a second base current of the second transistor to obtain a comparison value. The power amplifier module can include a saturation controller configured to supply a reference signal to an impedance matching network based on the comparison value. The impedance matching network can be configured to modify a load impedance of a load line in electrical communication with the power amplifier based at least in part on the reference signal.

Abstract: One aspect of this disclosure is a power amplifier module that includes a power amplifier, a semiconductor resistor, a tantalum nitride terminated through wafer via, and a conductive layer electrically connected to the power amplifier. The semiconductor resistor can include a resistive layer that includes a same material as a layer of a bipolar transistor of the power amplifier. A portion of the conductive layer can be in the tantalum nitride terminated through wafer via. The conductive layer and the power amplifier can be on opposing sides of a semiconductor substrate. Other embodiments of the module are provided along with related methods and components thereof.

Abstract: A power amplifier can include an input stage that includes a first amplifying transistor having an input node and an output node, such that a signal at the input node has a first power level and an amplified signal at the output node has a second power level. The power amplifier can further include a second stage implemented relative to the output node that includes a second amplifying transistor, and an adjustable frequency resonant circuit implemented relative to an input of the second stage, configured to store energy of the amplified signal at the second power level.

Abstract: Apparatus and methods for power amplifier signal limiting are disclosed. In certain embodiments, a front-end system includes a low noise amplifier that amplifies a radio frequency receive signal during a receive frame, a power amplifier that amplifies a radio frequency transmit signal during a transmit frame, and a signal limiter operable to limit a signal power of the power amplifier in an attenuating mode. The signal limiter includes a radio frequency detector configured to generate a detection signal based on detecting a power level of the radio frequency transmit signal, and a latch that locks the signal limiter in the attenuating mode in response to activation of the detection signal. The latch is reset by a bias signal of the power amplifier that is activated during the transmit frame and deactivated during the receive frame.

Abstract: A power amplifier can include an input stage that includes an amplifying transistor having an input node and an output node, such that a signal at the input node has a first power level and an amplified signal at the output node has a second power level. The power amplifier can further include a bias circuit configured to provide a bias signal to the amplifying transistor, and a feedback circuit that couples the output node of the amplifying transistor to the input node of the amplifying transistor. The feedback circuit can include a resistance and a capacitance arranged in series. The power amplifier can further include a gain compensation circuit implemented relative to the input stage such that the second power level is compensated for a variation in temperature associated with the power amplifier.

Abstract: Methods related to power amplification systems with adjustable common base bias. A method of implementing a power amplification system can include providing a cascode amplifier coupled to a radio-frequency input signal and coupled to a radio-frequency output. The method can further include providing a biasing component configured to apply one or more biasing signals to the cascode amplifier, the biasing component including a bias controller and one or more bias components. Each respective bias component may be coupled to a respective bias transistor.

Abstract: In some embodiments, an amplifier system can include an amplifier circuit having first and second amplifiers configured to amplify respective first and second portions of an input signal. Each of the first and second amplifiers can include a cascode stage with input and output transistors arranged in a cascode configuration. The amplifier system can further include an envelope tracking bias circuit coupled to the amplifier circuit and configured to provide a bias signal to the output transistor of the cascode stage of at least one of the first and second amplifiers. The amplifier system can further include a supply circuit configured to provide a non-envelope tracking supply voltage to the output transistor of the cascode stage of the at least one of the first and second amplifiers.

Abstract: Apparatus and methods for power amplifier signal limiting are disclosed. In certain embodiments, a power amplifier system includes a power amplifier that amplifies a radio frequency input signal, and a signal limiter operable to limit a signal power of the power amplifier when the radio frequency input signal exceeds a threshold. The signal limiter includes a radio frequency detector configured to generate a detection signal based on detecting a power level of the radio frequency input signal, and a latch configured to lock the signal limiter into an attenuating mode in response to the detection signal indicating that the threshold is exceeded.

Abstract: In some embodiments, an amplifier circuit can include an input node and an output node, and an amplifier implemented between the input node and the output node. The amplifier circuit can further include a phase compensation circuit implemented between the input node and an input of the amplifier. The phase compensation circuit can be configured to provide a phase shift that depends on a control voltage. In some embodiments, the amplifier circuit can be implemented as a power amplifier circuit.

Abstract: In some embodiments, a power amplification system can comprise a current source, an input switch configured to alternatively feed current from the current source to a high-power circuit path and a low-power circuit path, and a band switch including a switch arm for switching between a plurality of bands. Each of the high-power circuit path and the low-power circuit path can be connected to the switch arm.

Abstract: Apparatus and methods for saturation detection of power amplifiers are provided. In certain embodiments, a power amplifier system includes a carrier amplifier including a first capacitor and a first gain bipolar transistor having a base configured to receive a radio frequency signal through the first capacitor. The power amplifier system further includes a saturation detector including a resistor and a detection bipolar transistor that is located within 20 ?m of the first gain bipolar transistor. The detection bipolar transistor has a base connected to the base of the first gain bipolar transistor through the resistor and a collector that generates a saturation detection current indicating a saturation of the first gain bipolar transistor.

Abstract: Doherty power amplifiers with a controllable capacitor are disclosed. In certain embodiments, a Doherty power amplifier includes a carrier amplifier that amplifies a first radio frequency (RF) input signal, a peaking amplifier that amplifies a second RF input signal, and a combiner having a first input coupled to an output of the carrier amplifier, a second input coupled to an output of the peaking amplifier, and an output that provides a combined RF output signal. The combiner includes an inverter for providing impedance inversion between the first input and the output of the combiner, and a first controllable capacitor and a first inductor in series and operable to provide harmonic termination to the output of the carrier amplifier. A capacitance of the first controllable capacitor is controllable to tune both the inverter and the harmonic termination of the carrier amplifier.