Abstract: Mechanisms are provided for a graphical user interface tool for system-wide topology and performance monitoring with per-partition views. A graphical user interface application presents a consolidated view of physical and logical information based on the received performance data. The mechanisms provide real-time performance and utilization information in a visual format relative to the physical components in a topographical layout. The user may drill down to lower levels to view more detailed performance and utilization information.

Abstract: Mechanisms are provided for a graphical user interface tool for system-wide topology and performance monitoring with per-partition views. A graphical user interface application presents a consolidated view of physical and logical information based on the received performance data. The mechanisms provide real-time performance and utilization information in a visual format relative to the physical components in a topographical layout. The user may drill down to lower levels to view more detailed performance and utilization information.

Abstract: Mechanisms are provided for a graphical user interface tool for system-wide topology and performance monitoring with per-partition views. A graphical user interface application presents a consolidated view of physical and logical information based on the received performance data. The mechanisms provide real-time performance and utilization information in a visual format relative to the physical components in a topographical layout. The user may drill down to lower levels to view more detailed performance and utilization information.

Abstract: Apparatuses, methods, systems, and computer program products are disclosed for monitoring performance of multithreaded workloads. A workload module starts a workload comprising one or more threads. The workload reaches a steady state after a period of time. A data module receives a first set of performance data for each thread in response to the workload reaching the steady state. The first set of performance data is received concurrently for each thread. The data module receives a second set of performance data for each thread a period of time after the first set of performance data is received. The second set of performance data is received concurrently for each thread. A result module calculates one or more performance metrics for each thread based on the first and second sets of performance data.

Abstract: Apparatuses, methods, systems, and computer program products are disclosed for calculating a clock rate of a processor. A baseline data module receives a first set of performance data associated with a processor. The performance data is generated using a hardware element that captures performance data for the processor. The hardware element is external to the processor. An update data module receives a second set of performance data associated with the processor a predefined time interval after the first set of performance data is received. The second set of performance data corresponds to the first set of performance data. A rate module calculates a clock rate for the processor based on the first set of performance data and the second set of performance data.

Abstract: Apparatuses, methods, systems, and computer program products are disclosed for monitoring performance of multithreaded workloads. A workload module starts a workload comprising one or more threads. The workload reaches a steady state after a period of time. A data module receives a first set of performance data for each thread in response to the workload reaching the steady state. The first set of performance data is received concurrently for each thread. The data module receives a second set of performance data for each thread a period of time after the first set of performance data is received. The second set of performance data is received concurrently for each thread. A result module calculates one or more performance metrics for each thread based on the first and second sets of performance data.

Abstract: A method for storing service level agreement (“SLA”) compliance data includes reserving a memory location to store SLA compliance data of a software thread. The method includes directing the software thread to run on a selected hardware device. The method includes enabling SLA compliance data to be stored in the memory location. The SLA compliance data is from a hardware counting device in communication with the selected hardware device. The SLA compliance data corresponds to operation of the software thread on the selected hardware device.

Abstract: An apparatus for storing service level agreement (“SLA”) compliance data is disclosed. A method and a computer program product also perform the functions of the apparatus. The apparatus includes a reservation module that reserves a memory location to store SLA compliance data of a software thread. The apparatus includes a directing module that directs the software thread to run on a selected hardware device. The apparatus includes an enabling module that enables SLA compliance data to be stored in the memory location. The SLA compliance data is from a hardware counting device in communication with the selected hardware device. The SLA compliance data corresponds to operation of the software thread on the selected hardware device. At least a portion of the reservation, the module, and the enabling modules includes one or more of hardware and program instructions. The program instructions are stored on one or more computer readable storage media.

Abstract: A method for storing service level agreement (“SLA”) compliance data includes reserving a memory location to store SLA compliance data of a software thread. The method includes directing the software thread to run on a selected hardware device. The method includes enabling SLA compliance data to be stored in the memory location. The SLA compliance data is from a hardware counting device in communication with the selected hardware device. The SLA compliance data corresponds to operation of the software thread on the selected hardware device.

Abstract: An apparatus for storing service level agreement (“SLA”) compliance data is disclosed. A method and a computer program product also perform the functions of the apparatus. The apparatus includes a reservation module that reserves a memory location to store SLA compliance data of a software thread. The apparatus includes a directing module that directs the software thread to run on a selected hardware device. The apparatus includes an enabling module that enables SLA compliance data to be stored in the memory location. The SLA compliance data is from a hardware counting device in communication with the selected hardware device. The SLA compliance data corresponds to operation of the software thread on the selected hardware device. At least a portion of the reservation, the module, and the enabling modules includes one or more of hardware and program instructions. The program instructions are stored on one or more computer readable storage media.

Abstract: Apparatuses, methods, systems, and computer program products are disclosed for calculating a clock rate of a processor. A baseline data module receives a first set of performance data associated with a processor. The performance data is generated using a hardware element that captures performance data for the processor. The hardware element is external to the processor. An update data module receives a second set of performance data associated with the processor a predefined time interval after the first set of performance data is received. The second set of performance data corresponds to the first set of performance data. A rate module calculates a clock rate for the processor based on the first set of performance data and the second set of performance data.

Abstract: Mechanisms are provided for a graphical user interface tool for system-wide topology and performance monitoring with per-partition views. A graphical user interface application presents a consolidated view of physical and logical information based on the received performance data. The mechanisms provide real-time performance and utilization information in a visual format relative to the physical components in a topographical layout. The user may drill down to lower levels to view more detailed performance and utilization information.

Abstract: In-memory accumulation of hardware counts in a computer system is carried out by continuously sending count values from full-speed hardware counter units to a memory controller. A sending unit periodically samples performance data from the hardware counter units, and transmits count values to a bus interface for an interconnection bus which communicates with the memory controller. The memory controller responsively updates an accumulated count value stored in system memory using the current count value, e.g., incrementing the accumulated count value. A count value can be sent with a pointer to a memory location and an instruction on how the location is to be updated. The instruction may be an atomic read-modify-write operation, and the memory controller can include a dedicated arithmetic logic unit to carry out that operation. A data harvester can then be used to harvest accumulated count values by reading them from a table in system memory.

Abstract: Mechanisms are provided for a graphical user interface tool for system-wide topology and performance monitoring with per-partition views. A graphical user interface application presents a consolidated view of physical and logical information based on the received performance data. The mechanisms provide real-time performance and utilization information in a visual format relative to the physical components in a topographical layout. The user may drill down to lower levels to view more detailed performance and utilization information.

Abstract: In-memory accumulation of hardware counts in a computer system is carried out by continuously sending count values from full-speed hardware counter units to a memory controller. A sending unit periodically samples performance data from the hardware counter units, and transmits count values to a bus interface for an interconnection bus which communicates with the memory controller. The memory controller responsively updates an accumulated count value stored in system memory using the current count value, e.g., incrementing the accumulated count value. A count value can be sent with a pointer to a memory location and an instruction on how the location is to be updated. The instruction may be an atomic read-modify-write operation, and the memory controller can include a dedicated arithmetic logic unit to carry out that operation. A data harvester can then be used to harvest accumulated count values by reading them from a table in system memory.

Abstract: A computer configuration utility automatically alters system configuration parameters to sample multiple different configurations. At least one workrate metric is measured at each sampled configuration. The workrate measurements for the multiple different configurations are compared to determine the effect of different configurations with respect to at least one optimization criterion. System configuration is automatically adjusted to the optimum configuration. Preferably, the workrate metric is (non-idle) instructions executed per unit of time.

Abstract: A computer configuration utility automatically alters system configuration parameters to sample multiple different configurations. At least one workrate metric is measured at each sampled configuration. The workrate measurements for the multiple different configurations are compared to determine the effect of different configurations with respect to at least one optimization criterion. System configuration is automatically adjusted to the optimum configuration. Preferably, the workrate metric is (non-idle) instructions executed per unit of time.

Abstract: Mechanisms are provided for a graphical user interface tool for system-wide topology and performance monitoring with per-partition views. A graphical user interface application presents a consolidated view of physical and logical information based on the received performance data. The mechanisms provide real-time performance and utilization information in a visual format relative to the physical components in a topographical layout. The user may drill down to lower levels to view more detailed performance and utilization information.

Abstract: A computer configuration utility automatically alters system configuration parameters to sample multiple different configurations. At least one workrate metric is measured at each sampled configuration. The workrate measurements for the multiple different configurations are compared to determine the effect of different configurations with respect to at least one optimization criterion. System configuration is automatically adjusted to the optimum configuration. Preferably, the workrate metric is (non-idle) instructions executed per unit of time.

Abstract: An aspect of the present invention improves the accuracy of measuring processor utilization of multi-threaded cores by providing a calibration facility that derives utilization in the context of the overall dynamic operating state of the core by assigning weights to idle threads and assigning weights to run threads, depending on the status of the core. From previous chip designs it has been established in a Simultaneous Multi Thread (SMT) core that not all idle cycles in a hardware thread can be equally converted into useful work. Competition for core resources reduces the conversion efficiency of one thread's idle cycles when any other thread is running on the same core.