Abstract: An optical proximity detector includes a driver, light detector, analog front-end, sensor(s) that sense correction factor(s) (e.g., temperature, supply voltage and/or forward voltage drop), and a digital back end. The driver drives the light source to emit light. The light detector produces a light detection signal indicative of a magnitude and a phase of a portion of the emitted light that reflects off an object and is incident on the light detector. The analog front-end receives the light detection signal and outputs a digital light detection signal, or digital in-phase and quadrature-phase signals, which are provided to the digital back-end. The digital back-end performs closed loop correction(s) for dynamic variation(s) in gain and/or phase caused by a portion of the analog front-end, uses polynomial equation(s) and sensed correction factor(s) to perform open loop correction(s) for dynamic variations in temperature, supply voltage and/or forward voltage drop, and outputs a distance value.

Abstract: An optical proximity detector includes a driver, light detector, analog front-end, sensor(s) that sense correction factor(s) (e.g., temperature, supply voltage and/or forward voltage drop), and a digital back end. The driver drives the light source to emit light. The light detector produces a light detection signal indicative of a magnitude and a phase of a portion of the emitted light that reflects off an object and is incident on the light detector. The analog front-end receives the light detection signal and outputs a digital light detection signal, or digital in-phase and quadrature-phase signals, which are provided to the digital back-end. The digital back-end performs closed loop correction(s) for dynamic variation(s) in gain and/or phase caused by a portion of the analog front-end, uses polynomial equation(s) and sensed correction factor(s) to perform open loop correction(s) for dynamic variations in temperature, supply voltage and/or forward voltage drop, and outputs a distance value.

Abstract: An optical proximity detector includes a driver, light detector, analog front-end, sensor(s) that sense correction factor(s) (e.g., temperature, supply voltage and/or forward voltage drop), and a digital back end. The driver drives the light source to emit light. The light detector produces a light detection signal indicative of a magnitude and a phase of a portion of the emitted light that reflects off an object and is incident on the light detector. The analog front-end receives the light detection signal and outputs a digital light detection signal, or digital in-phase and quadrature-phase signals, which are provided to the digital back-end. The digital back-end performs closed loop correction(s) for dynamic variation(s) in gain and/or phase caused by a portion of the analog front-end, uses polynomial equation(s) and sensed correction factor(s) to perform open loop correction(s) for dynamic variations in temperature, supply voltage and/or forward voltage drop, and outputs a distance value.

Abstract: An optical proximity detector includes a driver, light detector, analog front-end, sensor(s) that sense correction factor(s) (e.g., temperature, supply voltage and/or forward voltage drop), and a digital back end. The driver drives the light source to emit light. The light detector produces a light detection signal indicative of a magnitude and a phase of a portion of the emitted light that reflects off an object and is incident on the light detector. The analog front-end receives the light detection signal and outputs a digital light detection signal, or digital in-phase and quadrature-phase signals, which are provided to the digital back-end. The digital back-end performs closed loop correction(s) for dynamic variation(s) in gain and/or phase caused by a portion of the analog front-end, uses polynomial equation(s) and sensed correction factor(s) to perform open loop correction(s) for dynamic variations in temperature, supply voltage and/or forward voltage drop, and outputs a distance value.

Abstract: Described herein are optical proximity detectors, methods for use therewith, and systems including an optical proximity detector. Such optical proximity detectors include an analog front-end and a digital back-end. In certain embodiments, the digital back-end includes a dynamic gain and phase offset corrector, a cross-talk corrector, a phase and magnitude calculator, and a static phase offset corrector. The dynamic gain and phase offset corrector corrects for dynamic variations in gain and phase offset of the analog front-end due to changes in temperature and/or operating voltage levels. The crosstalk corrector corrects for electrical and/or optical crosstalk associated with the analog front-end. The phase and magnitude calculator calculates phase and magnitude values in dependence on the corrected versions of digital in-phase and quadrature-phase signals received from the analog front-end. The static phase offset corrector corrects for a static phase offset of the optical proximity detector.

Abstract: Described herein are optical proximity detectors, methods for use therewith, and systems including an optical proximity detector. Such optical proximity detectors include an analog front-end and a digital back-end. In certain embodiments, the digital back-end includes a dynamic gain and phase offset corrector, a cross-talk corrector, a phase and magnitude calculator, and a static phase offset corrector. The dynamic gain and phase offset corrector corrects for dynamic variations in gain and phase offset of the analog front-end due to changes in temperature and/or operating voltage levels. The crosstalk corrector corrects for electrical and/or optical crosstalk associated with the analog front-end. The phase and magnitude calculator calculates phase and magnitude values in dependence on the corrected versions of digital in-phase and quadrature-phase signals received from the analog front-end. The static phase offset corrector corrects for a static phase offset of the optical proximity detector.

Abstract: Provided herein are methods and circuits that reduce a differential capacitance at differential nodes of a differential circuit while boosting the common mode capacitance at the differential nodes, where the differential circuit includes a pair of inputs and differential outputs. A negative capacitance is generated between differential nodes of the differential circuit, which can be accomplished by connecting a negative capacitance circuit between the differential nodes of the differential circuit. In an embodiment, the negative capacitance circuit is connected in parallel with the differential outputs of the differential circuit. In another embodiment, the negative capacitance circuit is connected in parallel with the inputs of the differential circuit. In still another embodiment, the negative capacitance circuit is connected in parallel with the differential internal nodes (i.e., nodes other than the input and output nodes) of the differential circuit.

Abstract: Provided herein are methods and circuits that reduce a differential capacitance at differential nodes of a differential circuit while boosting the common mode capacitance at the differential nodes, where the differential circuit includes a pair of inputs and differential outputs. A negative capacitance is generated between differential nodes of the differential circuit, which can be accomplished by connecting a negative capacitance circuit between the differential nodes of the differential circuit. In an embodiment, the negative capacitance circuit is connected in parallel with the differential outputs of the differential circuit. In another embodiment, the negative capacitance circuit is connected in parallel with the inputs of the differential circuit. In still another embodiment, the negative capacitance circuit is connected in parallel with the differential internal nodes (i.e., nodes other than the input and output nodes) of the differential circuit.

Abstract: Provided herein are methods and circuits that reduce a differential capacitance at differential nodes of a differential circuit while boosting the common mode capacitance at the differential nodes, where the differential circuit includes a pair of inputs and differential outputs. A negative capacitance is generated between differential nodes of the differential circuit, which can be accomplished by connecting a negative capacitance circuit between the differential nodes of the differential circuit. In an embodiment, the negative capacitance circuit is connected in parallel with the differential outputs of the differential circuit. In another embodiment, the negative capacitance circuit is connected in parallel with the inputs of the differential circuit. In still another embodiment, the negative capacitance circuit is connected in parallel with the differential internal nodes (i.e., nodes other than the input and output nodes) of the differential circuit.

Abstract: A circuit in accordance with an embodiment of the present invention includes an instrumentation amplifier, a dynamically adjustable low pass filter, at least one monitor and a controller. The instrumentation amplifier includes a pair of buffered operational amplifiers that accept a pair of input signals, and a differential operational amplifier that outputs an output signal indicative of a difference between the pair of input signals. The dynamically adjustable low pass filter is configured to provide band limiting of the output signal at frequencies greater than a cutoff frequency. The monitor, or monitors, is/are configured to monitor a signal upstream of the instrumentation amplifier and/or a signal downstream of the instrumentation amplifier and output a monitor signal.

Abstract: An instrumentation amplifier includes a pair of buffered operational amplifiers that accept a pair of input signals, and a differential operational amplifier that outputs an output signal indicative of a difference between the input signals. A low pass filter provides passive band limiting of the output signal. Each operational amplifier is implemented as a multi-path amplifier that includes a low frequency path and a high frequency path between an input and an output of the operational amplifier. Further, each multi-path amplifier includes a differential input transconductance stage within the low frequency path and a differential input transconductance stage within the high frequency path. Within each multi-path amplifier, the differential input transconductance stage of the high frequency path is noisier than, but consumes less power than, the differential input transconductance stage of the low frequency path.

Abstract: A circuit in accordance with an embodiment of the present invention includes an instrumentation amplifier, a dynamically adjustable low pass filter, at least one monitor and a controller. The instrumentation amplifier includes a pair of buffered operational amplifiers that accept a pair of input signals, and a differential operational amplifier that outputs an output signal indicative of a difference between the pair of input signals. The dynamically adjustable low pass filter is configured to provide band limiting of the output signal at frequencies greater than a cutoff frequency. The monitor, or monitors, is/are configured to monitor a signal upstream of the instrumentation amplifier and/or a signal downstream of the instrumentation amplifier and output a monitor signal.

Abstract: An instrumentation amplifier includes a pair of buffered operational amplifiers that accept a pair of input signals, and a differential operational amplifier that outputs an output signal indicative of a difference between the input signals. A low pass filter provides passive band limiting of the output signal. Each operational amplifier is implemented as a multi-path amplifier that includes a low frequency path and a high frequency path between an input and an output of the operational amplifier. Further, each multi-path amplifier includes a differential input transconductance stage within the low frequency path and a differential input transconductance stage within the high frequency path. Within each multi-path amplifier, the differential input transconductance stage of the high frequency path is noisier than, but consumes less power than, the differential input transconductance stage of the low frequency path.

Abstract: Provided herein are amplifiers including negative capacitance circuits for reducing distortion resulting from a gate-source (or base-emitter) capacitance of output stages of such amplifiers. Such a negative capacitance circuit is connected in parallel with the gate-source (or base-emitter) capacitance of the output stage to shunt the gate-source (or base-emitter) capacitance and thereby reduce distortion. Also provided herein are methods for use with amplifiers including an output stage, including connecting a negative capacitance circuit in parallel with a base-emitter capacitance of the output stage.

Abstract: Provided herein are methods and circuits that reduce a differential capacitance at differential nodes of a differential circuit while boosting the common mode capacitance at the differential nodes, where the differential circuit includes a pair of inputs and differential outputs. A negative capacitance is generated between differential nodes of the differential circuit, which can be accomplished by connecting a negative capacitance circuit between the differential nodes of the differential circuit. In an embodiment, the negative capacitance circuit is connected in parallel with the differential outputs of the differential circuit. In another embodiment, the negative capacitance circuit is connected in parallel with the inputs of the differential circuit. In still another embodiment, the negative capacitance circuit is connected in parallel with the differential internal nodes (i.e., nodes other than the input and output nodes) of the differential circuit.

Abstract: Provided herein are negative capacitance circuits for reducing distortion resulting from a gate-source (or base-emitter) capacitance of an output stage. Such a negative capacitance circuit is connected in parallel with the gate-source (or base-emitter) capacitance of the output stage to shunt the gate-source (or base-emitter) capacitance and thereby reduce distortion.

Abstract: Provided herein are amplifiers including negative capacitance circuits for reducing distortion resulting from a gate-source (or base-emitter) capacitance of output stages of such amplifiers. Such a negative capacitance circuit is connected in parallel with the gate-source (or base-emitter) capacitance of the output stage to shunt the gate-source (or base-emitter) capacitance and thereby reduce distortion. Also provided herein are methods for use with amplifiers including an output stage, including connecting a negative capacitance circuit in parallel with a base-emitter capacitance of the output stage.

Abstract: Provided herein are negative capacitance circuits for reducing distortion resulting from a gate-source (or base-emitter) capacitance of an output stage. Such a negative capacitance circuit is connected in parallel with the gate-source (or base-emitter) capacitance ofthe output stage to shunt the gate-source (or base-emitter) capacitance and thereby reduce distortion.