Abstract: A few times programmable (FTP) storage element is provided. The FTP storage element includes a set of N elementary memory units and multiple selection circuits. Each of the elementary memory units includes an address bus for connection to a main address bus and a data bus for connection to a main data bus. The selection circuits generate successive selection signals for successively selecting one of the elementary memory units in order to give exclusive access to the one selected elementary memory unit. The selection circuits operate so as to automatically select a next one of the elementary memory units upon detection of a predetermined condition. In preferred embodiments, each of the elementary memory units is programmable.

Abstract: An OTP memory cell in CMOS technology, including a capacitor associated in series with an unbalanced programming transistor, the drain of which is made of a region deeper and less doped than the source.

Abstract: An OTP memory cell in CMOS technology, including a capacitor associated in series with an unbalanced programming transistor, the drain of which is made of a region deeper and less doped than the source.

Abstract: An OTP memory integrated circuit in CMOS technology, including at least two oxide capacitors forming a differential reading storage element, and a read and programming circuit in which the transistors of a first conductivity type are adapted to being used both during read cycles under a relatively low voltage and during programming cycles under a relatively high voltage.