Patents by Inventor Phillip Johnson

Phillip Johnson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7756982
    Abstract: Under the present invention, a request for a Uniform Resource Locator (URL) is received from a client on a server. Upon receipt, a corresponding session object is obtained, and a response identifier is generated. Based on the response identifier, it is determined whether the URL was previously requested by the client. If not, generation of a final response begins. As the response is being generated, a response refresh header is generated and returned to the client with a temporary response. The response refresh header contains a time value for causing the client to automatically send a subsequent request for the URL. After generation of the final response is complete, it is stored in a cache according to the response identifier. Then, when the subsequent request is received from the client, the final response is retrieved from the cache and served to the client.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: July 13, 2010
    Assignee: International Business Machines Corporation
    Inventor: David Phillip Johnson
  • Patent number: 7620839
    Abstract: Systems and methods are disclosed herein to provide improved jitter tolerant delay-locked loop circuitry. For example, in accordance with an embodiment of the present invention, an integrated circuit includes a plurality of delay cells each having a plurality of programmable delay taps. Each delay cell is adapted to provide a delayed clock signal delayed by a selected number of the delay taps. A phase detector is adapted to compare a first clock signal with a selected one of the delayed clock signals to obtain a comparison result and provide a plurality of control signals in response to the comparison result. An arithmetic logic unit (ALU) is adapted to vary the selected number of delay taps in response to the control signals provided by the phase detector.
    Type: Grant
    Filed: December 13, 2005
    Date of Patent: November 17, 2009
    Assignee: Lattice Semiconductor Corporation
    Inventors: Zheng (Jeff) Chen, Phillip Johnson, Fulong Zhang
  • Patent number: 7616029
    Abstract: In one embodiment of the invention, a bias signal monitor has two signal comparators that compare two (power supply) voltages at two different bias points and a logic circuit that processes the outputs from the two signal monitors to generate a bias signal monitor output signal. The logic circuit implements hysteresis-based processing such that (1) if both signal comparators are active (indicating that a first voltage is greater than the second voltage relative to both bias points), then the monitor output is active, (2) if both signal comparators are inactive (indicating that the first voltage is not greater than the second voltage relative to either bias point), then the monitor output is inactive, and (3) if one signal comparator is active and the other is inactive, then the monitor output keeps its previous value. This hysteresis characteristic prevents relatively small oscillations between the voltages from changing the monitor output.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: November 10, 2009
    Assignee: Lattice Semiconductor Corporation
    Inventors: William B. Andrews, Phillip Johnson, John Schadt, Harold Scholz
  • Patent number: 7599457
    Abstract: In one embodiment of the invention, a clock-and-data-recovery (CDR) system has a multi-phase clock generator that generates a plurality of phase-offset clock signals and one or more channel circuits, each receiving a (different) input data signal and all of the phase-offset clock signals and generates an output data stream and a recovered clock signal. Each channel circuit has a plurality of data registers (e.g., flip-flops), each receiving the input data signal at its clock input port and a different one of the phase-offset clock signals at its data input port, such that the flip-flop is triggered at each (rising) edge in the input data signal. The channel circuit processes the outputs from the different flip-flops to select an appropriate phase-offset clock signal for use in sampling the input data signal to generate the output data stream, where the recovered clock signal is generated from the selected phase-offset clock signal.
    Type: Grant
    Filed: August 8, 2005
    Date of Patent: October 6, 2009
    Assignee: Lattice Semiconductor Corporation
    Inventors: Phillip Johnson, Zheng Chen, Barry Britton
  • Patent number: 7586344
    Abstract: In one embodiment, the invention can be a clock-generating circuit having one or more clock-processing circuits, each outputting a clock signal having an adjustable phase. Each clock-processing circuit comprises a divider and a divisor control circuit. Each divider divides an input clock signal by a respective divisor value and outputs a corresponding output clock signal whose period is determined by the divisor value and the period of the input clock signal. Each divider receives the respective divisor value from the corresponding divisor control circuit, wherein the divisor value is selected in order to achieve a desired frequency and phase for the corresponding output clock signal. Temporarily changing a divisor value can advance or delay the phase of the corresponding output clock signal without having to reset the divider.
    Type: Grant
    Filed: October 16, 2007
    Date of Patent: September 8, 2009
    Assignee: Lattice Semiconductor Corporation
    Inventors: Richard Booth, Phillip Johnson, Zheng Chen
  • Patent number: 7521969
    Abstract: Systems and methods are disclosed herein to provide improved I/O techniques. For example, in accordance with an embodiment of the present invention, an integrated circuit includes a driver that receives data signals and provides an output signal based on the data signals, with the driver having a plurality of transistors with a first set of the plurality of transistors adapted to provide a first logical value as the output signal and a second set of the plurality of transistors adapted to provide a second logical value as the output signal based on the data signals. A sequencing circuit provides the data signals to the driver such that the first set of the plurality of transistors is switched on before the second set of the plurality of transistors is switched off, and the second set of the plurality of transistors is switched on before the first set of the plurality of transistors is switched off.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: April 21, 2009
    Assignee: Lattice Semiconductor Corporation
    Inventors: Richard Booth, Phillip Johnson
  • Publication number: 20080320409
    Abstract: In an event detection and monitoring system displaying event data in both tabular and chart formats, the displays of each are tightly-coupled to one another so that when a user selects an event in one format the corresponding event in the other format is highlighted or otherwise emphasized. When a user selects a row containing an event of interest in the event log table, the symbol in the event log chart corresponding to the selected event is simultaneously highlighted. Similarly, when a user selects a symbol in the event log chart corresponding to an event of interest, the row in the event log table containing the corresponding event is simultaneously highlighted. In addition, the rows of the event log table can be sorted and filtered according to predetermined criteria, and the events selected by the filters are highlighted in the chart with indicia distinguishing the filter.
    Type: Application
    Filed: August 20, 2008
    Publication date: December 25, 2008
    Inventors: Mark E. Molander, Karen Ruth Kluttz, Radal Lee Bertram, David Phillip Johnson
  • Patent number: 7446769
    Abstract: In an event detection and monitoring system displaying event data in both tabular and chart formats, the displays of each are tightly-coupled to one another so that when a user selects an event in one format the corresponding event in the other format is highlighted or otherwise emphasized. When a user selects a row containing an event of interest in the event log table, the symbol in the event log chart corresponding to the selected event is simultaneously highlighted. Similarly, when a user selects a symbol in the event log chart corresponding to an event of interest, the row in the event log table containing the corresponding event is simultaneously highlighted. In addition, the rows of the event log table can be sorted and filtered according to predetermined criteria, and the events selected by the filters are highlighted in the chart with indicia distinguishing the filter.
    Type: Grant
    Filed: February 10, 2004
    Date of Patent: November 4, 2008
    Assignee: International Business Machines Corporation
    Inventors: Mark E. Molander, Karen Ruth Kluttz, Randal Le Bertram, David Phillip Johnson
  • Patent number: 7413391
    Abstract: A cotter pin includes first and second tines having flat confronting surfaces and curved side surfaces with flat outer surfaces substantially parallel to the flat confronting surfaces thereof.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: August 19, 2008
    Assignee: Illinois Tool Works Inc.
    Inventors: Jerome D. Dewitz, Brian Beardsley, Phillip Johnson
  • Publication number: 20080140774
    Abstract: Under the present invention, a request for a Uniform Resource Locator (URL) is received from a client on a server. Upon receipt, a corresponding session object is obtained, and a response identifier is generated. Based on the response identifier, it is determined whether the URL was previously requested by the client. If not, generation of a final response begins. As the response is being generated, a response refresh header is generated and returned to the client with a temporary response. The response refresh header contains a time value for causing the client to automatically send a subsequent request for the URL. After generation of the final response is complete, it is stored in a cache according to the response identifier. Then, when the subsequent request is received from the client, the final response is retrieved from the cache and served to the client.
    Type: Application
    Filed: February 20, 2008
    Publication date: June 12, 2008
    Inventor: David Phillip Johnson
  • Patent number: 7349968
    Abstract: Under the present invention, a request for a Uniform Resource Locator (URL) is received from a client on a server. Upon receipt, a corresponding session object is obtained, and a response identifier is generated. Based on the response identifier, it is determined whether the URL was previously requested by the client. If not, generation of a final response begins. As the response is being generated, a response refresh header is generated and returned to the client with a temporary response. The response refresh header contains a time value for causing the client to automatically send a subsequent request for the URL. After generation of the final response is complete, it is stored in a cache according to the response identifier. Then, when the subsequent request is received from the client, the final response is retrieved from the cache and served to the client.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: March 25, 2008
    Assignee: International Business Machines Corporation
    Inventor: David Phillip Johnson
  • Publication number: 20080024171
    Abstract: Systems and methods are disclosed herein to provide improved I/O techniques. For example, in accordance with an embodiment of the present invention, an integrated circuit includes a driver that receives data signals and provides an output signal based on the data signals, with the driver having a plurality of transistors with a first set of the plurality of transistors adapted to provide a first logical value as the output signal and a second set of the plurality of transistors adapted to provide a second logical value as the output signal based on the data signals. A sequencing circuit provides the data signals to the driver such that the first set of the plurality of transistors is switched on before the second set of the plurality of transistors is switched off, and the second set of the plurality of transistors is switched on before the first set of the plurality of transistors is switched off.
    Type: Application
    Filed: July 28, 2006
    Publication date: January 31, 2008
    Inventors: Richard Booth, Phillip Johnson
  • Publication number: 20070256634
    Abstract: Mask (10, 10?, 21, 22, 30) for use in coating a carbon-carbon composite brake disc (25) with anti-oxidant. The mask is composed of carbon-carbon composite material or nonreactive ceramic material. The mask is configured with edge ridges (11, 13, 34, 36) that are aligned with the outer and inner annular diameters of the carbon-carbon composite brake disc, a gas flow channel (12, 32) between the ridges, and a gas access port (18, 40) that allows gas to enter the gas flow channel. The mask may also include a gas exit port (16) having a valve (17) operatively connected thereto, so that gas flow may be restricted when pressure within the mask and carbon-carbon composite brake disc falls below a specified minimum value.
    Type: Application
    Filed: June 1, 2007
    Publication date: November 8, 2007
    Inventors: Allen Simpson, Richard Smith, Marcia Wright, Phillip Johnson, David Cole
  • Publication number: 20070228236
    Abstract: Embodiments of the present invention provide an anchor assembly configured to be secured to a panel. The anchor assembly includes a main body, a double-sided adhesive, and a fastening member. The main body includes a base, wherein a through-hole is formed through the base. The double-sided adhesive is attached to one side of the base. The fastening member is retained within the through-hole. The fastening member may be manufactured with the main body and the double-sided adhesive as a single piece.
    Type: Application
    Filed: January 25, 2007
    Publication date: October 4, 2007
    Inventors: Andrew MacKay, Phillip Johnson, Frank W. Bechetel, Scott H. Carr, Terrence P. Meier
  • Patent number: D606374
    Type: Grant
    Filed: February 6, 2009
    Date of Patent: December 22, 2009
    Inventors: Phillip Johnson, April Chavis Johnson
  • Patent number: D618825
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: June 29, 2010
    Inventor: Phillip A. Johnson
  • Patent number: D620658
    Type: Grant
    Filed: November 2, 2009
    Date of Patent: July 27, 2010
    Inventor: Phillip A. Johnson
  • Patent number: D635395
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: April 5, 2011
    Inventor: Phillip A. Johnson
  • Patent number: D636131
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: April 12, 2011
    Inventor: Phillip A. Johnson
  • Patent number: D649868
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: December 6, 2011
    Inventor: Phillip A. Johnson