Abstract: A system, method and apparatus for executing an HMM analysis on genetic sequence data includes an integrated circuit formed of a set of hardwired digital logic circuits that are interconnected by physical electrical interconnects. One of the physical electrical interconnects forms an input to the integrated circuit that may be connected with an electronic data source for receiving reads of genomic data. The hardwired digital logic circuits may be arranged as a set of processing engines, each processing engine being formed of a subset of the hardwired digital logic circuits to perform one or more steps in the HMM analysis on the reads of genomic data. Each subset of the hardwired digital logic circuits may be formed in a wired configuration to perform the one or more steps in the HMM analysis.

Abstract: A system, method and apparatus for executing a sequence analysis pipeline on genetic sequence data includes a structured ASIC formed of a set of hardwired digital logic circuits that are interconnected by physical electrical interconnects. One of the physical electrical interconnects forms an input to the structured ASIC connected with an electronic data source for receiving reads of genomic data. The hardwired digital logic circuits are arranged as a set of processing engines, each processing engine being formed of a subset of the hardwired digital logic circuits to perform one or more steps in the sequence analysis pipeline on the reads of genomic data. Each subset of the hardwired digital logic circuits is formed in a wired configuration to perform the one or more steps in the sequence analysis pipeline.

Abstract: A system, method and apparatus for executing a sequence analysis pipeline on genetic sequence data includes a structured ASIC formed of a set of hardwired digital logic circuits that are interconnected by physical electrical interconnects. One of the physical electrical interconnects forms an input to the structured ASIC connected with an electronic data source for receiving reads of genomic data. The hardwired digital logic circuits are arranged as a set of processing engines, each processing engine being formed of a subset of the hardwired digital logic circuits to perform one or more steps in the sequence analysis pipeline on the reads of genomic data. Each subset of the hardwired digital logic circuits is formed in a wired configuration to perform the one or more steps in the sequence analysis pipeline.

Abstract: A system, method and apparatus for executing a sequence analysis pipeline on genetic sequence data includes an integrated circuit formed of a set of hardwired digital logic circuits that are interconnected by physical electrical interconnects. One of the physical electrical interconnects forms an input to the integrated circuit connected with an electronic data source for receiving reads of genomic data. The hardwired digital logic circuits are arranged as a set of processing engines, each processing engine being formed of a subset of the hardwired digital logic circuits to perform one or more steps in the sequence analysis pipeline on the reads of genomic data. Each subset of the hardwired digital logic circuits is formed in a wired configuration to perform the one or more steps in the sequence analysis pipeline.

Abstract: A system, method and apparatus for executing a sequence analysis pipeline on genetic sequence data includes a structured ASIC formed of a set of hardwired digital logic circuits that are interconnected by physical electrical interconnects. One of the physical electrical interconnects forms an input to the structured ASIC connected with an electronic data source for receiving reads of genomic data. The hardwired digital logic circuits are arranged as a set of processing engines, each processing engine being formed of a subset of the hardwired digital logic circuits to perform one or more steps in the sequence analysis pipeline on the reads of genomic data. Each subset of the hardwired digital logic circuits is formed in a wired configuration to perform the one or more steps in the sequence analysis pipeline.

Abstract: Certain aspects of a method and system for processing signals in a communication system may include maximizing system capacity for a communication system, based on a signal for a user within a search range and at least one other signal for one other user within the search range. The search range may be generated by sorting a plurality of signals based on a channel gain corresponding to each of the plurality of signals. The signal for the user may be selected from the search range corresponding to a channel gain that is greater than a channel gain corresponding to a remaining portion of the search range.

Abstract: A system, method and apparatus for executing a sequence analysis pipeline on genetic sequence data includes a structured ASIC formed of a set of hardwired digital logic circuits that are interconnected by physical electrical interconnects. One of the physical electrical interconnects forms an input to the structured ASIC connected with an electronic data source for receiving reads of genomic data. The hardwired digital logic circuits are arranged as a set of processing engines, each processing engine being formed of a subset of the hardwired digital logic circuits to perform one or more steps in the sequence analysis pipeline on the reads of genomic data. Each subset of the hardwired digital logic circuits is formed in a wired configuration to perform the one or more steps in the sequence analysis pipeline.

Abstract: Methods and systems for communicating information in a wireless communication system are disclosed herein and may include determining at least a bit-error-rate (BER) for at least a DVB-H downlink communication path utilized for communicating multimedia content in a communication system. The communication system may include a plurality of downlink communication paths, at least two of the plurality of downlink communication paths may use different communication protocols, and at least one of the plurality of downlink communication paths may include the DVB-H downlink communication path. At least a portion of the multimedia content may be communicated via at least one of the plurality of downlink communication paths to at least one mobile communication device based on at least the determined at least the BER.

Abstract: A system and method for generating weight values based on maximum data rate for weighting elements included within signal weighting and combining arrangements used in various multi-antenna transmitter and receiver structures is disclosed herein. Weighting values for a given signal combining arrangement are set so as to maximize an output data rate of the applicable multi-antenna system in the presence of adaptive bit loading of the subcarriers of a transmitted signal. The disclosed techniques may be employed to maximize a data rate of a multi-antenna communication system by using adaptive bit loading and RF and baseband weighting schemes. In this case a search is conducted over various combinations of RF and baseband weights in order to find the weight combination which, when adaptive bit loading is also employed, maximizes the data rate.

Abstract: A system, method and apparatus for executing a sequence analysis pipeline on genetic sequence data includes a structured ASIC formed of a set of hardwired digital logic circuits that are interconnected by physical electrical interconnects. One of the physical electrical interconnects forms an input to the structured ASIC connected with an electronic data source for receiving reads of genomic data. The hardwired digital logic circuits are arranged as a set of processing engines, each processing engine being formed of a subset of the hardwired digital logic circuits to perform one or more steps in the sequence analysis pipeline on the reads of genomic data.

Abstract: Methods and systems for processing signals in a receiver are disclosed herein and may comprise generating at least one control signal that may be utilized to control a first received signal. A phase of the first received signals may be adjusted via the generated control signal so that the phase of the first received signal may be equivalent to a phase of a second received signal, where the phase of the first signal may be adjusted within a processing path used to process the first received signal. An amplitude of the first received signal may be adjusted via the generated control signal so that the amplitude of the first received signal may be equivalent to an amplitude of a second received signal, where the amplitude of the first signal is adjusted within the processing path used to process the first received signal.

Abstract: Methods and systems for communicating information in a wireless communication system are disclosed herein and may include determining at least a bit-error-rate (BER) for at least a DVB-H downlink communication path utilized for communicating multimedia content in a communication system. The communication system may include a plurality of downlink communication paths, at least two of the plurality of downlink communication paths may use different communication protocols, and at least one of the plurality of downlink communication paths may include the DVB-H downlink communication path. At least a portion of the multimedia content may be communicated via at least one of the plurality of downlink communication paths to at least one mobile communication device based on at least the determined at least the BER.

Abstract: Certain aspects of a method and system for processing signals in a communication system may include maximizing system capacity for a time division duplex (TDD) multiple-input multiple-output (MIMO) system, based on reducing a search range within which to find a group of signals having maximum channel gain. At least one of: a first signal for a first user and a second signal for a second user may be selected, which are both within the reduced search range, and which provides a maximum system capacity. The first signal for the first user may be selected from the reduced search range corresponding to a channel gain that is greater than a channel gain corresponding to a remaining portion of the reduced search range. The reduced search range may be generated by sorting a plurality of signals based on a channel gain corresponding to each of the plurality of signals.

Abstract: A self-serve kiosk includes a blood, fluid or tissue test device for obtaining a blood, fluid or tissue sample from a user, analyzing the sample, and generating in vitro diagnostic data. The kiosk may also have non-invasive test devices for obtaining vitals measurements from the user, such as a weight scale, a blood pressure device and a heart rate monitor. A user interface such as a touch screen obtains input of personal health information from the user. The test measurements and input data are analyzed, and a health snapshot, risk assessment, guidance plans and incentives are generated and provided to the user.

Abstract: Certain aspects of a method and system for processing signals in a communication system may include maximizing system capacity for a time division duplex (TDD) multiple-input multiple-output (MIMO) system, based on reducing a search range within which to find a group of signals having maximum channel gain. At least one of: a first signal for a first user and a second signal for a second user may be selected, which are both within the reduced search range, and which provides a maximum system capacity. The first signal for the first user may be selected from the reduced search range corresponding to a channel gain that is greater than a channel gain corresponding to a remaining portion of the reduced search range. The reduced search range may be generated by sorting a plurality of signals based on a channel gain corresponding to each of the plurality of signals.

Abstract: A system, method and apparatus for executing a sequence analysis pipeline on genetic sequence data includes a structured ASIC formed of a set of hardwired digital logic circuits that are interconnected by physical electrical interconnects. One of the physical electrical interconnects forms an input to the structured ASIC connected with an electronic data source for receiving reads of genomic data. The hardwired digital logic circuits are arranged as a set of processing engines, each processing engine being formed of a subset of the hardwired digital logic circuits to perform one or more steps in the sequence analysis pipeline on the reads of genomic data. Each subset of the hardwired digital logic circuits is formed in a wired configuration to perform the one or more steps in the sequence analysis pipeline.

Abstract: The invention relates to a system and method of analysing material as well as to an apparatus for analysing material, particularly, though not necessarily exclusively, biomaterial. The invention entails receiving holographic intensity data comprising at least a holographic intensity pattern associated with a sample of the material of interest and processing, by applying image processing algorithms and techniques, the received holographic intensity data at least to perform one or both steps of detecting and identifying at least one object of interest in the sample thereby at least to generate a suitable output.

Abstract: A receiver receives multipath signals in a W-CDMA system. Channel estimates and timing reference signals are generated utilizing the received multipath signals. Timing correction signals indicating a location of the received multipath signals may be generated and the received multipath signals may be combined based on the computed channel estimates and/or the generated timing reference signals. The multipath signals may be combined as a signal cluster. Circuitry may be provided that computes channel estimates based on at least one of a plurality of received multipath signals, and generates timing reference signals indicating a location of at least one of the plurality of received multipath signals. Circuitry may also be provided that combines at least a portion of the plurality of received multipath signals based on at least a portion of the computed channel estimates and/or the generated timing reference signals.

Abstract: A method and system for a reconfigurable orthogonal frequency division multiplexing (OFDM) chip supporting single weight diversity are provided. The reconfigurable OFDM chip may be configured to process signals such as IEEE 802.11, 802.16, and digital video broadcasting (DVB). The OFDM chip may generate channel weights to be applied to signals received in receive antennas. The weighted signals may be combined into a single received signal and channel estimates may be generated from the single received signal. Updated channel weights may be generated from the generated channel estimates. Updates to the channel weights may be performed dynamically. The configurable OFDM chip may be utilized to provide collaborative cellular and OFDM-based communication. The reconfigurable OFDM chip and the cellular chip may communicate data and/or control information via a memory coupled to a common bus.

Abstract: The invention relates to a hologram, or holographic intensity data, processing method and system. The system implements the method which comprises receiving holographic intensity data comprising at least a holographic intensity pattern or image at a discrete location in a propagation space, the propagation space comprising the three-dimensional space over which light waves or illumination forming the holographic intensity pattern propagates. The method comprises determining one or more data key-points of at least one potential object of interest (19) in the received holographic intensity data, and also comparing the determined one or more data key-points to at least one pre-determined propagation space invariant object descriptor associated with an object to determine a match in order to identify or detect the object and determine its location in the propagation space.