Abstract: A display device includes: a substrate including a display area and a non-display area around the display area; a light-emitting element disposed in the display area; an encapsulating layer sealing the light-emitting element; and a dam disposed in the non-display area. The dam includes a first layer and a second layer on the first layer, the first layer includes a first portion with a first height and a second portion with a second height that is less than the first height, and the second layer covers a lateral surface of the first portion.

Abstract: A light emitting diode display includes a first electrode, a second electrode overlapping the first electrode, a light emission layer between the first electrode and the second electrode, a pixel defining layer overlapping a part of the first electrode, the pixel defining layer and the light emission layer being spaced apart from each other in a top view, and an inorganic layer between the first electrode and the light emission layer, and an edge of the inorganic layer overlapping the light emission layer and the pixel defining layer.

Abstract: A display device comprises: a base layer, islands and bridges, the islands and the bridges disposed on the base layer, the bridges connecting the islands to each other, first wirings disposed on the bridges, pixels disposed on the islands, the first wirings disposed on the bridges, pixels disposed on the islands, the first wirings being connected to the pixels; an inorganic insulating layer disposed on the base layer, the inorganic insulating layer includes an opening exposing the base layer of a bridge region having the bridges; second wirings disposed in the opening; and a first organic insulating layer disposed between the first wirings and the second wirings, where the first wirings and the second wirings are connected to each other through first contact holes formed in the first organic insulating layer.

Abstract: A transistor array panel includes a transistor which includes a gate electrode, a semiconductor layer on the gate electrode, and a source electrode and a drain electrode on the semiconductor layer. The semiconductor layer includes a first portion overlapping the source electrode, a second portion overlapping the drain electrode, and a third portion between the first portion and the second portion. The first portion, the second portion, and the third portion have different minimum thicknesses.

Abstract: A display apparatus includes a thin film transistor on a first base substrate, the thin film transistor including a gate electrode disposed on the first base substrate, an active pattern disposed on the first base substrate and including a semiconductor layer including of amorphous silicon and an ohmic contact layer which is on the semiconductor layer, a drain electrode disposed on the ohmic contact layer and having a first thickness, and a source electrode disposed on the ohmic contact layer and having a second thickness which is greater than the first thickness.

Abstract: A display apparatus having a display area and a pad area and a method of manufacturing the same, the display apparatus including a base substrate; a thin film transistor on the base substrate in the display area; an insulation layer on the base substrate and the thin film transistor; a conductive pattern layer on the insulation layer, the conductive pattern layer including a pad electrode in the pad area; and a via insulation layer on the insulation layer, exposing an upper surface of the pad electrode, and covering edges of the pad electrode, wherein, in the pad area, the insulation layer includes a groove having a depth, the pad electrode being in the groove.

Abstract: A display device includes: a substrate including a display area and a non-display area around the display area; a light-emitting element disposed in the display area; an encapsulating layer sealing the light-emitting element; and a dam disposed in the non-display area. The dam includes a first layer and a second layer on the first layer, the first layer includes a first portion with a first height and a second portion with a second height that is less than the first height, and the second layer covers a lateral surface of the first portion.

Abstract: An organic light emitting diode (OLED) display includes a first substrate, a second substrate facing the first substrate, a sealing member interposed between the first substrate and the second substrate, the sealing member including a siloxane material, a semiconductor layer on the first substrate, a planarization layer on the semiconductor layer, and a barrier rib on the planarization layer. The planarization layer or the barrier rib may also include the siloxane material.

Abstract: A transistor array panel includes a transistor which includes a gate electrode, a semiconductor layer on the gate electrode, and a source electrode and a drain electrode on the semiconductor layer. The semiconductor layer includes a first portion overlapping the source electrode, a second portion overlapping the drain electrode, and a third portion between the first portion and the second portion. The first portion, the second portion, and the third portion have different minimum thicknesses.

Abstract: A stretchable display device includes a stretchable substrate including a plurality of island areas that are separated from each other and a hinge area connecting the plurality of island areas, a plurality of display units respectively located in each of the plurality of island areas, a wiring part connecting the plurality of display units and located at the hinge area, and an insulating layer between the stretchable substrate and the plurality of display units. The insulating layer includes an opening overlapping the hinge area.

Abstract: A transistor array panel includes a transistor which includes a gate electrode, a semiconductor layer on the gate electrode, and a source electrode and a drain electrode on the semiconductor layer. The semiconductor layer includes a first portion overlapping the source electrode, a second portion overlapping the drain electrode, and a third portion between the first portion and the second portion. The first portion, the second portion, and the third portion have different minimum thicknesses.

Abstract: A light emitting diode display includes a first electrode, a second electrode overlapping the first electrode, a light emission layer between the first electrode and the second electrode, a pixel defining layer overlapping a part of the first electrode, the pixel defining layer and the light emission layer being spaced apart from each other in a top view, and an inorganic layer between the first electrode and the light emission layer, and an edge of the inorganic layer overlapping the light emission layer and the pixel defining layer.

Abstract: A display apparatus includes a thin film transistor on a first base substrate, the thin film transistor including a gate electrode disposed on the first base substrate, an active pattern disposed on the first base substrate and including a semiconductor layer including of amorphous silicon and an ohmic contact layer which is on the semiconductor layer, a drain electrode disposed on the ohmic contact layer and having a first thickness, and a source electrode disposed on the ohmic contact layer and having a second thickness which is greater than the first thickness.

Abstract: A transistor array panel includes a transistor which includes a gate electrode, a semiconductor layer on the gate electrode, and a source electrode and a drain electrode on the semiconductor layer. The semiconductor layer includes a first portion overlapping the source electrode, a second portion overlapping the drain electrode, and a third portion between the first portion and the second portion. The first portion, the second portion, and the third portion have different minimum thicknesses.

Abstract: A liquid crystal display is provided. The liquid crystal display includes: a substrate; a thin film transistor; a pixel electrode; a roof layer; a plurality of microcavities; and a partition wall. The thin film transistor is disposed on the substrate. The pixel electrode is disposed on the thin film transistor. The roof layer faces the pixel electrode. The microcavities are between the pixel electrode and the roof layer, the microcavities include a liquid crystal material. The partition wall is between the microcavities, and the partition wall is perpendicular to the roof layer.

Abstract: A thin film transistor array panel includes: a gate line and a data line on a substrate, insulatively crossing each other; a thin film transistor connected to the gate line and to the data line; a first color filter overlapping the thin film transistor; a second color filter overlapping the first color filter; a passivation layer covering the first color filter and the second color filter; a first pixel electrode on the passivation layer, the first pixel electrode overlapping the first color filter and the second color filter; and a second pixel electrode on the first pixel electrode, the second pixel electrode overlapping the first color filter and the second color filter and connected with a drain electrode of the thin film transistor.

Abstract: A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape.

Abstract: A display device may include the following elements: a first transistor including a gate electrode, a source electrode, and drain electrode; a gate line electrically connected to the gate electrode; a data line electrically connected to the source electrode; a common electrode; a passivation layer overlapping the common electrode; a first pixel electrode electrically connected to the drain electrode and positioned between the common electrode and the passivation layer; a first liquid crystal layer, which is positioned between the common electrode and the first pixel electrode; a second transistor electrically connected to the gate line; a second pixel electrode electrically connected to the second transistor; a second liquid crystal layer positioned between the common electrode and the second pixel electrode; and a supporting member positioned between the common electrode and the passivation layer and positioned between the first liquid crystal layer and the second liquid crystal layer.

Abstract: A thin film transistor array panel includes: a gate line and a data line on a substrate, insulatively crossing each other; a thin film transistor connected to the gate line and to the data line; a first color filter overlapping the thin film transistor; a second color filter overlapping the first color filter; a passivation layer covering the first color filter and the second color filter; a first pixel electrode on the passivation layer, the first pixel electrode overlapping the first color filter and the second color filter; and a second pixel electrode on the first pixel electrode, the second pixel electrode overlapping the first color filter and the second color filter and connected with a drain electrode of the thin film transistor.

Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention has a first gate insulting layer and a second gate insulating layer disposed on the first gate insulating layer. The gate electrode of the present invention is formed in an opening of the first gate insulating layer with the same height as that of the gate electrode. Therefore, the second gate insulating layer formed on the gate electrode and the first gate insulating layer renders a flat surface without a step. This may reduce or eliminate any defects caused by the step around gate electrodes, such as source electrode and/or drain electrode cracks.