Patents by Inventor PIN HU

PIN HU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8993432
    Abstract: A method and apparatus for testing the electrical characteristics, such as electrical continuity, is provided. A substrate, such as a wafer or an interposer, having a plurality of through vias (TVs) is provided. Along one side of the substrate, a conductive layer electrically couples two or more of the TVs. Thereafter, the electrical characteristics of the TVs may be test by, for example, a probe card in electrical contact with the TVs on the other side of the substrate. During testing, current passes through a first TV from a first side of the substrate, to the conductive layer on a second side of the substrate, to a second TV, and back to the first side of the substrate through the second TV.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: March 31, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Yun Hou, Wei-Cheng Wu, Hsien-Pin Hu, Jung Cheng Ko, Shin-Puu Jeng, Chen-Hua Yu, Kim Hong Chen
  • Publication number: 20150031184
    Abstract: A method of manufacturing a package may include: providing a first device having a first redistribution layer (RDL) and an insulator layer disposed over the first RDL; and forming a first micro-bump line over the insulator layer of the first device. The first micro-bump line may extend laterally over a surface of the insulator layer facing away from the first RDL, and a first inductor of the package comprises the first RDL and the first micro-bump line.
    Type: Application
    Filed: October 14, 2014
    Publication date: January 29, 2015
    Inventors: Hsiao-Tsung Yen, Min-Chie Jeng, Hsien-Pin Hu, Tzuan-Horng Liu, Chin-Wei Kuo, Chung-Yu Lu, Yu-Ling Lin
  • Publication number: 20140374875
    Abstract: In accordance with an embodiment, a semiconductor device comprises a semiconductor die, an interposer, and conductive bumps bonding the semiconductor die to the interposer. The semiconductor die comprises a first metallization layer, and the first metallization layer comprises a first conductive pattern. The interposer comprises a second metallization layer, and the second metallization layer comprises a second conductive pattern. Some of the conductive bumps electrically couple the first conductive pattern to the second conductive pattern to form a coil. Other embodiments contemplate other configurations of coils, inductors, and/or transformers, and contemplate methods of manufacture.
    Type: Application
    Filed: June 24, 2013
    Publication date: December 25, 2014
    Inventors: Hsiao-Tsung Yen, Chin-Wei Kuo, Hsien-Pin Hu, Sally Liu, Ming-Fa Chen, Jhe-Ching Lu
  • Patent number: 8896089
    Abstract: Interposers for semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, an interposer includes a substrate, a contact pad disposed on the substrate, and a first through-via in the substrate coupled to the contact pad. A first fuse is coupled to the first through-via. A second through-via in the substrate is coupled to the contact pad, and a second fuse is coupled to the second through-via.
    Type: Grant
    Filed: November 9, 2011
    Date of Patent: November 25, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Wei Chiu, Tzu-Yu Wang, Wei-Cheng Wu, Chun-Yi Liu, Hsien-Pin Hu, Shang-Yun Hou
  • Patent number: 8896094
    Abstract: Methods and apparatus for forming a semiconductor device package with inductors and transformers using a micro-bump layer are disclosed. The micro-bump layer may comprise micro-bumps and micro-bump lines, formed between a top die and a bottom die, or between a die and an interposer. An inductor can be formed by a redistribution layer within a bottom device and a micro-bump line above the bottom device connected to the RDL. The inductor may be a symmetric inductor, a spiral inductor, a helical inductor which is a vertical structure, or a meander inductor. A pair of inductors with micro-bump lines can form a transformer.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: November 25, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsiao-Tsung Yen, Yu-Ling Lin, Chung-Yu Lu, Chin-Wei Kuo, Tzuan-Horng Liu, Hsien-Pin Hu, Min-Chie Jeng
  • Publication number: 20140327464
    Abstract: A test structure including an array of microbumps electrically connecting a chip and a substrate, wherein a width of each microbump of the array of microbumps is equal to or less than about 50 microns (?m). The test structure further includes an interconnect structure connected to the array of microbumps. The test structure further includes an array of test pads around a periphery of the array of microbumps, wherein a test pad of the array of test pads is connected to a corresponding microbump of the array of microbumps through the interconnect structure. A width of the test pad is greater than a width of the corresponding microbump, and the test pad is adapted to be covered after circuit probing by a passivation material to prevent particle and corrosion issues.
    Type: Application
    Filed: July 15, 2014
    Publication date: November 6, 2014
    Inventors: Wei-Cheng WU, Hsien-Pin HU, Shang-Yun HOU, Shin-Puu JENG, Chen-Hua YU, Chao-Hsiang YANG
  • Patent number: 8878182
    Abstract: An interposer includes a first surface on a first side of the interposer and a second surface on a second side of the interposer, wherein the first and the second sides are opposite sides. A first probe pad is disposed at the first surface. An electrical connector is disposed at the first surface, wherein the electrical connector is configured to be used for bonding. A through-via is disposed in the interposer. Front-side connections are disposed on the first side of the interposer, wherein the front-side connections electrically couple the through-via to the probe pad.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: November 4, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Yu Wang, Chen-Hua Yu, Shin-Puu Jeng, Shang-Yun Hou, Hsien-Pin Hu, Wei-Cheng Wu, Li-Han Hsu, Meng-Han Lee
  • Patent number: 8872345
    Abstract: A method of forming an interposer includes providing a semiconductor substrate, the semiconductor substrate having a front surface and a back surface opposite the front surface; forming one or more through-silicon vias (TSVs) extending from the front surface into the semiconductor substrate; forming an inter-layer dielectric (ILD) layer overlying the front surface of the semiconductor substrate and the one or more TSVs; and forming an interconnect structure in the ILD layer, the interconnect structure electrically connecting the one or more TSVs to the semiconductor substrate.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: October 28, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Chun Hsieh, Wei-Cheng Wu, Hsiao-Tsung Yen, Hsien-Pin Hu, Shang-Yun Hou, Shin-Puu Jeng
  • Publication number: 20140225258
    Abstract: Embodiments of the present disclosure include a semiconductor device and methods of forming a semiconductor device. An embodiment is a semiconductor device comprising an interconnecting structure consisting of a plurality of thin film layers and a plurality of metal layers disposed therein, each of the plurality of metal layers having substantially a same top surface area, and a die comprising an active surface and a backside surface opposite the active surface, the active surface being directly coupled to a first side of the interconnecting structure. The semiconductor device further comprises a first connector directly coupled to a second side of the interconnecting structure, the second side being opposite the first side.
    Type: Application
    Filed: February 8, 2013
    Publication date: August 14, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tzu-Wei Chiu, Cheng-Hsien Hsieh, Hsien-Pin Hu, Kuo-Ching Hsu, Shang-Yun Hou, Shin-Puu Jeng
  • Publication number: 20140216443
    Abstract: A liquid spray device includes a container defining a reception space for receiving a liquid medicine therein, having a discharge outlet for discharging the liquid medicine to an exterior of the container; a spray module disposed in the discharge outlet, and connected electrically to a driving source such that the liquid medicine forcefully collides against the discharge outlet due to ultrasonic oscillation of the spray module and spraying out a plurality of mist droplets; and a particle sorter disposed downstream to a discharging direction of the liquid medicine, spaced from the spray module at a predetermined distance to permit once against collision of the liquid medicine during the discharging operation such that the mist droplets are sprayed out through the particle sorter in terms of a plurality of micro-mist droplets along the discharging direction.
    Type: Application
    Filed: February 5, 2013
    Publication date: August 7, 2014
    Inventor: Sheng-Pin HU
  • Patent number: 8797057
    Abstract: Test structures for performing electrical tests of devices under one or more microbumps are provided. Each test structure includes at least one microbump pad and a test pad. The microbump pad is a part of a metal pad connected to an interconnect for a device. A width of the microbump pad is equal to or less than about 50 ?m. The test pad is connected to the at least one microbump pad. The test pad has a size large enough to allow circuit probing of the device. The test pad is another part of the metal pad. A width of the test pad is greater than the at least one microbump pad.
    Type: Grant
    Filed: February 11, 2011
    Date of Patent: August 5, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Cheng Wu, Hsien-Pin Hu, Shang-Yun Hou, Shin-Puu Jeng, Chen-Hua Yu, Chao-Hsiang Yang
  • Publication number: 20140203397
    Abstract: Methods and apparatus for forming a semiconductor device package with inductors and transformers using a micro-bump layer are disclosed. The micro-bump layer may comprise micro-bumps and micro-bump lines, formed between a top die and a bottom die, or between a die and an interposer. An inductor can be formed by a redistribution layer within a bottom device and a micro-bump line above the bottom device connected to the RDL. The inductor may be a symmetric inductor, a spiral inductor, a helical inductor which is a vertical structure, or a meander inductor. A pair of inductors with micro-bump lines can form a transformer.
    Type: Application
    Filed: January 23, 2013
    Publication date: July 24, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsiao-Tsung Yen, Yu-Ling Lin, Chung-Yu Lu, Chin-Wei Kuo, Tzuan-Horng Liu, Hsien-Pin Hu, Min-Chie Jeng
  • Patent number: 8759150
    Abstract: A method includes providing an interposer wafer including a substrate, and a plurality of through-substrate vias (TSVs) extending from a front surface of the substrate into the substrate. A plurality of dies is bonded onto a front surface of the interposer wafer. After the step of bonding the plurality of dies, a grinding is performed on a backside of the substrate to expose the plurality of TSVs. A plurality of metal bumps is formed on a backside of the interposer wafer and electrically coupled to the plurality of TSVs.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: June 24, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsien-Pin Hu, Chen-Hua Yu, Shin-Puu Jeng, Shang-Yun Hou, Jing-Cheng Lin, Wen-Chih Chiou, Hung-Jung Tu
  • Publication number: 20140167269
    Abstract: Methods and apparatus for forming a semiconductor device package on an interposer using a micro-bump layer are disclosed. The micro-bump layer may comprise micro-bumps and micro-bump lines, where a micro-bump is used as a vertical connection between a die and the interposer, and a micro-bump line is used as a horizontal connection for signal transmission between different dies above the interposer. The micro-bump lines may be formed at the same time as the formation of the micro-bumps with little or no additional cost.
    Type: Application
    Filed: December 13, 2012
    Publication date: June 19, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chung-Yu Lu, Hsien-Pin Hu, Hsiao-Tsung Yen, Tzuan-Horng Liu, Shih-Wen Huang, Shang-Yun Hou, Shin-Puu Jeng
  • Publication number: 20140106536
    Abstract: A device includes a substrate having a front surface and a back surface opposite the front surface. A capacitor is formed in the substrate and includes a first capacitor plate; a first insulation layer encircling the first capacitor plate; and a second capacitor plate encircling the first insulation layer. Each of the first capacitor plate, the first insulation layer, and the second capacitor plate extends from the front surface to the back surface of the substrate.
    Type: Application
    Filed: December 18, 2013
    Publication date: April 17, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: An-Jhih Su, Chi-Chun Hsieh, Tzu-Yu Wang, Wei-Cheng Wu, Hsien-Pin Hu, Shang-Yun Hou, Wen-Chih Chiou, Shin-Puu Jeng
  • Patent number: 8693163
    Abstract: A device includes a substrate having a front surface and a back surface opposite the front surface. A capacitor is formed in the substrate and includes a first capacitor plate; a first insulation layer encircling the first capacitor plate; and a second capacitor plate encircling the first insulation layer. Each of the first capacitor plate, the first insulation layer, and the second capacitor plate extends from the front surface to the back surface of the substrate.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: April 8, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: An-Jhih Su, Chi-Chun Hsieh, Tzu-Yu Wang, Wei-Cheng Wu, Hsien-Pin Hu, Shang-Yun Hou, Wen-Chih Chiou, Shin-Puu Jeng
  • Patent number: 8502338
    Abstract: A device includes a semiconductor substrate of a first conductivity type, wherein the semiconductor substrate comprises a first surface and a second surface opposite the first surface. A through-substrate via (TSV) extends from the first surface to the second surface of the semiconductor substrate. A well region of a second conductivity type opposite the first conductivity type encircles the TSV, and extends from the first surface to the second surface of the semiconductor substrate.
    Type: Grant
    Filed: September 9, 2010
    Date of Patent: August 6, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsiao-Tsung Yen, Hsien-Pin Hu, Chin-Wei Kuo, Sally Liu
  • Patent number: 8471358
    Abstract: In accordance with an embodiment, a semiconductor device comprises a semiconductor die, an interposer, and conductive bumps bonding the semiconductor die to the interposer. The semiconductor die comprises a first metallization layer, and the first metallization layer comprises a first conductive pattern. The interposer comprises a second metallization layer, and the second metallization layer comprises a second conductive pattern. Some of the conductive bumps electrically couple the first conductive pattern to the second conductive pattern to form a coil. Other embodiments contemplate other configurations of coils, inductors, and/or transformers, and contemplate methods of manufacture.
    Type: Grant
    Filed: June 1, 2010
    Date of Patent: June 25, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsiao-Tsung Yen, Chin-Wei Kuo, Hsien-Pin Hu, Sally Liu, Ming-Fa Chen, Jhe-Ching Lu
  • Publication number: 20130120018
    Abstract: A method and apparatus for testing the electrical characteristics, such as electrical continuity, is provided. A substrate, such as a wafer or an interposer, having a plurality of through vias (TVs) is provided. Along one side of the substrate, a conductive layer electrically couples two or more of the TVs. Thereafter, the electrical characteristics of the TVs may be test by, for example, a probe card in electrical contact with the TVs on the other side of the substrate. During testing, current passes through a first TV from a first side of the substrate, to the conductive layer on a second side of the substrate, to a second TV, and back to the first side of the substrate through the second TV.
    Type: Application
    Filed: November 16, 2011
    Publication date: May 16, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Yun Hou, Wei-Cheng Wu, Hsien-Pin Hu, Jung Cheng Ko, Shin-Puu Jeng, Chen-Hua Yu, Kim Hong Chen
  • Publication number: 20130113070
    Abstract: Interposers for semiconductor devices and methods of manufacture thereof are disclosed. In one embodiment, an interposer includes a substrate, a contact pad disposed on the substrate, and a first through-via in the substrate coupled to the contact pad. A first fuse is coupled to the first through-via. A second through-via in the substrate is coupled to the contact pad, and a second fuse is coupled to the second through-via.
    Type: Application
    Filed: November 9, 2011
    Publication date: May 9, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Wei Chiu, Tzu-Yu Wang, Wei-Cheng Wu, Chun-Yi Liu, Hsien-Pin Hu, Shang-Yun Hou