Abstract: An image processing platform having automatically autostereoscopic 3D image generating function includes a receiving module and an image converting module. The receiving module receives a target image and an autostereoscopic 3D image information from an external device. The autostereoscopic 3D image information includes a screen number information, a screen size information, a position relation between an optimized viewing position and a screen reference point and a field of view. The image converting module is connected to the receiving module and executes a texture baking process according to the autostereoscopic 3D image information so as to convert the target image into an autostereoscopic 3D image.

Abstract: An ornament holder includes: a bottom seat, provided with at least one first hole, and an opening, and a part of the opening extended outward with a placement part along a direction perpendicular to the bottom seat; a cover, provided on the opening and configured with a second hole and a fixing element, and the fixing element pressing against the bottom of the placement part, allowing the cover to be fixed to the bottom seat; and a connecting element, passed through the first hole, and capable of connecting the bottom seat with the other bottom seat. Whereby, the fixing element can be hooked under the placement part, allowing the cover to be fixed to the bottom seat instead of requiring additional welding, and the connecting element connects the bottom seat with the other bottom seat, capable of arranging the ornament holders of the present invention in series.

Abstract: A two-stage speed controller includes a main body including a first port and a second port in communication with each other, and a primary channel and a secondary channel for fluid to flow therethrough. The secondary channel allows flowing in a single direction to a pressure accumulation chamber. A sliding-axle seat is arranged in the second port. An end of a sliding axle assembly forms, together with the sliding-axle seat, a valve. The pressure accumulation chamber is connected with a primary throttle channel. The sliding axle assembly is formed, in a transverse direction, with a secondary throttle channel. During ingress and discharging of the fluid, all the channels and movement of the valve together allow for control of the pressure of the fluid according to a magnitude of a spring force of a regulation assembly in order to control a moving speed of a cylinder connected to the main body.

Abstract: A two-stage speed controller includes a main body including a first port and a second port in communication with each other, and a primary channel and a secondary channel for fluid to flow therethrough. The secondary channel allows flowing in a single direction to a pressure accumulation chamber. A sliding-axle seat is arranged in the second port. An end of a sliding axle assembly forms, together with the sliding-axle seat, a valve. The pressure accumulation chamber is connected with a primary throttle channel. The sliding axle assembly is formed, in a transverse direction, with a secondary throttle channel. During ingress and discharging of the fluid, all the channels and movement of the valve together allow for control of the pressure of the fluid according to a magnitude of a spring force of a regulation assembly in order to control a moving speed of a cylinder connected to the main body.

Abstract: A technique facilitates utilization of a running tool system for use with a tubing hanger deployed at a wellhead. The running tool system may comprise a running tool which may be coupled to a hanger. The running tool may include a first sleeve which may be coupled to the hanger for moving the hanger in an axial direction. According to an embodiment, the running tool also may include a second sleeve which may be coupled to an adjustable landing ring disposed about the hanger. The second sleeve may be used to rotate the adjustable landing ring so as to lock the hanger in position.

Abstract: In a method of cleaning a photo mask, the photo mask is placed on a support such that a pattered surface faces down, and an adhesive sheet is applied to edges of a backside surface of the photo mask.

Abstract: Semiconductor processing apparatuses and methods are provided in which an electrostatic discharge (ESD) prevention layer is utilized to prevent or reduce ESD events from occurring between a semiconductor wafer and one or more components of the apparatuses. In some embodiments, a semiconductor processing apparatus includes a wafer handling structure that is configured to support a semiconductor wafer during processing of the semiconductor wafer. The apparatus further includes an ESD prevention layer on the wafer handling structure. The ESD prevention layer includes a first material and a second material, and the second material has an electrical conductivity that is greater than an electrical conductivity of the first material.

Abstract: A semiconductor apparatus and a method for collecting residues of curable material are provided. The semiconductor apparatus includes a chamber containing a wafer cassette, and a collecting module disposed in the chamber for collecting residues of curable material in the chamber. The collecting module includes a flow-directing structure disposed below a ceiling of the chamber, a baffle structure disposed below the flow-directing structure, and a tray disposed on the wafer cassette. The flow-directing structure includes a first hollow region, the baffle structure includes a second hollow region, and the tray is moved together with the wafer cassette to pass through the second hollow region of the baffle structure and is positioned to cover the first hollow region of the flow-directing structure.

Abstract: A DRAM capacitor may include a first capacitor electrode, a capacitor dielectric adjacent to the first capacitor electrode, and a second capacitor electrode adjacent to the capacitor dielectric. The first capacitor electrode may include a lower portion, an upper portion, and a step transition between the lower portion and the upper portion, a width of the upper portion of the first capacitor electrode at the step transition is less than a width of the lower portion of the first capacitor electrode at the step transition. Semiconductor devices, systems, and methods are also disclosed.

Abstract: Methods for plasma stability in a plasma treatment tool are disclosed. A laser is positioned within a plasma treatment chamber within a skin depth of the electromagnetic field generated therein. The laser can be synchronized with the electrical triggering signals that generate the electromagnetic field. This scheme provides a stable and efficient method of plasma ignition.

Abstract: A method for collecting residues of curable material includes: performing a curing process on a semiconductor wafer in a chamber, where the semiconductor wafer is held by a wafer cassette, and residues of curable material is formed in the chamber; and collecting the residues of curable material. A first portion of the residues dripping from a ceiling of the chamber is directed toward a tray using a flow-directing structure, where the flow-directing structure is below the ceiling of the chamber, the flow-directing structure includes a central opening and a slanted surface sloped to direct the first portion of the residues toward the central opening. The first portion of the residues is collected on a collecting surface of the tray which covers the central opening of the flow-directing structure.

Abstract: Various embodiments of the present application are directed towards an integrated memory chip comprising a memory array with a strap-cell architecture that reduces the number of distinct strap-cell types and that reduces strap-line density. In some embodiments, the memory array is limited to three distinct types of strap cells: a source line/erase gate (SLEG) strap cell; a control gate/word line (CGWL) strap cell; and a word-line strap cell. The small number of distinct strap-cell types simplifies design of the memory array and further simplifies design of a corresponding interconnect structure. Further, in some embodiments, the three distinct strap-cell types electrically couple word lines, erase gates, and control gates to corresponding strap lines in different metallization layers of an interconnect structure. By spreading the strap lines amongst different metallization layers, strap-line density is reduced.

Abstract: Various embodiments of the present application are directed towards an integrated memory chip with an enhanced device-region layout for reduced leakage current and an enlarged word-line etch process window (e.g., enhanced word-line etch resiliency). In some embodiments, the integrated memory chip comprises a substrate, a control gate, a word line, and an isolation structure. The substrate comprises a first source/drain region. The control gate and the word line are on the substrate. The word line is between and borders the first source/drain region and the control gate and is elongated along a length of the word line. The isolation structure extends into the substrate and has a first isolation-structure sidewall. The first isolation-structure sidewall extends laterally along the length of the word line and underlies the word line.

Abstract: A memory control circuit unit, a memory storage device, and a parameter updating method are disclosed. The memory control circuit unit includes a host interface, a memory interface, and a memory management circuit. The memory interface is configured to be coupled to a rewritable non-volatile memory module. The memory management circuit is configured to detect system status and activate an interface parameter updating operation in response to the system status meeting a target condition. The memory management circuit is further configured to update at least one interface parameter used by at least one of the memory interface and the rewritable non-volatile memory module during the interface parameter updating operation.

Abstract: An LDMOS transistor device includes a stepped isolation structure over a substrate, a gate electrode disposed over a portion of the stepped isolation structure, a source region disposed in the substrate, and a drain region disposed in the substrate. The stepped isolation structure includes a first portion having a first thickness, and a second portion having a second thickness greater than the first thickness. The second portion includes dopants. The drain region is adjacent to the stepped isolation structure.

Abstract: A reflective mask includes a substrate, a reflective multilayer disposed on the substrate, a capping layer disposed on the reflective multilayer, and an absorber layer disposed on the capping layer. The absorber layer includes a base material made of one or more of a Cr based material, an Ir based material, a Pt based material, or Co based material, and further contains one or more additional elements selected from the group consisting of Si, B, Ge, Al, As, Sb, Te, Se and Bi.

Abstract: Various embodiments of the present application are directed towards an integrated memory chip comprising a memory array with a strap-cell architecture that reduces the number of distinct strap-cell types and that reduces strap-line density. In some embodiments, the memory array is limited to three distinct types of strap cells: a source line/erase gate (SLEG) strap cell; a control gate/word line (CGWL) strap cell; and a word-line strap cell. The small number of distinct strap-cell types simplifies design of the memory array and further simplifies design of a corresponding interconnect structure. Further, in some embodiments, the three distinct strap-cell types electrically couple word lines, erase gates, and control gates to corresponding strap lines in different metallization layers of an interconnect structure. By spreading the strap lines amongst different metallization layers, strap-line density is reduced.

Abstract: A fermentation complex with increasing generation of brain dopamine and improving sleeping effect, the fermentation complex containing a vegetable ingredient and use a special polysaccharide fermentation preparation method to get a fermentation complex, within the vegetable ingredient include Gastrodia elata, Black rice, and Wheat seedlings. The fermentation complex has effect of delaying brain aging, protecting brain nerves, calming nerves, and helping to fall asleep.