Patents by Inventor Ping-Chuan Wang

Ping-Chuan Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050186689
    Abstract: A device and method for evaluating reliability of a semiconductor chip structure built by a manufacturing process includes a test structure built in accordance with a manufacturing process. The test structure is thermal cycled and the yield of the test structure is measured. The reliability of the semiconductor chip structure built by the manufacturing process is evaluated based on the yield performance before the thermal cycling.
    Type: Application
    Filed: February 20, 2004
    Publication date: August 25, 2005
    Inventors: Ronald Filippi, Jason Gill, Vincent McGahay, Paul McLaughlin, Conal Murray, Hazara Rathore, Thomas Shaw, Ping-Chuan Wang
  • Publication number: 20050156695
    Abstract: A microelectromechanical switch including: at least one pair of actuator electrodes; at least one input electrode and at least one output electrode for input and output, respectively, of a radio frequency signal; and a beam movable by an attraction between the at least one pair of actuator electrodes, the movable beam having at least a portion electrically connected to the at least one input electrode and to the at least one output electrode when moved by the attraction between the at least one pair of actuator electrodes to make an electrical connection between the at least one input and output electrodes; wherein the at least one pair of actuator electrodes are electrically isolated from each of the at least one input and output electrodes. The microelectromechanical switch can be configured in single or multiple-poles and/or single or multiple throws.
    Type: Application
    Filed: February 8, 2005
    Publication date: July 21, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Panayotis Andricacos, L. Buchwalter, Hariklia Deligianni, Robert Groves, Christopher Jahnes, Jennifer Lund, Michael Meixner, David Seeger, Timothy Sullivan, Ping-Chuan Wang
  • Publication number: 20050116739
    Abstract: A recovery circuit and a method for employing the same are provided. The recovery circuit has a current driver and, preferably two pass-gates, a first pass-gate connected in series to the current driver and a second pass-gate connected to a ground. The recovery circuit also has a recovery assembly or element and one or more contacts operatively connecting the recovery circuit to a wearout sensitive circuit or circuit element.
    Type: Application
    Filed: December 2, 2003
    Publication date: June 2, 2005
    Inventors: Giuseppe Rosa, Joseph Lukaitis, Anastasios Katsetos, Stewart Rauch, Ping-Chuan Wang, Stephen Boffoli, Fernando Guarin, B. B. Lawhorn
  • Patent number: 6876282
    Abstract: A microelectromechanical switch including: at least one pair of actuator electrodes; at least one input electrode and at least one output electrode for input and output, respectively, of a radio frequency signal; and a beam movable by an attraction between the at least one pair of actuator electrodes, the movable beam having at least a portion electrically connected to the at least one input electrode and to the at least one output electrode when moved by the attraction between the at least one pair of actuator electrodes to make an electrical connection between the at least one input and output electrodes; wherein the at least one pair of actuator electrodes are electrically isolated from each of the at least one input and output electrodes. The microelectromechanical switch can be configured in single or multiple-poles and/or single or multiple throws.
    Type: Grant
    Filed: May 17, 2002
    Date of Patent: April 5, 2005
    Assignee: International Business Machines Corporation
    Inventors: Panayotis Constantinou Andricacos, L. Paivikki Buchwalter, Hariklia Deligianni, Robert A. Groves, Christopher Jahnes, Jennifer L. Lund, Michael Meixner, David Earle Seeger, Timothy D. Sullivan, Ping-Chuan Wang
  • Patent number: 6836106
    Abstract: A test circuit for testing semiconductors includes a plurality of at least first conductors and second conductors. The first and second conductors are operatively connected together by a plurality of conductive vias to form an open chain of alternating first and second conductors. A plurality of conductive taps are included, each of the taps being connected at a first end to a corresponding first conductor. The test circuit further includes a plurality of switching circuits, each of the switching circuits being operatively connected to a second end of a corresponding one of the conductive taps. Each of the switching circuits is configurable for selectively connecting the corresponding conductive tap to one of at least a first bus and a second bus in response to at least one control signal presented to the switching circuit, the first and second buses being connected to first and second bond pads, respectively.
    Type: Grant
    Filed: September 23, 2003
    Date of Patent: December 28, 2004
    Assignee: International Business Machines Corporation
    Inventors: Kevin H. Brelsford, Ronald G. Filippi, Jr., Kenneth P. Rodbell, Ping-Chuan Wang
  • Publication number: 20040257086
    Abstract: A system and method are provided for testing performance characteristics of a MEMs device. The system includes an activation driver configured to receive and drive a waveform to an activation side of the micro electromechanical device and configured to provide readback of an activation voltage and activation current drawn by activation of the micro electromechanical device. The system further includes a switch driver configured to provide a load to a switch side of the micro electromechanical device and configured to provide readback of a load voltage and a load current drawn by the micro electromechanical device. It also contains a contact-closure counter. A master control card (MCC) is included to control the activation and switch drivers while a digital volt meter (DVM) is in operable communication with the micro electromechanical device to read back analog readback. An analog multiplexer is configured to provide the analog readback to a corresponding activation driver or switch driver.
    Type: Application
    Filed: June 19, 2003
    Publication date: December 23, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles J. Montrose, Ping-Chuan Wang
  • Patent number: 6803662
    Abstract: A reinforced semiconductor interconnect structure, having the following components: (1) A first metal interconnect disposed in a first material, the first metal interconnect having a line portion and at least one via portion, an anode section and a cathode section, the via portion of the first metal interconnect located in the anode section, the line portion of the first metal interconnect having a top, bottom and terminus side, wherein at least a part of the bottom side of the line portion of the first metal interconnect in contact with the first dielectric; and (2) a first reinforcement disposed in the first material, the first reinforcement in contact with at least the bottom side of the first metal interconnect, the first reinforcement comprising a second material, the second material being electrically nonconductive; and wherein the second material has a greater mechanical rigidity than the first material.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: October 12, 2004
    Assignee: International Business Machines Corporation
    Inventors: Ping-Chuan Wang, Kevin H. Brelsford, Ronald Filippi
  • Publication number: 20040026693
    Abstract: A test structure is disclosed for locating electromigration voids in a semiconductor interconnect structure having an interconnect via interconnecting a lower metallization line with an upper metallization line. In an exemplary embodiment, the test structure includes a via portion the top of the interconnect via at the upper metallization line. In addition, a line portion extends from the via portion, wherein the line portion connects to an external probing surface, in addition to a probing surface on the lower metallization line, thereby allowing the identification of any electromigration voids present in the interconnect via.
    Type: Application
    Filed: August 7, 2002
    Publication date: February 12, 2004
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Paul S. McLaughlin, Timothy D. Sullivan, Ping-Chuan Wang
  • Publication number: 20030214373
    Abstract: A microelectromechanical switch including: at least one pair of actuator electrodes; at least one input electrode and at least one output electrode for input and output, respectively, of a radio frequency signal; and a beam movable by an attraction between the at least one pair of actuator electrodes, the movable beam having at least a portion electrically connected to the at least one input electrode and to the at least one output electrode when moved by the attraction between the at least one pair of actuator electrodes to make an electrical connection between the at least one input and output electrodes; wherein the at least one pair of actuator electrodes are electrically isolated from each of the at least one input and output electrodes. The microelectromechanical switch can be configured in single or multiple-poles and/or single or multiple throws.
    Type: Application
    Filed: May 17, 2002
    Publication date: November 20, 2003
    Inventors: Panayotis Constantinou Andricacos, L. Paivikki Buchwalter, Hariklia Deligianni, Robert A. Groves, Christopher Jahnes, Jennifer L. Lund, Michael Meixner, David Earle Seeger, Timothy D. Sullivan, Ping-Chuan Wang
  • Publication number: 20030116855
    Abstract: A reinforced semiconductor interconnect structure, having the following components:
    Type: Application
    Filed: December 21, 2001
    Publication date: June 26, 2003
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ping-Chuan Wang, Kevin H. Brelsford, Ronald Filippi
  • Publication number: 20020163062
    Abstract: A structure/method for reducing the stress between a dielectric, passivation layer and a metallic structure comprising coating the metallic structure with a low stress modulus buffer material, and forming the dielectric passivation layer covering the low stress modulus buffer material. The low stress modulus buffer material is composed of a layer of a polymeric material selected from at least one of the group consisting of a hydrogen/alkane SQ (SilsesQuioxane) resin, polyimide, and a polymer resin. The dielectric, passivation layer is composed of at least one layer of a material selected from at least one of the group consisting of silicon oxide and silicon nitride. A protective layer is formed over the dielectric, passivation layer. The low stress modulus buffer material has a thermal coefficient of expansion between that of the metallic structure and that of the dielectric passivation layer.
    Type: Application
    Filed: February 26, 2001
    Publication date: November 7, 2002
    Applicant: International Business Machines Corporation
    Inventors: Ping-Chuan Wang, Robert Daniel Edwards, John C. Malinowski, Vidhya Ramachandran, Steffen Kaldor
  • Patent number: 6383920
    Abstract: The present invention relates generally to a method of enclosing a via in a dual damascene process. In one embodiment of the disclosed method, the via is etched first and a first barrier metal or liner is deposited in the via, the trench is then etched and a second barrier metal or liner is deposited in the trench, and finally the via and trench are filled or metallized in a dual damascene process, thereby forming a via or interconnect and a line. Alternatively, the trench may be etched first and a first barrier metal or liner deposited in the trench, then the via is etched and a second barrier metal or liner is deposited in the via, and finally the trench and via are filled or metallized in a dual damascene process. The barrier metal or liner encloses the via, thereby reducing void formation due to electromigration.
    Type: Grant
    Filed: January 10, 2001
    Date of Patent: May 7, 2002
    Assignee: International Business Machines Corporation
    Inventors: Ping-Chuan Wang, Ronald G. Filippi, Robert D. Edwards, Edward W. Kiewra, Roy C. Iggulden