Patents by Inventor Ping Hsieh
Ping Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240150652Abstract: The disclosure relates to a quantum dot structure. The quantum dot structure includes a quantum dot and a cloud-like shell covering a portion of the quantum dot and having an irregular outer surface. The quantum dot includes: a core; a first shell discontinuously around a core surface of the core; and a second shell between the core and the first shell and encapsulating the core surface of the core, wherein the second shell has an irregular outer surface.Type: ApplicationFiled: October 31, 2023Publication date: May 9, 2024Inventors: Pei Cong YAN, Chia-Chun HSIEH, Huei Ping WANG, Hung-Chun TONG, Yu-Chun LEE
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Publication number: 20240154517Abstract: A soft-switching power converter includes a main switch, an energy-releasing switch, and an inductive coupled unit. The main switch is a controllable switch. The energy-releasing switch is coupled to the main switch. The inductive coupled unit is coupled to the main switch and the energy-releasing switch. The inductive coupled unit includes a first inductance, a second inductance coupled to the first inductance, and an auxiliary switch unit. The auxiliary switch unit is coupled to the second inductance to form a closed loop. The main switch and the energy-releasing switch are alternately turned on and turned off. The auxiliary switch unit is controlled to start turning on before the main switch is turned on so as to provide at least one current path.Type: ApplicationFiled: January 12, 2024Publication date: May 9, 2024Inventors: Hung-Chieh LIN, Yi-Ping HSIEH, Jin-Zhong HUANG, Hung-Yu HUANG, Chih-Hsien LI, Ciao-Yin PAN
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Patent number: 11973040Abstract: A method is provided for forming an integrated circuit (IC) chip package structure. The method includes providing a substrate for an interposer, and forming a conductive interconnect structure in and on the substrate for connecting a group of selected IC dies. The method includes forming warpage-reducing trenches in non-routing regions of the interposer, wherein the warpage-reducing trenches are sized and positioned based on a warpage characteristic to reduce the warpage of the chip package structure. The method also includes depositing a warpage-relief material in the warpage-reducing trenches according to the warpage characteristic to reduce the warpage of the chip package structure, and bonding the group of selected IC dies to the interposer to form a chip package structure.Type: GrantFiled: December 9, 2021Date of Patent: April 30, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Yang Hsieh, Chien-Chang Lee, Chia-Ping Lai, Wen-Chung Lu, Cheng-Kang Huang, Mei-Shih Kuo, Alice Huang
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Patent number: 11967898Abstract: A soft-switching power converter includes a main switch, an energy-releasing switch, and an inductive coupled unit. The main switch is a controllable switch. The energy-releasing switch is coupled to the main switch. The inductive coupled unit is coupled to the main switch and the energy-releasing switch. The inductive coupled unit includes a first inductance, a second inductance coupled to the first inductance, and an auxiliary switch unit. The auxiliary switch unit is coupled to the second inductance to form a closed loop. The main switch and the energy-releasing switch are alternately turned on and turned off. The auxiliary switch unit is controlled to start turning on before the main switch is turned on so as to provide at least one current path.Type: GrantFiled: January 6, 2022Date of Patent: April 23, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Hung-Chieh Lin, Yi-Ping Hsieh, Jin-Zhong Huang, Hung-Yu Huang, Chih-Hsien Li, Ciao-Yin Pan
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Publication number: 20240128635Abstract: Sensor packages and manufacturing methods thereof are disclosed. One of the sensor packages includes a semiconductor chip and a redistribution layer structure. The semiconductor chip has a sensing surface. The redistribution layer structure is arranged to form an antenna transmitter structure aside the semiconductor chip and an antenna receiver structure over the sensing surface of the semiconductor chip.Type: ApplicationFiled: December 24, 2023Publication date: April 18, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yung-Ping Chiang, Chao-Wen Shih, Shou-Zen Chang, Albert Wan, Yu-Sheng Hsieh
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Publication number: 20240127788Abstract: In various examples, one or more text-to-speech machine learning models may be customized or adapted to accommodate new or additional speakers or speaker voices without requiring a full re-training of the models. For example, a base model may be trained on a set of one or more speakers and, after training or deployment, the model may be adapted to support one or more other speakers. To do this, one or more additional layers (e.g., adapter layers) may be added to the model, and the model may be re-trained or updated—e.g., by freezing parameters of the base model while updating parameters of the adapter layers—to generate an adapted model that can support the one or more original speakers of the base model in addition to the one or more additional speakers corresponding to the adapter layers.Type: ApplicationFiled: October 13, 2022Publication date: April 18, 2024Inventors: Cheng-Ping HSIEH, Subhankar GHOSH, Boris GINSBURG
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Patent number: 11951233Abstract: Provided are methods of producing an acellular organ. The method includes the steps of, subjecting an organ derived from an animal to a static supercritical fluid (SCF) treatment followed by a dynamic SCF treatment. Optionally, the method of the present disclosure further includes a hypertonic and a hypotonic treatments prior to the static SCF treatment, and/or a neutralizing treatment after the dynamic SCF treatment. Also disclosed herein are acellular organs produced by the present method.Type: GrantFiled: September 11, 2019Date of Patent: April 9, 2024Assignee: ACRO BIOMEDICAL COMPANY. LTD.Inventors: Dar-Jen Hsieh, Chao-Yi Wei, Chao-Chin Chao, Jer-Cheng Kuo, Yi-Ping Lai, Srinivasan Periasamy
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Patent number: 11957064Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.Type: GrantFiled: October 18, 2022Date of Patent: April 9, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
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Patent number: 11936238Abstract: An uninterruptible power apparatus is coupled between a power grid and a load. The uninterruptible power apparatus includes a bypass path, a power conversion module, and a control module. The bypass path is coupled to the power grid through a grid terminal, and coupled to the load through a load terminal. The control module turns off a first thyristor and a second thyristor by injecting a second voltage into the load terminal during a forced commutation period. The control module calculates a magnetic flux offset amount based on an error amount between the second voltage and a voltage command, and provides a compensation command in response to the magnetic flux offset amount. The control module controls the DC/AC conversion circuit to provide a third voltage to the load terminal based on the compensation command and the voltage command.Type: GrantFiled: June 15, 2022Date of Patent: March 19, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Hsin-Chih Chen, Hung-Chieh Lin, Chao-Lung Kuo, Yi-Ping Hsieh, Chien-Shien Lee
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Patent number: 11929319Abstract: Integrated fan-out packages and methods of forming the same are disclosed. An integrated fan-out package includes two dies, an encapsulant, a first metal line and a plurality of dummy vias. The encapsulant is disposed between the two dies. The first metal line is disposed over the two dies and the encapsulant, and electrically connected to the two dies. The plurality of dummy vias is disposed over the encapsulant and aside the first metal line.Type: GrantFiled: July 22, 2021Date of Patent: March 12, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ching-Yu Huang, Han-Ping Pu, Ming-Kai Liu, Ting-Chu Ko, Yung-Ping Chiang, Chang-Wen Huang, Yu-Sheng Hsieh
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Patent number: 11926017Abstract: A cleaning process monitoring system, comprising: a cleaning container comprising an inlet for receiving a cleaning solution and an outlet for draining a waste solution; a particle detector coupled to the outlet and configured to measure a plurality of particle parameters associated with the waste solution so as to provide a real-time monitoring of the cleaning process; a pump coupled to the cleaning container and configured to provide suction force to draw solution through the cleaning system; a controller coupled to the pump and the particle detector and configured to receive the plurality of particle parameters from the particle detector and to provide control to the cleaning system; and a host computer coupled to the controller and configured to provide at least one control parameter to the controller.Type: GrantFiled: May 5, 2021Date of Patent: March 12, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Charlie Wang, Yu-Ping Tseng, Y. J. Chen, Wai-Ming Yeung, Chien-Shen Chen, Danny Kuo, Yu-Hsuan Hsieh, Hsuan Lo
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Publication number: 20240079392Abstract: A semiconductor structure includes a first tier, a redistribution circuit structure, and a second tier. The first tier includes at least one first die. The redistribution circuit structure is disposed on the first tier and electrically coupled to the at least one first die, where the redistribution circuit structure has a multi-layer structure and includes a vertical connection structure continuously extending from a first side of the redistribution circuit structure to a second side of the redistribution circuit structure, and the first side is opposite to the second side along a stacking direction of the first tier and the redistribution circuit structure. The second tier includes a plurality of second dies, and is disposed on and electrically coupled to the redistribution circuit structure.Type: ApplicationFiled: January 10, 2023Publication date: March 7, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chuei-Tang WANG, Tso-Jung Chang, Jeng-Shien Hsieh, Shih-Ping Lin, Chih-Peng Lin, Chieh-Yen Chen, Chen-Hua Yu
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Publication number: 20240081157Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.Type: ApplicationFiled: November 6, 2023Publication date: March 7, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
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Publication number: 20240074328Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.Type: ApplicationFiled: November 6, 2023Publication date: February 29, 2024Applicant: United Microelectronics Corp.Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
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Publication number: 20230389492Abstract: The present invention generally relates to a hydroponic culture medium and a hydroponic planting system, more particularly to a Houttuynia cordata hydroponic culture medium, a Houttuynia cordata hydroponic planting system, Houttuynia cordata extracts, a method, and applications thereof.Type: ApplicationFiled: March 14, 2023Publication date: December 7, 2023Inventors: FANG-RONG CHANG, WEI-HUNG WU, YI-HONG TSAI, CHUNG-HSIEN CHEN, YEN-CHI LOO, HSUEH-ER CHEN, YEN-CHANG CHEN, HUI-PING HSIEH, CHEN HSIEH
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Patent number: 11811328Abstract: An isolated conversion apparatus with magnetic bias balance control includes an isolated converter, a controller, and a magnetic bias balance circuit. The isolated converter includes a transformer, and a primary side of the transformer includes a primary-side winding and at least one switch bridge arm. The controller is coupled to the at least one switch bridge arm, and provides a pulse width modulation (PWM) signal group to control the at least one switch bridge arm. The magnetic bias balance circuit is coupled to two ends of the primary-side winding and the controller, and provides a compensation voltage to the controller according to an average voltage of a winding voltage across the two ends of the primary-side winding. The controller adjusts a duty cycle of the PWM signal group according to the compensation voltage to correct the magnetic bias.Type: GrantFiled: January 6, 2022Date of Patent: November 7, 2023Assignee: DELTA ELECTRONICS, INC.Inventors: Chih-Hsien Li, Yi-Ping Hsieh, Hung-Chieh Lin, Hung-Yu Huang, Ciao-Yin Pan
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Patent number: 11754638Abstract: A ground fault detection apparatus is used to detect a ground fault of a three-phase UPS apparatus. The UPS apparatus includes a first filter circuit, an AC/DC conversion circuit, a DC bus, a DC/AC conversion circuit, and a second filter circuit coupled in sequence. The ground fault detection apparatus includes a detection circuit having a first detection end and a second detection end. The first detection end is coupled to the first filter circuit and the second filter circuit, and the second detection end is coupled to an equipment grounding point. The equipment grounding point is coupled to a neutral point of a three-phase power source, and the three-phase power source is coupled to the first filter circuit. The detection circuit indicates whether the UPS apparatus has a ground fault and a location where the ground fault occurs according to a detection voltage between the first detection end and the second detection end.Type: GrantFiled: November 17, 2021Date of Patent: September 12, 2023Assignee: DELTA ELECTRONICS, INC.Inventors: Hung-Chieh Lin, Jen-Chuan Liao, Yi-Ping Hsieh, Hsin-Chih Chen
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Publication number: 20230273506Abstract: An image capturing device includes a casing, a camera assembly, an adjustment element, a first stopping structure and a second stopping structure. The camera assembly is disposed within the casing. A portion of the camera assembly is exposed outside the casing. The adjustment element is connected with the camera assembly, and rotatable relative to the casing. As the adjustment element is rotated, the camera assembly is correspondingly rotated. The adjustment element includes a contacting structure. The first stopping structure and the second stopping structure are arranged between the casing and the adjustment element and located at different positions. When the camera assembly is switched to a horizontal photographing mode, the contacting structure is positioned at the first stopping structure. When the camera assembly is switched to a vertical photographing mode, the contacting structure is positioned at the second stopping structure.Type: ApplicationFiled: April 15, 2022Publication date: August 31, 2023Inventors: YUNG-TAI PAN, YI-PING HSIEH, CHUN-CHIEH YEH, YU-CHENG MA
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Patent number: 11737565Abstract: A quickly installed headrest adjustment device includes a mount case connected to the chair back and includes a recessed area, an engaging hole, a latch and a first contact face on the rear side of the chair back. The engaging hole is located between the two side slots and defined through the inner bottom of the recessed area. The latch is connected to the inner top side of the engaging hole and includes a bottom face which protrudes beyond the engaging hole and faces the inner side of the recessed area. An adjustment device is mounted to the rail and includes a second contact face facing the first contact face, two ridges, and a block. The block is located between the two ridges. The users can connect the adjustment device to the mount case of the chair back to quickly install the headrest unit to the chair back.Type: GrantFiled: December 31, 2019Date of Patent: August 29, 2023Inventor: Wen-Ping Hsieh
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Patent number: 11733590Abstract: An image capturing device includes a casing, a camera assembly, an adjustment element, a first stopping structure and a second stopping structure. The camera assembly is disposed within the casing. A portion of the camera assembly is exposed outside the casing. The adjustment element is connected with the camera assembly, and rotatable relative to the casing. As the adjustment element is rotated, the camera assembly is correspondingly rotated. The adjustment element includes a contacting structure. The first stopping structure and the second stopping structure are arranged between the casing and the adjustment element and located at different positions. When the camera assembly is switched to a horizontal photographing mode, the contacting structure is positioned at the first stopping structure. When the camera assembly is switched to a vertical photographing mode, the contacting structure is positioned at the second stopping structure.Type: GrantFiled: April 15, 2022Date of Patent: August 22, 2023Assignee: PRIMAX ELECTRONICS LTD.Inventors: Yung-Tai Pan, Yi-Ping Hsieh, Chun-Chieh Yeh, Yu-Cheng Ma