Abstract: The invention provides therapeutic compositions that contain an inhibitor of dihydroorotate dehydrogenase (DHODH) and promote sustained elevation of dihydroorotate (DHO) levels in a patient. The compositions are useful for treating disorders associated with unregulated DHODH activity, such as acute myeloid leukemia. The invention also provides methods of determining therapeutically effective doses of compositions that contain a DHODH inhibitor. The invention further provides methods of synthesis of 2-(2?-halo-1-1?-biphenyl-4-yl)-quinoline carboxylic acids, which are useful as DHODH inhibitors.

Abstract: A part processing planning method includes the following steps. Firstly, a specific tolerance of a nominal size of a part is obtained. Then, a predetermined tolerance of each of processes is obtained. Then, using a process dimension chain establishing technique, at least one predetermined tolerance associated with the specification tolerance from the predetermined tolerances is obtained. Then, at least one predetermined tolerance associated with the specification tolerance is accumulated to obtain a size cumulative tolerance. Then, whether the size cumulative tolerance meets the specification tolerance is determined. Then, at least one predetermined tolerance associated with the specification tolerance is re-allocated when the cumulative tolerance does not meet the specification tolerance, such that the size cumulative tolerance is within the specification tolerance.

Abstract: A circuit board includes a substrate, a first measurement mark and a second measurement mark, the first and second measurement marks are located on a predetermined punch area of the substrate. After punching, the predetermined punch area is removed such that the circuit board has a through hole and a sheet is separated from the circuit board. By the first and second measurement marks on the sheet, a first distance between a first edge of the sheet and the first measurement mark and a second distance between a second edge of the sheet and the second measurement mark can be measured to determine whether the through hole is shifted or has an incorrect size.

Abstract: A field effect transistor includes a substrate and spacers over the substrate. The field effect transistor includes a channel recess cavity between the spacers, wherein a bottom-most surface of the channel recess cavity is parallel to the substrate top surface. The field effect transistor includes a gate stack, wherein the gate stack includes a bottom portion in the channel recess cavity and a top portion outside the channel recess cavity, the gate stack further includes a gate dielectric layer extending from the channel recess cavity along sidewalls of each of the pair of spacers, and the gate dielectric layer directly contacts the substrate below substrate top surface. The field effect transistor includes a strained source/drain (S/D) below the substrate top surface, wherein the strained S/D extends below the gate stack. The field effect transistor further includes a source/drain (S/D) extension substantially conformably surrounding the strained S/D.

Abstract: A chemical liquid purification apparatus includes a tank body, a return tube, a liquid sending pump, a filtration device and a piping. The tank body has a liquid passage port and a circulation port communicated to a storage space inside the tank body. The return tube has one end connected to the circulation port and another end extending to the storage space. The liquid sending pump and the filtration device are located outside the tank body in between the liquid passage port and the circulation port. The piping is connecting the liquid sending pump and the filtration device to the liquid passage port and the circulation port.

Abstract: A formulation of an interconnect of a fuel cell includes chrome powder and chrome-iron alloy powder. A ratio of a sum of chrome in the chrome powder and the chrome-iron alloy powder is in a range between 80% in weight and 95% in weight, and a ratio of a sum of iron in the chrome powder and the chrome-iron alloy powder is in a range between 5% in weight and 20% in weight.

Abstract: A non-volatile memory includes a memory cell array, an amplifying circuit and a first multiplexer. The memory cell array includes m×n memory cells. The memory cell array is connected with a control line, m word lines and n local bit lines, wherein m and n are positive integers. The amplifying circuit includes n sensing elements. The n sensing elements are respectively connected between the n local bit lines and n read bit lines. The first multiplexer is connected with the n local bit lines and the n read bit lines. According to a first select signal, the first multiplexer selects one of the n local bit lines to be connected with a first main bit line and selects one of the n read bit lines to be connected with a first main read bit line.

Abstract: An electrostatic discharge (ESD) protection circuit is coupled between first and second power supply buses. The ESD protection circuit includes a detection circuit; a pull-up circuit, coupled to the detection circuit, comprising at least a first n-type transistor; a pull-down circuit, coupled to the pull-up circuit, comprising at least a second n-type transistor; and a bypass circuit, coupled to the pull-up and pull-down circuits, wherein the detection circuit is configured to detect whether an ESD event is present on either the first or the second bus so as to cause the pull-up and pull-down circuits to selectively enable the bypass circuit for providing a discharging path between the first and second power supply buses.

Abstract: A chemical mechanical polishing (CMP) pad includes a polishing portion formed using a vat-based additive manufacturing process. The polishing portion includes a polymer material with a first elastic modulus. In some embodiments the polishing portion is disposed on the backing portion. The backing portion may have a second elastic modulus. The second elastic modulus may be less than the first elastic modulus.

Abstract: A transistor structure includes a gate, a spacer, a channel region, a first concave, and a first conductive region. The gate is above a silicon surface. The spacer is above the silicon surface and at least covers a sidewall of the gate. The channel region is under the silicon surface. The first conductive region is at least partially formed in the first concave, wherein a conductive region of a neighborhood transistor structure next to the transistor structure is at least partially formed in the first concave.

Abstract: A head up display system for a vehicle is provided, including an eye tracking device and a head up display device. The eye tracking device is configured to pre-locate an initial gaze position of a driver of the vehicle before the vehicle starts moving and to detect a gaze position of the driver in real time. The head up display device includes a projector and a processor. The processor is coupled to the eye tracking device and the projector. The processor compares the gaze position with the initial gaze position, and controls the projector to project a display image to a first projection position or a second projection position according to a comparison result, wherein the first projection position corresponds to the initial gaze position and the second projection position corresponds to the gaze position. A control method of a head up display system is also provided.

Abstract: A system for compensating acceleration of electrical motorbike includes a throttle unit and an electro-mechanic assembly. After the electrical motorbike starts, the throttle unit receives external operation from a rider for generating a series of original throttle signal. An acceleration compensating module calculates a throttle variation rate based on the original throttle signal and variation of a throttle operation magnitude, and calculates a throttle compensating value based on the throttle variation rate when the throttle variation rate is larger than or equal to a correction threshold. A throttle compensating module receives and sums the original throttle signal and the throttle compensating value up for generating a new throttle signal. A torque controller generates a corresponding torque command based on the new throttle signal, and outputs the torque command to the electro-mechanic assembly for operation.

Abstract: An illuminating module includes a light source assembly and a first lens unit. The light source assembly is configured to produce a light beam, wherein the light beam has a first central optical axis. The first lens unit has a first lens optical axis, the light beam passing through the first lens unit is formed to be an illuminating beam, the illuminating beam has a second central optical axis, and the second central optical axis intersects with the first lens optical axis. An optical apparatus is also provided, including the illuminating module, an optical modulation module and a light guiding module. The illuminating beam passes through the optical modulation module to be an image beam having an image. The image beam travels in the light guiding module, leaves the light guiding module and is received by user's eyes.

Abstract: Two algorithms for different functional-split network models are provided, which are the CU-based (central unit based) beam allocation and admission control algorithm (CU-BAACA) and the DU-based (distributed unit based) beam allocation and admission control algorithm (DU-BAACA). Difference between the CU-BAACA and DU-BAACA includes whether the algorithm is implemented at the CU site or at the DU site. Proposed algorithms aim to optimize DUs' quality of experience (QoE) by admission control to determine the amount of data from application layer entering into traffic queue and allocating beam in physical layer at the fronthaul network between CU and DUs. On the other hand, queueing delay and queue stability are taken into consideration to maintain the system steadiness. Simulation results compare performance of two functional split models to find the appropriate scenario for each function split option, which provide technical requirement and applicability of the proposed algorithms for practical system.

Abstract: The present disclosure discloses a capacitive touch panel, including a substrate, wherein a first surface of the substrate includes a first region and a second region, and a second surface of the substrate includes a third region and a fourth region. A first group of drive lines is formed in the first region, a first group of sense lines is formed in the second region, a second group of the drive lines is formed in the third region, and a second group of the sense lines is formed in the fourth region. Each of the drive lines of the first group and the second group extends along a first direction from a periphery of the substrate to a middle of the substrate, with an end of said each drive line on the periphery of the substrate being connected to a drive chip.

Abstract: A UE determines a set of RATs available in accordance with a first subscriber identity associated with a first network and a second subscriber identity associated with a second network. When the set includes a first RAT accessing a base station in the first network, a second RAT accessing a base station in the second network, and a third RAT accessing an access point of a WLAN, the UE selects, in a first performance configuration, the first RAT to establish a first call under the first subscriber identity. The UE further communicates, under the first subscriber identity, with a first IMS server of the first network through the first RAT to establish the first call. The UE maintains, under the second subscriber identity, a connection with a second IMS server of the second network through the first RAT or the third RAT when the first call is active.