Patents by Inventor Ping-Lin Yang

Ping-Lin Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11968817
    Abstract: A semiconductor device includes a fin structure. A source/drain region is formed on the fin structure. A first gate structure is disposed over the fin structure. A source/drain contact is disposed over the source/drain region. The source/drain contact has a protruding segment that protrudes at least partially over the first gate structure. The source/drain contact electrically couples together the source/drain region and the first gate structure.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jui-Lin Chen, Chao-Yuan Chang, Ping-Wei Wang, Fu-Kai Yang, Ting Fang, I-Wen Wu, Shih-Hao Lin
  • Patent number: 10570254
    Abstract: A preparation method of a polyurethane resin including the following steps is provided. A liquid polyamine compound is placed in a continuous reaction system, and the liquid polyamine compound is circulated in the continuous reaction system. A solid bis(cyclic carbonate) and a solid catalyst are placed in the continuous reaction system to mix the solid bis(cyclic carbonate), solid catalyst, and liquid polyamine compound to form a heterogeneous mixture. The heterogeneous mixture is heated in the continuous reaction system in a microwave manner, such that the heterogeneous mixture reacts to form a polyurethane resin.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: February 25, 2020
    Assignees: National Tsing Hua University, Chang Chun Plastics Co., Ltd., Chang Chun Petrochemical Co., Ltd.
    Inventors: David S. H. Wong, Kan-Nan Chan, Ping-Lin Yang, An-Pang Tu, En-Ko Lee
  • Publication number: 20190077912
    Abstract: A preparation method of a polyurethane resin including the following steps is provided. A liquid polyamine compound is placed in a continuous reaction system, and the liquid polyamine compound is circulated in the continuous reaction system. A solid bis(cyclic carbonate) and a solid catalyst are placed in the continuous reaction system to mix the solid bis(cyclic carbonate), solid catalyst, and liquid polyamine compound to form a heterogeneous mixture. The heterogeneous mixture is heated in the continuous reaction system in a microwave manner, such that the heterogeneous mixture reacts to form a polyurethane resin.
    Type: Application
    Filed: October 31, 2017
    Publication date: March 14, 2019
    Applicants: National Tsing Hua University, Chang Chun Plastics Co., Ltd., Chang Chun Petrochemical Co., Ltd.
    Inventors: David S. H. Wong, Kan-Nan Chan, Ping-Lin Yang, An-Pang Tu, En-Ko Lee
  • Patent number: 9412721
    Abstract: A communications structure comprises a first semiconductor substrate having a first coil, and a second semiconductor substrate having a second coil above the first semiconductor substrate. Inner edges of the first and second coils define a boundary of a volume that extends below the first coil and above the second coil. A ferromagnetic core is positioned at least partially within the boundary, such that a mutual inductance is provided between the first and second coils for wireless transmission of signals or power between the first and second coils.
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: August 9, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ping-Lin Yang, Jun-De Jin, Fu-Lung Hsueh, Sa-Lly Liu, Tong-Chern Ong, Chun-Jung Lin, Ya-Chen Kao
  • Patent number: 9378926
    Abstract: An embodiment of a method of lithography includes generating a beam of electrons. A first pixel and a second pixel are each configured to pattern the beam. Using time domain multiplex loading, the first and second pixels are controlled such that the beam is patterned. The patterning includes receiving a first clock signal and using the first clock signal to generate a second clock signal and a third clock signal. The second clock signal is sent to the first pixel and sending the third clock signal is sent to the second pixel.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: June 28, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Zhang Kuo, Ping-Lin Yang, Cheng-Chung Lin, Osamu Takahashi, Sang Hoo Dhong
  • Patent number: 9362899
    Abstract: A clock regenerator includes a pulse generating module, a control logic module, a gating module and an output module. The pulse generating module is configured to receive a global clock signal and produce a periodic pulse signal triggered by a rising edge of the global clock signal. The control logic module is configured to receive a plurality of control signals and produce a pulse-type setting signal and a gating signal according to the periodic pulse signal and the control signals. The gating module is configured to produce an intermediate clock signal according to the pulse-type setting signal and the gating signal. The output module is configured to provide a local clock signal according to the intermediate clock signal.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: June 7, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Zhang Kuo, Ping-Lin Yang, Cheng-Chung Lin, Osamu Takahashi, Sang Hoo Dhong
  • Patent number: 9202662
    Abstract: A system includes an integrated circuit (IC) design data base having a feature, a source configured to generate a radiation beam, a pattern generator (PG) including a mirror array plate and an electrode plate disposed over the mirror array plate, wherein the electrode plate includes a lens let having a first dimension and a second dimension perpendicular to the first dimension with the first dimension larger than the second dimension so that the lens let modifies the radiation beam to form the long shaped radiation beam, and a stage configured secured the substrate. The system further includes an electric field generator connecting the mirror array plate. The mirror array plate includes a mirror. The mirror absorbs or reflects the radiation beam. The radiation beam includes electron beam or ion beam. The second dimension is equal to a minimum dimension of the feature.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: December 1, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jimmy Hsiao, Ming-Zhang Kuo, Ping-Lin Yang, Cheng-Chung Lin, Osamu Takahashi, Sang Hoo Dhong
  • Publication number: 20150171832
    Abstract: A clock regenerator includes a pulse generating module, a control logic module, a gating module and an output module. The pulse generating module is configured to receive a global clock signal and produce a periodic pulse signal triggered by a rising edge of the global clock signal. The control logic module is configured to receive a plurality of control signals and produce a pulse-type setting signal and a gating signal according to the periodic pulse signal and the control signals. The gating module is configured to produce an intermediate clock signal according to the pulse-type setting signal and the gating signal. The output module is configured to provide a local clock signal according to the intermediate clock signal.
    Type: Application
    Filed: December 13, 2013
    Publication date: June 18, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Zhang KUO, Ping-Lin YANG, Cheng-Chung LIN, Osamu TAKAHASHI, Sang Hoo DHONG
  • Publication number: 20150131077
    Abstract: An embodiment of a method of lithography includes generating a beam of electrons. A first pixel and a second pixel are each configured to pattern the beam. Using time domain multiplex loading, the first and second pixels are controlled such that the beam is patterned. The patterning includes receiving a first clock signal and using the first clock signal to generate a second clock signal and a third clock signal. The second clock signal is sent to the first pixel and sending the third clock signal is sent to the second pixel.
    Type: Application
    Filed: January 23, 2015
    Publication date: May 14, 2015
    Inventors: Ming-Zhang Kuo, Ping-Lin Yang, Cheng-Chung Lin, Osamu Takahashi, Sang Hoo Dhong
  • Patent number: 8941085
    Abstract: The present disclosure provides a systems and methods for e-beam lithography. One system includes an electron source operable to produce a beam and an array of pixels operable to pattern the beam. Control circuitry is spaced a distance from and coupled to the array of pixels. The control circuitry uses time domain multiplex loading (TMDL) to control the array of pixels.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: January 27, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Zhang Kuo, Ping-Lin Yang, Cheng-Chung Lin, Osamu Takahashi, Sang Hoo Dhong
  • Patent number: 8921160
    Abstract: A package comprises a die stack having at least two stacked dies coupled for contactless communications with each other. At least one of the stacked dies has a substrate joined to its major face. The substrate has a plurality of conductive traces in or on the substrate for conducting power to the dies and for conducting heat from the dies. At least one conductive pillar is joined to at least one of the conductive traces on at least a first edge of the substrate, for conducting power to the at least one die and for conducting heat from the at least one die.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: December 30, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ping-Lin Yang, Sa-Lly Liu, Chien-Min Lin
  • Publication number: 20140268078
    Abstract: The present disclosure provides a systems and methods for e-beam lithography. One system includes an electron source operable to produce a beam and an array of pixels operable to pattern the beam. Control circuitry is spaced a distance from and coupled to the array of pixels. The control circuitry uses time domain multiplex loading (TMDL) to control the array of pixels.
    Type: Application
    Filed: June 10, 2013
    Publication date: September 18, 2014
    Inventors: Ming-Zhang Kuo, Ping-Lin Yang, Cheng-Chung Lin, Osamu Takahashi, Sang Hoo Dhong
  • Publication number: 20140256063
    Abstract: A communications structure comprises a first semiconductor substrate having a first coil, and a second semiconductor substrate having a second coil above the first semiconductor substrate. Inner edges of the first and second coils define a boundary of a volume that extends below the first coil and above the second coil. A ferromagnetic core is positioned at least partially within the boundary, such that a mutual inductance is provided between the first and second coils for wireless transmission of signals or power between the first and second coils.
    Type: Application
    Filed: May 19, 2014
    Publication date: September 11, 2014
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ping-Lin YANG, Jun-De JIN, Fu-Lung HSUEH, Sa-Lly LIU, Tong-Chern ONG, Chun-Jung LIN, Ya-Chen KAO
  • Patent number: 8760255
    Abstract: A communications structure comprises a first semiconductor substrate having a first coil, and a second semiconductor substrate having a second coil above the first semiconductor substrate. Inner edges of the first and second coils define a boundary of a volume that extends below the first coil and above the second coil. A ferromagnetic core is positioned at least partially within the boundary, such that a mutual inductance is provided between the first and second coils for wireless transmission of signals or power between the first and second coils.
    Type: Grant
    Filed: August 10, 2011
    Date of Patent: June 24, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ping-Lin Yang, Jun-De Jin, Fu-Lung Hsueh, Sa-Lly Liu, Tong-Chern Ong, Chun-Jung Lin, Ya-Chen Kao
  • Publication number: 20130302942
    Abstract: A package comprises a die stack having at least two stacked dies coupled for contactless communications with each other. At least one of the stacked dies has a substrate joined to its major face. The substrate has a plurality of conductive traces in or on the substrate for conducting power to the dies and for conducting heat from the dies. At least one conductive pillar is joined to at least one of the conductive traces on at least a first edge of the substrate, for conducting power to the at least one die and for conducting heat from the at least one die.
    Type: Application
    Filed: July 18, 2013
    Publication date: November 14, 2013
    Inventors: Ping-Lin YANG, Sa-Lly LIU, Chien-Min LIN
  • Patent number: 8560997
    Abstract: Among other things, one or more techniques for conditional cell placement are provided herein. In an embodiment, a conditional boundary is created for a first cell. For example, the conditional boundary enables the first cell to be placed relative to a second cell based on a conditional placement rule. In an embodiment, the first cell is placed in a first manner relative to the second cell based in a first scenario. In a second scenario, different than the first scenario, the first cell is placed in a second manner relative to the second cell. In this manner, conditional cell placement is provided, thus providing flexibility and improved layout efficiency with regard to semiconductor fabrication, for example.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: October 15, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Ping-Lin Yang, Ming-Zhang Kuo, Cheng-Chung Lin, Jimmy Hsiao, Jia-Rong Hsu
  • Patent number: 8513795
    Abstract: A package comprises a die stack having at least two stacked dies coupled for contactless communications with each other. At least one of the stacked dies has a substrate joined to its major face. The substrate has a plurality of conductive traces in or on the substrate for conducting power to the dies and for conducting heat from the dies. At least one conductive pillar is joined to at least one of the conductive traces on at least a first edge of the substrate, for conducting power to the at least one die and for conducting heat from the at least one die.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: August 20, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ping-Lin Yang, Sa-Lly Liu, Chien-Min Lin
  • Publication number: 20130161811
    Abstract: A package comprises a die stack having at least two stacked dies coupled for contactless communications with each other. At least one of the stacked dies has a substrate joined to its major face. The substrate has a plurality of conductive traces in or on the substrate for conducting power to the dies and for conducting heat from the dies. At least one conductive pillar is joined to at least one of the conductive traces on at least a first edge of the substrate, for conducting power to the at least one die and for conducting heat from the at least one die.
    Type: Application
    Filed: December 27, 2011
    Publication date: June 27, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ping-Lin YANG, Sa-Lly LIU, Chien-Min LIN
  • Publication number: 20130038418
    Abstract: A communications structure comprises a first semiconductor substrate having a first coil, and a second semiconductor substrate having a second coil above the first semiconductor substrate. Inner edges of the first and second coils define a boundary of a volume that extends below the first coil and above the second coil. A ferromagnetic core is positioned at least partially within the boundary, such that a mutual inductance is provided between the first and second coils for wireless transmission of signals or power between the first and second coils.
    Type: Application
    Filed: August 10, 2011
    Publication date: February 14, 2013
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ping-Lin Yang, Jun-De Jin, Fu-Lung Hsueh, Sa-Lly Liu, Tong-Chern Ong, Chun-Jung Lin, Ya-Chen Kao
  • Publication number: 20110080201
    Abstract: A pulse width timing includes a first complementary resistor-capacitor (RC) circuit having an input for receiving an input signal, and a second complementary RC circuit coupled to an output of the first complementary RC circuit, wherein the first and second complementary RC circuits cooperate to produce an output signal based on the input signal, the output signal being delayed and having an adjusted pulse width with respect to the input signal.
    Type: Application
    Filed: October 7, 2009
    Publication date: April 7, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ping-Lin Yang, Yi-Tzu Chen