Patents by Inventor Ping Song

Ping Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190058161
    Abstract: An encapsulation structure, a manufacturing method thereof and a display apparatus are provided in the field of display device encapsulation. The encapsulation structure includes a plurality of film layers coated on the outside of a display device and the plurality of film layers include an inorganic layer and an organic layer that are laminated. The organic layer includes a polymer matrix and a repairing microstructure.
    Type: Application
    Filed: September 12, 2017
    Publication date: February 21, 2019
    Inventors: Ping Song, Feifei Wang, Youwei Wang, Peng Cai, Jing Yang
  • Publication number: 20190051222
    Abstract: There are provided a PI substrate, a preparation method thereof and a display device. The preparation method includes: forming a first separable film at an edge region of a substrate; forming a first-layer polyamic acid (PAA) film on the first separable film and the substrate; stripping the first separable film and the first-layer PAA film that covers the first separable film to expose the edge region of the substrate; and performing imidization on the first-layer PAA film on the substrate with the edge region exposed, to enable the first-layer PAA film to be transformed into a first-layer PI film, thereby avoiding uneven film thicknesses at edges of the first-layer PI substrates.
    Type: Application
    Filed: May 24, 2018
    Publication date: February 14, 2019
    Inventors: Yuanzheng Guo, Mingche Hsieh, Ping Song, Youwei Wang, Weinan Dai, Mingwen Wang
  • Patent number: 10186230
    Abstract: The present disclosure provides a shift register, comprising: a first input module, a second input module, an energy storage module, an output module and a reset module; and two shift signal input terminals, a reset control signal input terminal, a second electrical level input terminal and a first electrical level input terminal; a control terminal and an input terminal of the first input module being connected with the first shift signal input terminal, a control terminal and an input terminal of the second input module being connected with the second shift signal input terminal; output terminals of the first input module and the second input module as well as a first terminal of the energy storage module all being connected with a first node; the first input module and the second input module being configured to be turned on when the first or second shift signal input terminal accesses a first electrical level, and set the voltage of the first node to the first electrical level.
    Type: Grant
    Filed: September 23, 2015
    Date of Patent: January 22, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Wei Xue, Hongmin Li, Zhifu Dong, Ping Song, Bo Liu
  • Patent number: 10184976
    Abstract: The present disclosure illustrates a testing circuit board with self-detection function and a self-detection method. A test for a to-be-tested circuit board is executed and a self-detection for a testing circuit board is performed by a JTAG chip. After the self-detection is passed, a first JTAG connection interface and a second JTAG connection interface are conducted by a controller, a multiplexer and a switch chip, to connect test circuit boards in series. Therefore, the efficiency of solving self-detection of JTAG chip with series connection conveniently and quickly may be achieved.
    Type: Grant
    Filed: June 14, 2017
    Date of Patent: January 22, 2019
    Assignee: INVENTEC (PUDONG) TECHNOLOGY CORPORATION
    Inventor: Ping Song
  • Patent number: 10170069
    Abstract: A shift register includes an input circuit, a first reset circuit, an output circuit, a second reset circuit and a first pull-down control circuit. The input circuit may control a voltage of the first node according to a reset signal from a reset signal terminal. The first reset circuit may reset the voltage of the first node according to the reset signal from the reset signal terminal. The output circuit may control an output signal of a signal output terminal according to the voltage of the first node. The second reset circuit may reset the voltage of the first node and the output signal according to a voltage of a second node. The first pull-down control circuit may control the voltage of the second node according to the voltage of the first node based on a first auxiliary voltage signal and a second auxiliary voltage signal, wherein a phase of the first auxiliary voltage signal is opposite to a phase of the second auxiliary voltage signal, and each duty cycles is 50%.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: January 1, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Wei Xue, Hongmin Li, Ping Song, Zhifu Dong
  • Patent number: 10164214
    Abstract: The disclosure provides a display panel and a method for manufacturing the same. The display panel includes: an underlying substrate; thin film transistors, a light emission layer, a first inorganic moisture-blocking layer successively arranged on the underlying substrate; an organic buffer layer arranged on the first inorganic moisture-blocking layer, the organic buffer layer comprises: droplet micro-structures for decentralizing a stress on the organic buffer layer; a second inorganic moisture-blocking layer arranged on the organic buffer layer; and a blocking layer, and a glass cover plate successively arranged on the second inorganic moisture-blocking layer.
    Type: Grant
    Filed: September 25, 2017
    Date of Patent: December 25, 2018
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Ping Song, Feifei Wang, Youwei Wang, Peng Cai, Jian Min
  • Publication number: 20180358576
    Abstract: A polarization optical assembly, an OLED device and a preparation method thereof, a display device. The polarization optical assembly includes: a cholesteric liquid crystal layer, a ?/4 wave plate and a linear polarizer. The ?/4 wave plate is between the cholesteric liquid crystal layer and the linear polarizer, and an angle exists between a fast axis or a slow axis of the ?/4 wave plate and a transmission axis of the linear polarizer, and polarized light formed by external fight sequentially passing the linear polarizer and the ?/4 wave plate is able to pass through the cholesteric liquid crystal layer. The display device can increase the output of light while reducing the reflection of external light.
    Type: Application
    Filed: July 7, 2017
    Publication date: December 13, 2018
    Inventors: Ping SONG, Feifei WANG, Youwei WANG, Peng CAI, Yuanzheng GUO
  • Publication number: 20180355468
    Abstract: A mask plate, a manufacturing method of the mask plate, and a method of evaporation by using the mask plate are provided. The mask plate includes an opening plate, the opening plate includes an opening and a blocking portion outside the opening, a concavity is in the blocking portion, and a depth of the concavity is smaller than a thickness of the blocking portion.
    Type: Application
    Filed: December 13, 2017
    Publication date: December 13, 2018
    Inventors: Youwei WANG, Song ZHANG, Tao SUN, Ping SONG, Peng CAI, Yuanzheng GUO
  • Publication number: 20180315807
    Abstract: A pixel definition structure, an organic light-emitting device and the encapsulation method thereof, and a display apparatus are provided, in the field of display technology. The pixel definition structure includes a plurality of barriers, wherein the plurality of barriers includes a first barrier and a second barrier. The height of the first barrier is smaller than that of the second barrier, and a barrier at a first edge area of the pixel definition structure is the first barrier. The present disclosure can solve the problem of the poor encapsulation effect and improve the encapsulation effect. The present disclosure is applied to an organic light-emitting device.
    Type: Application
    Filed: December 7, 2017
    Publication date: November 1, 2018
    Inventors: Youwei Wang, Song Zhang, Peng Cai, Ping Song, Xiaobo Du
  • Publication number: 20180249386
    Abstract: Embodiments of the present disclosure provide a camped cell determining method, user equipment (UE), and a network device. The method includes: determining, by UE, whether the UE needs to reselect a cell; if no, obtaining, by the UE, parameter information of a camped cell and parameter information of at least one non-camped cell; determining, by the UE according to the parameter information of the camped cell and parameter information of any non-camped cell, whether a preset condition is met; if yes, using, by the UE, the corresponding non-camped cell as a candidate cell; and selecting, by the UE from at least one candidate cell, a cell corresponding to maximum parameter information as a new camped cell, or selecting, from at least one candidate cell, any candidate cell as a new camped cell.
    Type: Application
    Filed: April 30, 2018
    Publication date: August 30, 2018
    Inventors: Ping Song, Hongzhuo Zhang
  • Publication number: 20180240395
    Abstract: The present disclosure provides a gate driving circuit, a gate driving method and a display method. The gate driving circuit includes a pull-up node control circuitry, a pull-down node control circuitry, a display storage circuitry, a compensation storage circuitry and a compensation storage control circuitry. The compensation storage control circuitry is connected to an input terminal, a pull-down control voltage terminal, a pull-up node, a pull-down node, and a second terminal of the compensation storage circuitry, and configured to enable the pull-down control voltage terminal to be electrically connected to the second terminal of the compensation storage circuitry under the control of the input terminal so as to charge the compensation storage circuitry, and enable the second terminal of the compensation storage circuitry to be electrically connected to the pull-up node.
    Type: Application
    Filed: September 27, 2017
    Publication date: August 23, 2018
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Liqing LIAO, Hongmin LI, Ping SONG
  • Publication number: 20180190232
    Abstract: A shift register includes an input circuit, a first reset circuit, an output circuit, a second reset circuit and a first pull-down control circuit. The input circuit may control a voltage of the first node according to a reset signal from a reset signal terminal. The first reset circuit may reset the voltage of the first node according to the reset signal from the reset signal terminal. The output circuit may control an output signal of a signal output terminal according to the voltage of the first node. The second reset circuit may reset the voltage of the first node and the output signal according to a voltage of a second node. The first pull-down control circuit may control the voltage of the second node according to the voltage of the first node based on a first auxiliary voltage signal and a second auxiliary voltage signal, wherein a phase of the first auxiliary voltage signal is opposite to a phase of the second auxiliary voltage signal, and each duty cycles is 50%.
    Type: Application
    Filed: August 18, 2017
    Publication date: July 5, 2018
    Inventors: Wei Xue, Hongmin Li, Ping Song, Zhifu Dong
  • Publication number: 20180164368
    Abstract: The present disclosure illustrates a testing circuit board with self-detection function and a self-detection method. A test for a to-be-tested circuit board is executed and a self-detection for a testing circuit board is performed by a JTAG chip. After the self-detection is passed, a first JTAG connection interface and a second JTAG connection interface are conducted by a controller, a multiplexer and a switch chip, to connect test circuit boards in series. Therefore, the efficiency of solving self-detection of JTAG chip with series connection conveniently and quickly may be achieved.
    Type: Application
    Filed: June 14, 2017
    Publication date: June 14, 2018
    Inventor: Ping Song
  • Publication number: 20180108310
    Abstract: The disclosure provides an array substrate, a display panel, a display device and a display method. The array substrate comprises a display region provided with a plurality of data lines therein and a wiring region around the display region and provided with a plurality of leading wires therein. The plurality of leading wires are connected with the plurality of data lines respectively in a one-to-one correspondence way. The plurality of leading wires comprise a plurality of first leading wires and a plurality of second leading wires insulatively arranged in different layers. The plurality of first leading wires and the plurality of second leading wires comprise at least one pair of overlapped first and second leading wires to which data signals having the same polarity are input.
    Type: Application
    Filed: September 9, 2016
    Publication date: April 19, 2018
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhifu Dong, Hongmin Li, Ping Song, Liqing Liao
  • Patent number: 9933671
    Abstract: The present invention relates to the field of display technology, and discloses an array substrate, a manufacturing method thereof and a display device, for reducing the light leakage of a display device. The array substrate comprises a plurality of pixel regions arranged in arrays on a base substrate, two adjacent ones of the pixel regions having a signal line arranged therebetween, and the pixel regions and the signal line having a gap therebetween, wherein the array substrate further comprises at least one light-leakage-proof electrode arranged to be insulated from the pixel regions and the signal line, and the vertical projection of the light-leakage-proof electrode on the base substrate at least covers a portion of the vertical projection of the gap on the base substrate. The present invention is applicable in the field of display technology.
    Type: Grant
    Filed: August 11, 2015
    Date of Patent: April 3, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Zhifu Dong, Wei Xue, Ping Song, Hongmin Li
  • Publication number: 20180090712
    Abstract: The disclosure provides a display panel and a method for manufacturing the same. The display panel includes: an underlying substrate; thin film transistors, a light emission layer, a first inorganic moisture-blocking layer successively arranged on the underlying substrate; an organic buffer layer arranged on the first inorganic moisture-blocking layer, the organic buffer layer comprises: droplet micro-structures for decentralizing a stress on the organic buffer layer; a second inorganic moisture-blocking layer arranged on the organic buffer layer; and a blocking layer, and a glass cover plate successively arranged on the second inorganic moisture-blocking layer.
    Type: Application
    Filed: September 25, 2017
    Publication date: March 29, 2018
    Inventors: Ping Song, Feifei WANG, Youwei WANG, Peng CAI, Jian MIN
  • Publication number: 20180073922
    Abstract: A composition for ultraviolet light intensity detection comprises nematic mixed crystals, chiral additives, cholesteric liquid crystals, azobenzene monomers, photopolymerizable monomers and a photoinitiators. When preparing a film having the composition, the steps include mixing each of components of the composition and spreading out the mixture to form a pre-formed film of the mixture, and irradiating the pre-formed film by light to form a film for ultraviolet light intensity detection.
    Type: Application
    Filed: August 15, 2017
    Publication date: March 15, 2018
    Inventors: Feifei WANG, Xibin SHAO, Ping SONG, Seung Min LEE, Honglin ZHANG, Hebin ZHAO, Deqiang LIU
  • Patent number: 9883444
    Abstract: The present application provides a method and device for evaluating network performance, which relate to the field of communications technologies. The method includes: obtaining statistical data characterizing network performance; according to the statistical data, obtaining performance of neighbor relationship adjustment, or obtaining a degree to which the neighbor relationship adjustment affects the network performance. The present application determines impact of ANR algorithm on a network or a UE by collecting related status data, and solves a problem that whether degradation of UE performance or user experience is caused by the ANR algorithm cannot be determined in the prior art. Then a factor of ANR operation may be excluded from numerous factors which may affect a system or user experience, analysis capability of automatic troubleshooting is improved, and problem solving capability of operators is improved.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: January 30, 2018
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Dong Zhao, Ping Song, Kai Zhang, Lan Zou
  • Patent number: 9857425
    Abstract: A test circuit board adapted to be used on memory slot is provided. Each memory slot of a board to be tested is connected to one test circuit board. A plurality of the test circuit boards form an in-series connection therebetween. A test access port (TAP) controller is connected electrically to the board to be tested and one of the test circuit boards so that the memory slots, which are connected to the test circuit boards, may be tested at the same time.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: January 2, 2018
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Ping Song, Chang Qing Mu, Xiao Qian Li
  • Patent number: 9857426
    Abstract: A test-used PCB having an in-series circuit involved with a join test action group (JTAG) signal is provided. A first JTAG connection interface and a second JTAG connection interface are configured on test circuit boards. Test circuit boards can be seriously connected with each other through the first JTAG connection interface and the second JTAG connection interface. Therefore, the efficiency of providing series test circuit boards, reducing TAP controller and JTAG port may be achieved.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: January 2, 2018
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, NVENTEC CORPORATION
    Inventor: Ping Song