Abstract: A probe system includes a heater and a control circuit. The heater includes a resistive heating element routed through the probe system. An operational voltage is provided to the resistive heating element to provide heating for the probe system. The control circuit is configured to provide the operational voltage and monitor a capacitance between the resistive heating element and a metallic sheath of the heater over time. The control circuit is further configured to determine a remaining useful life of the probe system based on the capacitance.

Abstract: A system and method for an aircraft includes a probe, first and second current sensors, and a control circuit. The probe includes a heater that includes a resistive heating element routed through the probe, wherein an operational current is provided to the resistive heating element to provide heating for the probe. The first current sensor is configured to sense a first current through the resistive heating element, and the second current sensor is configured to sense a second current through the resistive heating element. The control circuit is configured to determine a leakage current based on the first and second currents and determine a remaining useful life the probe based on the leakage current over time.

Abstract: A probe system includes a heater and a control circuit. The heater includes a resistive heating element routed through the probe system. An operational voltage is provided to the resistive heating element to provide heating for the probe system. The control circuit is configured to provide the operational voltage and monitor a circuit frequency based on an element capacitance between the resistive heating element and a metallic sheath of the heater over time. The control circuit is further configured to determine remaining useful life of the probe system based on the circuit frequency.

Abstract: A probe system includes a heater and a control circuit. The heater includes a resistive heating element routed through the probe. An operational current is provided to the resistive heating element to provide heating for the probe. The control circuit is configured to monitor the operational current over time and determine a half-life estimate of the resistive heating element based upon an exponential function of the operational current over time.

Abstract: A probe system is configured to receive thermal images of the probe system from a thermal imager and includes a heater and a control circuit. The heater includes a resistive heating element routed through the probe. An operational voltage is provided to the resistive heating element to provide heating for the probe. The control circuit is configured to provide the operational voltage and receive the thermal images from the thermal imager. The control circuit is further configured to monitor the thermal images over time and determine a remaining useful life of the probe system based upon the thermal images over time.

Abstract: A switching power supply is provided which includes: an output port; a transformer; a first voltage divider circuit, configured to divide a feedback voltage to obtain a first divided voltage; and a primary controller, configured to control a current of the primary winding of the transformer; where the primary controller includes: a first comparison module, configured to compare the first divided voltage with a first reference voltage to obtain a first comparison result; a second comparison module, configured to compare the power supply voltage with a second reference voltage to obtain a second comparison result; and an open circuit protection module, configured to generate an open circuit protection signal, where the primary controller is configured to stop control of the primary winding in response to the open circuit protection signal. The present disclosure can efficiently detect disconnection of the up-sampling resistor of the switching power supply and provide open-circuit protection.

Abstract: The present disclosure relates to a circuit structure for enhancing EFT immunity of primary side converter, including a power ground and a feedback voltage detecting block, a feedback current detecting block, a controller, a PWM driving block, a high voltage starting block, a starting unit, a circuit for enhancing EFT immunity of primary side converter, a power MOS transistor, and an OR gate configured to perform a logical OR of an off-time calculated theoretically and an off-time output by an off-time control block. The present disclosure enhances EFT immunity effectively and improves the dynamic characteristics of the primary side converter.

Abstract: The present disclosure relates to a circuit structure for enhancing EFT immunity of primary side converter, including a power ground and a feedback voltage detecting block, a feedback current detecting block, a controller, a PWM driving block, a high voltage starting block, a starting unit, a circuit for enhancing EFT immunity of primary side converter, a power MOS transistor, and an OR gate configured to perform a logical OR of an off-time calculated theoretically and an off-time output by an off-time control block. The present disclosure enhances EFT immunity effectively and improves the dynamic characteristics of the primary side converter.

Abstract: A high voltage start-up circuit with adjustable start-up time, wherein, the drain electrode of the first NMOS transistor is connected with a first terminal of the first resistor, a gate electrode of the second NMOS transistor and a negative terminal of the diode; a source electrode of the first NMOS transistor, together with a positive terminal of the diode, is connected to the power ground; a drain electrode of the second NMOS transistor, together with a second terminal of the first resistor, is connected with a port SW of a chip; a source electrode of the second NMOS transistor, together with a first terminal of the second resistor, is connected with a power port VDD of the chip. The circuit can adjust the start-up time and the restart time of the chip flexibly.

Abstract: A direct current motor has a wound stator, a permanent magnet rotor having a commutator assembly, and brush gear. The brush gear has a first pole brush, a second pole brush and a plurality of commutating brushes. The commutator assembly has a cylindrical insulating base, and first and second members fixed to the base. The first member includes a radially extending first slip ring and a number of axially extending first bars. The second member includes a radially extending second slip ring and a number of axially extending second bars. The first and second pole brushes make continuous sliding contact with the first and second slip rings respectively. The first and second bars are fixed to the outer cylindrical surface of the base and form a cylindrical surface against which the commutating brushes make sliding contact.

Abstract: A semiconductor device with a current sampler and a start-up structure, comprises first, second and third high-voltage transistors, and a resistor, wherein: a drain terminal of the first transistor is respectively connected to a drain terminal of the second transistor, a drain terminal of the third transistor and one end of the resistor; a source terminal of the first transistor is grounded, and a gate terminal of the first transistor is connected to a gate terminal of the second transistor; the other end of the resistor is connected to a gate terminal of the third transistor; wherein the resistor is wound and formed in a common voltage withstand region of the first transistor, the second transistor and the third transistor, or in a voltage withstand region of the first transistor only, or in the voltage withstand region of the third transistor only.

Abstract: The present invention refers to a method being easy to recover metals including nickel and aluminum from waste aluminum catalysts, thereby entirely promoting the recovering rate. Said method comprises: preparing and roasting a waste aluminum catalyst with sodium salts, and then obtaining a first solution comprising vanadium and molybdenum, and a dreg comprising nickel and aluminum through leaching and filtrating; collecting and mixing the dreg with alkali powders to obtain a mixture of the dreg and alkali powders, roasting the mixture at 300 to 1000° C. with aluminum in the dreg reacting with hydroxyl generated from the roasting of mixture and further generating aluminum hydroxide, and then obtaining a second solution comprising aluminum and a concentrate having nickel through another leaching and filtrating; and recovering aluminum from the second solution and recovering nickel from the concentrate.

Abstract: A short-circuit protection structure comprises first and second high-voltage transistors, a control circuit, a first current sampling resistor for the first transistor and a second current sampling resistor for the second transistor. The control circuit controls switching period and duty cycle of the first transistor and the second transistor, a drain terminal of the first transistor is connected to a drain terminal of the second transistor, a source terminal of the first transistor is connected to the first current sampling resistor, and a source terminal of the second transistor is connected to the second current sampling resistor; a gate terminal of the first transistor and a gate terminal of the second transistor are connected to a driver stage of the control circuit. The size of the second transistor is smaller than the first transistor, and the current of the first transistor is sampled by the second transistor.

Abstract: A semiconductor device with a current sampler and a start-up structure, comprises first, second and third high-voltage transistors, and a resistor, wherein: a drain terminal of the first transistor is respectively connected to a drain terminal of the second transistor, a drain terminal of the third transistor and one end of the resistor; a source terminal of the first transistor is grounded, and a gate terminal of the first transistor is connected to a gate terminal of the second transistor; the other end of the resistor is connected to a gate terminal of the third transistor; wherein the resistor is wound and formed in a common voltage withstand region of the first transistor, the second transistor and the third transistor, or in a voltage withstand region of the first transistor only, or in the voltage withstand region of the third transistor only.

Abstract: The present invention refers to a method being easy to recover metals including nickel and aluminum from waste aluminum catalysts, thereby entirely promoting the recovering rate. Said method comprises: preparing and roasting a waste aluminum catalyst with sodium salts, and then obtaining a first solution comprising vanadium and molybdenum, and a dreg comprising nickel and aluminum through leaching and filtrating; collecting and mixing the dreg with alkali powders to obtain a mixture of the dreg and alkali powders, roasting the mixture at 300 to 1000° C. with aluminum in the dreg reacting with hydroxyl generated from the roasting of mixture and further generating aluminum hydroxide, and then obtaining a second solution comprising aluminum and a concentrate having nickel through another leaching and filtrating; and recovering aluminum from the second solution and recovering nickel from the concentrate.

Abstract: A termination for silicon superjunction VDMOSFET comprises heavily doped N-type silicon substrate which also works as drain region; drain metal is disposed on the back surface of the heavily doped N-type silicon substrate; an N-type silicon epitaxial layer is disposed on the heavily doped N-type silicon substrate; P-type silicon columns and N-type silicon columns are formed in the N-type silicon epitaxial layer, alternately arranged; a continuous silicon oxide layer is disposed on a part of silicon surface in the termination; structures that block the drift of mobile ions (several discontinuous silicon oxide layers arranged at intervals) are disposed on the other part of silicon surface in the termination. The structures that block the drift of mobile ions disposed in the termination region are able to effectively prevent movement of the mobile ions and improve the capability of the power device against the contamination induced by the mobile ions.

Abstract: A termination for silicon superjunction VDMOSFET comprises heavily doped N-type silicon substrate which also works as drain region; drain metal is disposed on the back surface of the heavily doped N-type silicon substrate; an N-type silicon epitaxial layer is disposed on the heavily doped N-type silicon substrate; P-type silicon columns and N-type silicon columns are formed in the N-type silicon epitaxial layer, alternately arranged; a continuous silicon oxide layer is disposed on a part of silicon surface in the termination; structures that block the drift of mobile ions (several discontinuous silicon oxide layers arranged at intervals) are disposed on the other part of silicon surface in the termination. The structures that block the drift of mobile ions disposed in the termination region are able to effectively prevent movement of the mobile ions and improve the capability of the power device against the contamination induced by the mobile ions.

Abstract: An interrupt control system is disclosed. The interrupt control system can include control logic that provides at least one interrupt request signal to a processor in response to at least one event signal. The control logic provides at least one computer executable instruction to a processor in response to detecting an instruction request from the processor corresponding to an interrupt response.

Abstract: Systems and methods for transmitting packets and controlling packet flow are provided in wireless communication systems. A time stamping technique synchronizes timers/and clocks between one or more senders and receivers in a wireless communication system. Additionally, a global acknowledgement frame carries a plurality of acknowledgement messages, such as one for each services identification (SID).

Abstract: An interrupt control system is disclosed. The interrupt control system can include control logic that provides at least one interrupt request signal to a processor in response to at least one event signal. The control logic provides at least one computer executable instruction to a processor in response to detecting an instruction request from the processor corresponding to an interrupt response.