Abstract: A method for performing data access management of a memory device in predetermined communications architecture with aid of unbalanced table update size and associated apparatus are provided. The method may include: utilizing a memory controller to receive a set of first commands from a host device, receive a set of first data with a first active block according to the set of first commands, and update a temporary physical-to-logical (P2L) address mapping table corresponding to the first active block; determining a selected table update size among multiple predetermined table update sizes according to at least one predetermined rule, wherein the multiple predetermined table update sizes represent multiple table entry counts, respectively; and updating at least one logical-to-physical address mapping table in the NV memory according to a set of P2L table entries corresponding to the selected table update size in the temporary P2L address mapping table, for further data accessing.

Abstract: A HDR tone mapping system includes several modules. A semantic segmentation module is used to extract semantic information from the input image. An image decomposition module is used to decompose the input image to a high-bit base layer and a detail layer. A statistics module is used to generate statistics of pixels of the input image according to the semantic information. A curve computation module is used to generate a tone curve from the statistics. A compression module is used to compress the high-bit base layer to a low-bit base layer according to the tone curve, the statistics and the semantic information. A detail adjustment module is used to tune the detail layer according to the semantic information and the statistics to generate an adjusted detail layer. An image reconstruction module is used to combine the adjusted detail layer and the low-bit base layer to generate an output image.

Abstract: A thermal resistor includes a substrate, a thermistor, a front electrode, a passivation protection layer, and an external protection layer. The thermistor does not include an oxide and is made of a base metal. Therefore, it can reduce the production cost. The passivation protection layer is formed by sputtering, physical vapor deposition, or chemical vapor deposition, in which the passivation protection layer conformally covers a surface of the thermistor and can protect the underlying thermistor.

Abstract: An image sensor includes a substrate. The image sensor includes a first photodiode (PD) having a first size in the substrate. The image sensor further includes a second PD having a second size in the substrate, wherein the first size is different from the second size. The image sensor further includes a first layer, wherein the first layer comprises a metal material or a dielectric material, and the first layer defines sidewalls of a first recess aligned with the first PD. The image sensor further includes a second layer in the first recess, wherein a portion of the first layer aligned with the second PD is free of the second layer, and the second layer overhangs the first layer.

Abstract: Semiconductor devices and methods of manufacture are provided whereby fences are formed over a substrate and III-V materials are grown over the substrate, wherein the fences block growth of the III-V materials. As such, smaller areas of the III-V materials are grown, thereby preventing stresses that occur with the growth of larger sheets.

Abstract: An embodiment of the invention provides a material recognition system. The material recognition system may include a fetching device, at least one sensing device and a processing device. The fetching device may fetch a target object. Each sensing device may include an ultrasound transmitter and an ultrasound receiver. The ultrasound transmitter may transmit an ultrasound emitting signal on the surface of the target object. The ultrasound receiver may receive an ultrasound received signal on the surface of the target object. There is a fixed distance between the ultrasound transmitter and the ultrasound receiver. The processing device may recognize the material of the target object according to the ultrasound emitting signal, the ultrasound received signal, and the fixed distance. In addition, when the fetching device fetches the target object, the ultrasound transmitter and the ultrasound receiver touch the surface of the target object.

Abstract: A friction alignment device for a curved substrate, which includes: a rotating sleeve, a friction alignment roller, a carrying device and a movable platform. The friction alignment roller is connected to the rotating sleeve and has a curved plane. The carrying device adsorbs a curved substrate to a carrying curved surface. Among them, the carrying device adjusts a height so that the curved plane and the curved substrate are in contact with an alignment pressure, and the rotating sleeve is used to rub the curved substrate, and at the same time, the movable platform performs a displacement of the height, and the curved substrate undergoes three-dimensional friction alignment.

Abstract: A fixation fixture includes a lower fixture, a middle fixture, and an upper fixture. The lower fixture includes a loading stage for carrying an object. The middle fixture is removably installed on the lower fixture and defines a through hole to expose the loading stage. A retaining edge extends from wall of the through hole. The upper fixture is removably installed on the middle fixture and extends in the through hole. A processing device and a method for making a liquid crystal lens are also provided.

Abstract: A semiconductor device includes a substrate, a plurality of oxide definition structures, a plurality of metal gates and a first conductive via. The oxide definition structures are formed on the substrate and arranged in a first direction. The metal gates are formed on the substrate and extend in a second direction. The first conductive via is formed on the substrate, located between two of the metal gates, extends in the first direction and has a first width in the second direction. There is a pitch between adjacent two of the metal gates in the second direction, and a first ratio of the first width to the pitch ranges between 0.2 and 0.7.

Abstract: A backlit-module-embedded illuminated keyswitch structure includes a baseplate, a mask film disposed below the baseplate and having a first coating configured to substantially reflect a light, a light guide sheet disposed at one side of the mask film and having a light source hole, a reflective layer disposed at one side of the light guide sheet opposite to the mask film and having an opening communicating with the light source hole, a top glue configured to connect the mask film and the light guide sheet around the light source hole, and a bottom glue configured to connect the light guide sheet and the reflective layer around the light source hole. The first coating covers the light source hole. In a stacked direction of the mask film, the light guide sheet, and the reflective layer, at least one of the top glue and the bottom glue overlaps the first coating.

Abstract: An integrated circuit (IC) with conductive structures and a method of fabricating the IC are disclosed. The method includes depositing a first dielectric layer on a semiconductor device, forming a conductive structure in the first dielectric layer, removing a portion of the first dielectric layer to expose a sidewall of the conductive structure, forming a barrier structure surrounding the sidewall of the conductive structure, depositing a conductive layer on the barrier structure, and performing a polishing process on the barrier structure and the conductive layer.

Abstract: A semiconductor device includes a 2-D material channel layer, a gate structure, and source/drain electrodes. The gate structure is over a channel region of the 2-D material channel layer. The source/drain electrodes are over source/drain regions of the 2-D material channel layer, respectively. Each of the source/drain electrodes includes a 2-D material electrode and a metal electrode. The 2-D material electrode is below a bottom surface of a corresponding one of the source/drain regions of the 2-D material channel layer. The metal electrode is over a top surface of the corresponding one of the source/drain regions of the 2-D material channel layer.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first diffusion barrier layer made of a dielectric material including a metal element, nitrogen, and oxygen and a first protection layer made of a dielectric material including silicon and oxygen and in direct contact with the top surface of the first diffusion barrier layer. The semiconductor device structure also includes a first thickening layer made of a dielectric material including the metal element and oxygen and in direct contact with the top surface of the first protection layer. A maximum metal content in the first thickening layer is greater than that in the first diffusion barrier layer. The semiconductor device structure further includes a conductive feature surrounded by and in direct contact with the first diffusion barrier layer, the first protection layer, and the first thickening layer.

Abstract: A decoding method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: sending at least one read command sequence instructing to read a first physical unit in a rewritable non-volatile memory module; receiving response data from the rewritable non-volatile memory module, wherein the response data includes a plurality of identification bits, and the plurality of identification bits reflect a voltage variation of a first bit line where a first memory cell in the first physical unit is located during a discharge process; determining a decoding parameter corresponding to the first memory cell according to the plurality of identification bits; and decoding data read from the first memory cell according to the decoding parameter.

Abstract: The present invention relates to a cell differentiation medium composition, a high secretion insulin-producing cells and a preparation method thereof. The high secretion insulin-producing cells obtained by using the cell differentiation medium composition to induce stem cell differentiated under specific conditions can secrete a large amount of insulin in a short time, and when the high-secreting insulin-producing cells are transplanted into the human body, they are not easy to be swallowed by macrophages, which can improve the survival rate of the insulin-producing cells and prolong the time of insulin secretion thereby.

Abstract: A method includes forming a gate electrode on a semiconductor region, recessing the gate electrode to generate a recess, performing a first deposition process to form a first metallic layer on the gate electrode and in the recess, wherein the first deposition process is performed using a first precursor, and performing a second deposition process to form a second metallic layer on the first metallic layer using a second precursor different from the first precursor. The first metallic layer and the second metallic layer comprise a same metal. The method further incudes forming a dielectric hard mask over the second metallic layer, and forming a gate contact plug penetrating through the dielectric hard mask. The gate contact plug contacts a top surface of the second metallic layer.

Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for weaker and softer dielectric layer. The insert layer may be applied between two weaker dielectric layers or the insert layer may be used with a single layer of dielectric material. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.

Abstract: A device, structure, and method are provided whereby an insert layer is utilized to provide additional support for weaker and softer dielectric layer. The insert layer may be applied between two weaker dielectric layers or the insert layer may be used with a single layer of dielectric material. Once formed, trenches and vias are formed within the composite layers, and the insert layer will help to provide support that will limit or eliminate undesired bending or other structural motions that could hamper subsequent process steps, such as filling the trenches and vias with conductive material.