Patents by Inventor Po Cheng To

Po Cheng To has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230134988
    Abstract: An example device includes a physical storage medium, a wireless power circuit, and a portable sealed housing containing the physical storage medium and the wireless power circuit. The physical storage medium stores a first security protocol to activate the wireless power circuit, and a second security protocol to allow data transfer between the physical storage medium and a host device.
    Type: Application
    Filed: October 29, 2021
    Publication date: May 4, 2023
    Inventors: Chung-Pao LU, Chien-Hao LU, Chia Ching LU, Po-Cheng LIAO
  • Publication number: 20230111986
    Abstract: A cell population (55) is cultured on a cell culture substrate (50) while agents contained in agent reservoirs (31, 33, 35) at predefined positions in a culture container (10) diffuse through the substrate (50) and form at least partly overlapping concentration gradients in the substrate (50) within combination areas (41, 43, 45) and substantially non-overlapping concentration gradients in the substrate (50) peripheral to an outer boundary of the agent reservoirs (31, 33, 35). Inhibition end points (61, 63, 65) of respective inhibition zones (60, 62, 64) substantially lacking any growth of the cell population (55) peripheral to the outer boundary of the agent reservoirs (31, 33, 35) and growth end points (71, 73, 75) of respective growth zones (70, 72, 74) comprising growth of the cell population (55) within the combination areas (41, 43, 45) are determined and used to determine interaction effects between the agents on the cell population (55).
    Type: Application
    Filed: March 19, 2021
    Publication date: April 13, 2023
    Inventors: Nikolaos KAVALOPOULOS, Roderich RĂ–MHILD, Po-Cheng TANG, Johan KREUGER, Dan ANDERSSON
  • Publication number: 20230104801
    Abstract: An interactive test equipment for quality evaluation of power transformers includes at least a control unit, a test question type module and an operating module. The test question type module includes at least a test set, and each of the at least a test set has a transformer, a voltage value display and a resistance value display. Based on the above design, the voltage value display and the resistance value display of the each of the at least a test set can display a measured voltage value and a measured resistance value of wiring connection of a corresponding transformer. Test subjects can initiate the interactive test equipment and select answers through the operating module, and load questions and determine answers through the control unit. The interactive test equipment is used to authenticate and evaluate a judgment ability of the test subjects in order to ensure safety of a working environment.
    Type: Application
    Filed: September 14, 2022
    Publication date: April 6, 2023
    Inventor: PO-CHENG KO
  • Publication number: 20230104141
    Abstract: An interactive test equipment for quality evaluation of an insulative electric resistance value of an electric power cable at least includes a control unit, a test question type module and an operating module. The test question type module includes at least a test set. Each of the at least a test set includes at least an electric resistance value measuring part each of which has an electric voltage value display and an electric resistance value display to respectively display electric voltage values and electric resistance values of a corresponding cable. Besides, the operating module is used to initiate the interactive test equipment, to select answers, and the control unit is used to load question types and to make judgment on answers. Accordingly, test subjects are authenticated and evaluated for a judgment ability thereof in order for ensuring safety of a working environment.
    Type: Application
    Filed: September 14, 2022
    Publication date: April 6, 2023
    Inventor: PO-CHENG KO
  • Publication number: 20230108966
    Abstract: An interactive test equipment for quality evaluation of resistance value test for electric leakage is disposed on a platform, and includes at least a control unit, a leaking electric current control module and an operating module. The leaking electric current control module includes at least a test set for quality evaluation to determine a resistance value for electric leakage. Each of the at least a test set has a circuit breaker and an electric leakage value display. The electric leakage value display of the each of the at least a test set can be used to display tripping circuit-breaking data of a corresponding circuit breaker. Test subjects can initiate the interactive test equipment and select answers through the operating module, and load questions and determine answers through the control unit.
    Type: Application
    Filed: September 14, 2022
    Publication date: April 6, 2023
    Inventor: PO-CHENG KO
  • Publication number: 20230088634
    Abstract: A semiconductor device includes a substrate, a 2-D material channel layer, a 2-D material passivation layer, source/drain contacts, and a gate structure. The 2-D material channel layer is over the substrate, wherein the 2-D material channel layer is made of graphene. The 2-D material passivation layer is over the 2-D material channel layer, wherein the 2-D material passivation layer is made of transition metal dichalcogenide (TMD). The source/drain contacts are over the 2-D material passivation layer. The gate structure is over the 2-D material passivation layer and between the source/drain contacts.
    Type: Application
    Filed: March 10, 2022
    Publication date: March 23, 2023
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen LIN, Po-Cheng TSAI
  • Patent number: 11602802
    Abstract: A system for securing first and second metal workpieces to a central metal workpiece located therebetween. The system includes clamps to secure the first and second metal workpieces in coaxial alignment with the central metal workpiece, which is rotatable about its axis. Heating elements heat opposed ends of the first metal workpiece and the central metal workpiece, and opposed ends of the second metal workpiece and the central metal workpiece, to a hot working temperature. While the opposed ends are at the hot working temperature, the heating elements are removed. The opposed end of the first metal workpiece is urged against the end opposed thereto of the rotating central metal workpiece, while the central metal workpiece rotates. At the same time, the rotating central metal workpiece is pulled against the second metal workpiece to engage the opposed ends thereof with each other. The workpieces are then allowed to cool.
    Type: Grant
    Filed: July 7, 2022
    Date of Patent: March 14, 2023
    Inventor: Paul Po Cheng
  • Publication number: 20230071772
    Abstract: Examples of electronic devices and connectors for providing a secure connection are described herein. In an example, an electronic device may securely hold an external device, upon engagement of a connector of the external device in a corresponding port of the electronic device.
    Type: Application
    Filed: January 31, 2020
    Publication date: March 9, 2023
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Hai-Lung Hung, Cheng-Yi Yang, Po Cheng Liao
  • Publication number: 20230070676
    Abstract: A charger circuit includes: a power stage circuit configured to operate at least one power switch according to an operation signal, so as to convert an input power to a charging power to charge a battery; a control circuit coupled to the power stage circuit and configured to generate the operation signal according to a current feedback signal and a voltage feedback signal; a voltage feedback circuit configured to compare a voltage sensing signal related to a charging voltage of the charging power with a voltage reference level, so as to generate the voltage feedback signal; a battery core voltage drop sensing circuit coupled to a battery core of the battery and configured to sense a battery core voltage drop of the battery core, so as to generate a battery core voltage drop sensing signal; and an adjustment circuit coupled to the battery core voltage drop sensing circuit and configured to generate an adjustment signal according to the battery core voltage drop sensing signal, so as to adaptively adjust the vo
    Type: Application
    Filed: June 14, 2022
    Publication date: March 9, 2023
    Inventors: Hsuan-Kai Wang, Hsien-Chih She, Po-Cheng Liu
  • Patent number: 11597032
    Abstract: A method of at least partially filling an opening in a workpiece made of metal, the opening being at least partially defined by one or more opening walls having one or more opening wall surfaces. The method includes providing an insert bondable with the workpiece, the insert having one or more insert engagement surfaces formed for engagement with the opening wall surface. The opening wall surface and the insert engagement surface are heated to a hot working temperature. The insert is subjected to an engagement motion, to move the insert engagement surface relative to the opening wall surface. While the insert is subjected to the engagement motion, the insert is also subjected to a translocation motion to move the insert at least partially into the opening, for engaging the insert engagement surface with the opening wall surface, for at least partially creating a metallic bond between the insert and the workpiece.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: March 7, 2023
    Inventor: Paul Po Cheng
  • Publication number: 20230061260
    Abstract: A method includes forming a 2-D material semiconductor layer over a substrate; forming source/drain electrodes covering opposite sides of the 2-D material semiconductor layer, while leaving a portion of the 2-D material semiconductor layer exposed by the source/drain electrodes; forming a first gate dielectric layer over the portion of the 2-D material semiconductor layer by using a physical deposition process; forming a second gate dielectric layer over the first gate dielectric layer by using a chemical deposition process, in which a thickness of the first gate dielectric layer is less than a thickness of the second gate dielectric layer; and forming a gate electrode over the second gate dielectric layer.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen LIN, Po-Cheng TSAI, Yu-Wei ZHANG
  • Publication number: 20230056629
    Abstract: In one example, a computing device may include a circuit board having a contact pad disposed at an edge of the circuit board, and a chassis in which the circuit board is installed. The chassis may include a circuit board holder to engage the edge of the circuit board to retain the circuit board in a defined position relative to the chassis. The circuit board holder may be grounded. Further, the computing device may include a controller to receive a signal from the contact pad, the signal indicative of a presence of the circuit board holder contacting the contact pad. Furthermore, the controller may detect a form factor type of the chassis based on the received signal.
    Type: Application
    Filed: January 31, 2020
    Publication date: February 23, 2023
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Hsin-Tso Lin, Po Cheng Liao, Chien-Hao Lu
  • Publication number: 20230049478
    Abstract: Examples of power management apparatuses, computing devices, and methods for disabling a phase of a power supply unit based on a power mode of a computing device are described herein. In an example, upon receiving an indication of the power mode of the computing device from a switching circuit, the power supply unit may disable the phase.
    Type: Application
    Filed: January 31, 2020
    Publication date: February 16, 2023
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Po Cheng Liao, Ching Hsiung Yang, Hsin Tso Lin, Chien-Hao Lu
  • Patent number: 11582551
    Abstract: A speaker device includes a housing body, a speaker driver and a passive radiator. The housing body is formed with a first sound hole and a second sound hole respectively opening in two opposite directions. The speaker driver is disposed in the housing body, is located adjacent to the first sound hole, and is adapted to generate sound. The passive radiator is disposed in the housing body, is located adjacent to the second sound hole, and is adapted to generate sound. The first sound hole and the second sound hole are adapted for respectively allowing the sound generated by the speaker driver and the sound generated by the passive radiator to travel out from the housing body respectively in two opposite directions therethrough.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: February 14, 2023
    Assignee: Jabil Circuit (Singapore) Pte. Ltd.
    Inventors: Wen-Hong Wang, Chia-Chien Chen, Ching-Feng Lin, Po-Cheng Huang, Shih-Hsien Yang, Kuo-Lin Chao, Cheng-Chih Tai, Kuan-Yu Su, En-De Su, Cheng-Kun Chiang, Ke-Yu Lin, Ching-Hsin Chen
  • Patent number: 11577295
    Abstract: A method of forming an assembly in which a metal extension element is connected with a metal stub element, by an intermediate element. The intermediate element extends between first and second ends. The intermediate element is positioned to locate its first end spaced apart from the stub element. An inner end of the extension element is spaced apart from the second end of the intermediate element. Heating elements are located between the elements, to heat the proximal portions of the elements to a hot working temperature, at which the heated portions are subject to plastic deformation. The heating elements are removed, and while the intermediate element is rotating, the first end is urged against the stub element to bond the intermediate element with the stub element. While the extension element is rotating, the inner end is urged against the second end to bond the extension element and the intermediate element.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: February 14, 2023
    Inventor: Paul Po Cheng
  • Publication number: 20230021833
    Abstract: The present invention provides a method for generating a plurality of on-screen display (OSD) data used in a back-end (BE) circuit. The BE circuit is configured to process a plurality of image data to be displayed on a display device. The method includes steps of: receiving the plurality of image data from an application processor (AP); and extracting information of a detecting layer embedded in the plurality of image data, wherein the information of the detecting layer indicates the plurality of OSD data corresponding to at least one user-interface (UI) layer in the plurality of image data.
    Type: Application
    Filed: July 20, 2021
    Publication date: January 26, 2023
    Applicant: NOVATEK Microelectronics Corp.
    Inventors: Yuan-Po Cheng, Hung-Ming Wang
  • Publication number: 20230018029
    Abstract: A system for processing a semiconductor wafer is provided. The system includes a processing tool. The system also includes gas handling housing having a gas inlet and a gas outlet. The system further includes an exhaust conduit fluidly communicating with the processing tool and the gas inlet of the gas handling housing. In addition, the system includes at least one first filtering assembly and at least one second filtering assembly. The first filtering assembly and the second filtering assembly are positioned in the gas handling housing and arranged in a series along a flowing path that extends from the gas inlet to the gas outlet of the gas handling housing. Each of the first filtering assembly and the second filtering assembly comprises a plurality of wire meshes stacked on top of another.
    Type: Application
    Filed: July 16, 2021
    Publication date: January 19, 2023
    Inventors: CHIH-MING TSAO, PO-CHENG CHEN, DENG-AN WANG
  • Publication number: 20230020731
    Abstract: The present disclosure describes a semiconductor device with a rare earth metal oxide layer and a method for forming the same. The method includes forming fin structures on a substrate and forming superlattice structures on the fin structures, where each of the superlattice structures includes a first-type nanostructured layer and a second-type nanostructured layer. The method further includes forming an isolation layer between the superlattice structures, implanting a rare earth metal into a top portion of the isolation layer to form a rare earth metal oxide layer, and forming a polysilicon structure over the superlattice structures. The method further includes etching portions of the superlattice structures adjacent to the polysilicon structure to form a source/drain (S/D) opening and forming an S/D region in the S/D opening.
    Type: Application
    Filed: November 23, 2021
    Publication date: January 19, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Han-Yu Lin, Szu-Hua Chen, Kuan-Kan Hu, Kenichi Sano, Po-Cheng Wang, Wei-Yen Woon, Pinyen Lin, Che Chi Shih
  • Patent number: 11556896
    Abstract: An employment recruitment method based on face recognition includes acquiring a candidate's data from a third-party website, analyzing the candidate's data by a semantic analysis method to identify human resources information of the candidate, and analyzing messages and postings in the human resources information of the candidate to determine candidate's personality. A terminal device acquires a second face image of the candidate by a second camera, analyzes the second face image of the candidate by a computer vision algorithm to determine a micro-expression of the candidate, and provides the candidate's human resources information, the candidate's personality, and the candidate's micro-expression to the recruiter to evaluate the candidate. The terminal device applying the method is also disclosed.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: January 17, 2023
    Assignee: Fulian Precision Electronics (Tianjin) Co., LTD.
    Inventors: Po-Cheng Chen, Ting-Yu Du, Shih-Yin Tseng
  • Publication number: 20230010717
    Abstract: A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes a stack of channel structures over a semiconductor fin and a gate stack wrapped around the channel structures. The semiconductor device structure also includes a source/drain epitaxial structure adjacent to the channel structures and multiple inner spacers. Each of the inner spacers is between the gate stack and the source/drain epitaxial structure. The semiconductor device structure further includes an isolation structure between the semiconductor fin and the source/drain epitaxial structure.
    Type: Application
    Filed: July 8, 2021
    Publication date: January 12, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Cheng WANG, Ting-Yeh CHEN, De-Fang CHEN, Wei-Yang LEE