Patents by Inventor Po-Chih Wang

Po-Chih Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11949388
    Abstract: A power amplifier includes a power switching circuit, a driver circuit, and an amplifier circuit. The power switching circuit is configured to receive a first voltage and a second voltage, and provide the first voltage or the second voltage according to an operation mode of the power amplifier. The driver circuit is coupled to the power switching circuit. The driver circuit is configured to operate according to the first voltage or the second voltage and generate a driving signal according to an input signal. The amplifier circuit is coupled to the power switching circuit and the driver circuit. The amplifier circuit is configured to operate according to the first voltage or the second voltage and generate an output signal according to the driving signal.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: April 2, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Gen-Sheng Ran, Po-Chih Wang, Ka-Un Chan
  • Patent number: 11942906
    Abstract: The present invention provides a transmitter including a mixer, a harmonic impedance adjustment circuit and an amplifier. The mixer is configured to mix a first baseband signal with a first oscillation signal to generate a first mixed signal to a first node, and to mix a second baseband signal with a second oscillation signal to generate a second mixed signal to a second node. The harmonic impedance adjustment circuit is coupled between the first node and the second node, and is configured to reduce harmonic components of the first mixed signal and the second mixed signal to generate an adjusted first mixed signal and an adjusted second mixed signal. The amplifier is coupled to the harmonic impedance adjustment circuit, and is configured to generate an amplified signal according to the adjusted first mixed signal and the adjusted second mixed signal.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: March 26, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ting-Yao Huang, Teng-Yuan Chang, Po-Chih Wang, Ka-Un Chan
  • Publication number: 20240088095
    Abstract: A method for forming a chip package structure. The method includes bonding first connectors over a front surface of a semiconductor wafer. The method also includes dicing the semiconductor wafer from a rear surface of the semiconductor wafer to form semiconductor dies and mounting first and second semiconductor dies in the semiconductor dies over a top surface of the interposer substrate. The method further forming an encapsulating layer over the top surface of the interposer substrate to cover the first semiconductor die and the second semiconductor die. A first sidewall of the first semiconductor die faces a second sidewall of the second semiconductor die, and upper portions of the first sidewall and the second sidewall have a tapered contour, to define a top die-to-die distance and a bottom die-to-die distance that is less than the top die-to-die distance.
    Type: Application
    Filed: November 24, 2023
    Publication date: March 14, 2024
    Inventors: Chin-Hua WANG, Shin-Puu JENG, Po-Yao LIN, Po-Chen LAI, Shu-Shen YEH, Ming-Chih YEW, Yu-Sheng LIN
  • Patent number: 11689188
    Abstract: The present invention discloses a signal output circuit having anti-interference mechanism. An amplifier is electrically coupled to a power supply and a ground terminal through a first and a second amplifier bond wires, and generates an amplified output signal. A transformer circuit includes a transformer performing impedance transformation on the amplified output signal to generate a transformed output signal and a voltage-stabilizing capacitor suppressing second-order harmonics of the amplifier. A power-terminal side anti-interference circuit includes a power-terminal side bond wire and a power-terminal side anti-interference capacitor. The power-terminal side bond wire is electrically coupled to the ground terminal.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: June 27, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Kuan-Hao Tseng, Ka-Un Chan, Po-Chih Wang
  • Publication number: 20230047042
    Abstract: A power amplifying circuit includes a first input terminal applied with a first bias voltage, a first amplifying circuit generating a first output signal and a second output signal according to an input signal and a first matching circuit combining the first output signal and the second output signal to generate an output signal. The first amplifying circuit includes a first transistor having a first electrode coupled to the first input terminal and a second electrode applied with a second bias voltage and a second transistor having a first electrode s coupled to the first input terminal and a second electrode applied with a third bias voltage. The first transistor generates the first output signal according to the first bias voltage and the second bias voltage. The second transistor generates the second output signal according to the first bias voltage and the third bias voltage.
    Type: Application
    Filed: July 26, 2022
    Publication date: February 16, 2023
    Applicant: Realtek Semiconductor Corp.
    Inventors: Po-Chih Wang, Hsiao-Tsung Yen, Ka-Un Chan
  • Publication number: 20230050926
    Abstract: A radio frequency apparatus includes a power amplifier circuit, a signal coupling circuit, an extraction circuit, and a harmonic filter circuit. The power amplifier circuit is configured to amplify a differential signal to output a to-be-filtered signal. The signal coupling circuit includes a primary side inductor and a secondary side inductor. The signal coupling circuit is configured to convert the to-be-filtered signal received by the primary side inductor into a single-ended signal outputted from the secondary side inductor. The extraction circuit has a center tap. The extraction circuit is configured to inductively couple to the primary side inductor and output a common mode signal from the center tap. The harmonic filter circuit is configured to perform a harmonic filtering on the single-ended signal according to the common mode signal, such that the secondary side inductor of the signal coupling circuit outputs a filtered signal.
    Type: Application
    Filed: August 11, 2022
    Publication date: February 16, 2023
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Hung-Han CHEN, Hsiao-Tsung YEN, Jian-You CHEN, Po-Chih WANG
  • Publication number: 20220286096
    Abstract: The present invention provides a transmitter including a mixer, a harmonic impedance adjustment circuit and an amplifier. The mixer is configured to mix a first baseband signal with a first oscillation signal to generate a first mixed signal to a first node, and to mix a second baseband signal with a second oscillation signal to generate a second mixed signal to a second node. The harmonic impedance adjustment circuit is coupled between the first node and the second node, and is configured to reduce harmonic components of the first mixed signal and the second mixed signal to generate an adjusted first mixed signal and an adjusted second mixed signal. The amplifier is coupled to the harmonic impedance adjustment circuit, and is configured to generate an amplified signal according to the adjusted first mixed signal and the adjusted second mixed signal.
    Type: Application
    Filed: February 7, 2022
    Publication date: September 8, 2022
    Applicant: Realtek Semiconductor Corp.
    Inventors: Ting-Yao Huang, Teng-Yuan Chang, Po-Chih Wang, Ka-Un Chan
  • Publication number: 20220239264
    Abstract: A power amplifier includes a power switching circuit, a driver circuit, and an amplifier circuit. The power switching circuit is configured to receive a first voltage and a second voltage, and provide the first voltage or the second voltage according to an operation mode of the power amplifier. The driver circuit is coupled to the power switching circuit. The driver circuit is configured to operate according to the first voltage or the second voltage and generate a driving signal according to an input signal. The amplifier circuit is coupled to the power switching circuit and the driver circuit. The amplifier circuit is configured to operate according to the first voltage or the second voltage and generate an output signal according to the driving signal.
    Type: Application
    Filed: November 23, 2021
    Publication date: July 28, 2022
    Inventors: Gen-Sheng RAN, Po-Chih WANG, Ka-Un CHAN
  • Patent number: 11385668
    Abstract: An offset compensation device includes a first bias module and a second bias module. The first bias module includes a plurality of first current control circuits and a plurality of second current control circuits coupled in parallel. Each of the first current control circuits generates a first reference current, and each of the second current control circuits generates a second reference current. The second bias module includes a plurality of third current control circuits and a plurality of fourth current control circuits coupled in parallel. Each of the third current control circuits generates a third reference current, and each of the fourth current control circuits generates a fourth reference current. The second reference current is greater than the first reference current, and the fourth reference current is greater than the third reference current.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: July 12, 2022
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ting-Yao Huang, Po-Chih Wang, Ka-Un Chan
  • Publication number: 20220157506
    Abstract: A transformer device includes a first coil, a second coil, and a third coil. The first coil includes first segments and at least one first connecting portion, in which the first segments are coupled to each other through the at least one first connecting portion. The second coil includes second segments and second connecting portions, in which the of second segments are coupled to each other through the second connecting portions. The third coil is configured to couple the first coil and the second coil. The third coil includes third segments and third connecting portions, a part of the plurality of third segments are coupled in parallel with each other through the third connecting portions, and at least one part of the first segments and at least one part of the second segments are arranged between the part of the third segments.
    Type: Application
    Filed: October 28, 2021
    Publication date: May 19, 2022
    Inventors: HSIAO-TSUNG YEN, PO-CHIH WANG
  • Publication number: 20220157514
    Abstract: A transformer device includes first to third coils. The first coil includes first segments and a first connecting portion. The first segments are coupled to each other through the first connecting portion. The second coil includes second segments and second connecting portions. The second segments are coupled to each other through the second connecting portions. The third coil includes third segments and third connecting portions. The third segments form a ring structure through the third connecting portions, in order to couple the first coil and the second coil. A first portion of the first segments and a second portion of the second segments are arranged in a range of the ring structure, the first portion of the first segments is arranged in a range of the second coil, and the second portion of the second segments is arranged in a range of the first coil.
    Type: Application
    Filed: October 29, 2021
    Publication date: May 19, 2022
    Inventors: HSIAO-TSUNG YEN, PO-CHIH WANG
  • Publication number: 20210351764
    Abstract: The present invention discloses a signal output circuit having anti-interference mechanism. An amplifier is electrically coupled to a power supply and a ground terminal through a first and a second amplifier bond wires, and generates an amplified output signal. A transformer circuit includes a transformer performing impedance transformation on the amplified output signal to generate a transformed output signal and a voltage-stabilizing capacitor suppressing second-order harmonics of the amplifier. A power-terminal side anti-interference circuit includes a power-terminal side bond wire and a power-terminal side anti-interference capacitor. The power-terminal side bond wire is electrically coupled to the ground terminal.
    Type: Application
    Filed: April 29, 2021
    Publication date: November 11, 2021
    Inventors: KUAN-HAO TSENG, KA-UN CHAN, PO-CHIH WANG
  • Patent number: 11165516
    Abstract: An output power linearization method, suitable for a calibration system, includes the following operations: providing an instruction signal, which corresponding to a currently ideal output power among multiple ideal output powers, to an emission module of the calibration system so that the emission module outputs a radio frequency (RF) signal with a practical output power according to the instruction signal; obtaining a feedback signal, by a feedback circuit of the calibration system, from an output terminal of the emission module, and calculating a feedback output power from the feedback signal; calculating an output difference between the currently ideal output power and the feedback output power; if an absolute value of the output difference is larger than an absolute value of a feedback error of the feedback circuit, adjusting a present gain of the emission module so that the practical output power approaches the currently ideal output power.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: November 2, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Kuan-Hao Tseng, Ka-Un Chan, Po-Chih Wang
  • Publication number: 20210333816
    Abstract: An offset compensation device includes a first bias module and a second bias module. The first bias module includes a plurality of first current control circuits and a plurality of second current control circuits coupled in parallel. Each of the first current control circuits generates a first reference current, and each of the second current control circuits generates a second reference current. The second bias module includes a plurality of third current control circuits and a plurality of fourth current control circuits coupled in parallel. Each of the third current control circuits generates a third reference current, and each of the fourth current control circuits generates a fourth reference current. The second reference current is greater than the first reference current, and the fourth reference current is greater than the third reference current.
    Type: Application
    Filed: April 19, 2021
    Publication date: October 28, 2021
    Inventors: Ting-Yao Huang, Po-Chih Wang, Ka-Un Chan
  • Publication number: 20210281332
    Abstract: An output power linearization method, suitable for a calibration system, includes the following operations: providing an instruction signal, which corresponding to a currently ideal output power among multiple ideal output powers, to an emission module of the calibration system so that the emission module outputs a radio frequency (RF) signal with a practical output power according to the instruction signal; obtaining a feedback signal, by a feedback circuit of the calibration system, from an output terminal of the emission module, and calculating a feedback output power from the feedback signal; calculating an output difference between the currently ideal output power and the feedback output power; if an absolute value of the output difference is larger than an absolute value of a feedback error of the feedback circuit, adjusting a present gain of the emission module so that the practical output power approaches the currently ideal output power.
    Type: Application
    Filed: September 9, 2020
    Publication date: September 9, 2021
    Inventors: Kuan-Hao TSENG, Ka-Un CHAN, Po-Chih WANG
  • Patent number: 11012040
    Abstract: Disclosed is an apparatus including a radio frequency amplifying circuit, a power supply circuit, and a bias generating circuit. The power supply circuit includes: a first power supply terminal coupled to a first ground terminal via a first capacitor and coupled to/decoupled from the radio frequency amplifying circuit through a first switch; and a second power supply terminal coupled to a second ground terminal via a second capacitor and coupled to/decoupled from the radio frequency amplifying circuit through a second switch, wherein the first capacitor and second capacitor are coupled to/decoupled from the radio frequency amplifying circuit through the first switch and second switch respectively, the supply voltages outputted from the two power supply terminals are different, and the two switches are not concurrently turned on. The radio frequency amplifying circuit operates according to a bias voltage provided by the bias generating circuit and one of the two supply voltages.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: May 18, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Yang-Tang Tsai, Po-Chih Wang, Ka-Un Chan
  • Publication number: 20210075463
    Abstract: Disclosed is a radio-frequency (RF) circuit capable of performing an RF characteristic test in a test mode. The RF circuit includes: a test signal generator generating a test signal; an RF receiver, coupled to the test signal generator, transmitting the test signal and thereby generating a receiver analog signal; a coupling circuit transmitting the receiver analog signal to an RF transmitter in the test mode; the RF transmitter transmitting the receiver analog signal and thereby generating a transmitter analog signal; a test result generator, coupled between the RF transmitter and a test result output terminal, including a signal converter for generating a converted signal according to the transmitter analog signal in the test mode, wherein the output signal at the test result output terminal is the converted signal or originated therefrom and relates to the result of the RF characteristic test.
    Type: Application
    Filed: August 17, 2020
    Publication date: March 11, 2021
    Inventors: KA-UN CHAN, CHIH-LUNG CHEN, CHIA-JUN CHANG, PO-CHIH WANG
  • Patent number: 10938438
    Abstract: Disclosed is a radio-frequency (RF) circuit capable of performing an RF characteristic test in a test mode. The RF circuit includes: a test signal generator generating a test signal; an RF receiver, coupled to the test signal generator, transmitting the test signal and thereby generating a receiver analog signal; a coupling circuit transmitting the receiver analog signal to an RF transmitter in the test mode; the RF transmitter transmitting the receiver analog signal and thereby generating a transmitter analog signal; a test result generator, coupled between the RF transmitter and a test result output terminal, including a signal converter for generating a converted signal according to the transmitter analog signal in the test mode, wherein the output signal at the test result output terminal is the converted signal or originated therefrom and relates to the result of the RF characteristic test.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: March 2, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Ka-Un Chan, Chih-Lung Chen, Chia-Jun Chang, Po-Chih Wang
  • Publication number: 20200259470
    Abstract: Disclosed is an apparatus including a radio frequency amplifying circuit, a power supply circuit, and a bias generating circuit. The power supply circuit includes: a first power supply terminal coupled to a first ground terminal via a first capacitor and coupled to/decoupled from the radio frequency amplifying circuit through a first switch; and a second power supply terminal coupled to a second ground terminal via a second capacitor and coupled to/decoupled from the radio frequency amplifying circuit through a second switch, wherein the first capacitor and second capacitor are coupled to/decoupled from the radio frequency amplifying circuit through the first switch and second switch respectively, the supply voltages outputted from the two power supply terminals are different, and the two switches are not concurrently turned on. The radio frequency amplifying circuit operates according to a bias voltage provided by the bias generating circuit and one of the two supply voltages.
    Type: Application
    Filed: February 4, 2020
    Publication date: August 13, 2020
    Inventors: YANG-TANG TSAI, PO-CHIH WANG, KA-UN CHAN
  • Patent number: 10062947
    Abstract: An RF transmitter with a power combiner and a differential amplifier is provided. The power combiner converts a differential output signal to a single-end output signal and transmits the single-end output signal to the antenna. The differential amplifier includes common-source input transistors, common-gate output transistors and a switch module. The common-source input transistors amplify a differential input signal and output an amplified differential signal. The common-gate output transistors, including sources electrically coupled to the common-source input transistors and drains electrically coupled to the power combiner, generate the differential output signal according to the amplified differential signal. The switch module is electrically coupled between the gates. The switch module electrically couples the gates of the common-gate output transistors if the RF transmitter is in operation and electrically isolates the gates if the RF receiver is in operation.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: August 28, 2018
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Ting-Yao Huang, Po-Chih Wang