Abstract: An RF transmitter with a power combiner and a differential amplifier is provided. The power combiner converts a differential output signal to a single-end output signal and transmits the single-end output signal to the antenna. The differential amplifier includes common-source input transistors, common-gate output transistors and a switch module. The common-source input transistors amplify a differential input signal and output an amplified differential signal. The common-gate output transistors, including sources electrically coupled to the common-source input transistors and drains electrically coupled to the power combiner, generate the differential output signal according to the amplified differential signal. The switch module is electrically coupled between the gates. The switch module electrically couples the gates of the common-gate output transistors if the RF transmitter is in operation and electrically isolates the gates if the RF receiver is in operation.

Abstract: A driver suitable for driving a power amplifier is provided. The driver includes a voltage buffer circuit and a voltage transforming circuit. The voltage buffer circuit receives an input signal, buffers the input signal, and outputs a first output signal. The voltage transforming circuit receives the first output signal and outputs a second output signal to the power amplifier, in which an equivalent inductance of the voltage transforming circuit and an input capacitance of the power amplifier are arranged to make the voltage buffer circuit have a voltage gain approximated to 1.

Abstract: A driver suitable for driving a power amplifier is provided. The driver includes a voltage buffer circuit and a voltage transforming circuit. The voltage buffer circuit receives an input signal, buffers the input signal, and outputs a first output signal. The voltage transforming circuit receives the first output signal and outputs a second output signal to the power amplifier, in which an equivalent inductance of the voltage transforming circuit and an input capacitance of the power amplifier are arranged to make the voltage buffer circuit have a voltage gain approximated to 1.

Abstract: A multi-mode power amplifying circuit, and a multi-mode wireless transmission module and method thereof are provided. The multi-mode wireless transmission module includes the multi-mode power amplifying circuit and an antenna. In the multi-mode power amplifying circuit and the antenna, a first power amplifier is electrically connected between a signal input end and a first impedance matching circuit, and an output end of the first impedance matching circuit is electrically connected to the antenna. A second power amplifier is electrically connected to the signal input end, and a second impedance matching circuit is electrically connected between the second power amplifier and the first impedance matching circuit. A switching circuit is electrically connected to an input end of the second impedance matching circuit. The switching circuit switches on-off corresponding to an operation of the first power amplifier and an operation of the second power amplifier.

Abstract: A radio frequency (RF) power amplifier is disclosed. The RF power amplifier includes an impedance transformation circuit, a current unit gain amplifier, and an output match circuit. The impedance transformation circuit receives a first input power signal and outputs a second input power signal correspondingly, wherein the impedance transformation circuit transforms an input impedance to an output impedance according to an impedance matching parameter for increasing power added efficiency of a pre-stage circuit. The current unit gain amplifier provides a linear transimpedance so as to transmit an input current to an output impedance, and then generate a linear output power for increasing power added efficiency of the current unit gain amplifier, wherein the impedance matching parameter is determined by a first system voltage, a second system voltage, and a predetermined power gain value.

Abstract: A triple cascode power amplifier is provided. The triple cascode power amplifier includes a first-stage transistor pair, a second-stage transistor pair and a third-stage transistor pair. The first-stage transistor pair comprises two first-stage transistors that respectively receive two dynamic bias voltages with opposite polarities. The second-stage transistor pair is coupled with the first-stage transistor pair to form a first node and comprise two second-stage transistors coupled with each other to form a second node. The third-stage transistor pair is coupled with the second-stage transistor pair and comprises two third-stage transistors for outputting a differential signal. The first-stage transistor pair and the second-stage transistor pair are low voltage components while the third-stage transistor pair is a high voltage component. The power amplifier transforms the differential signal into a single-ended signal for output.

Abstract: A radio frequency (RF) power amplifier is disclosed. The RF power amplifier includes an impedance transformation circuit, a current unit gain amplifier, and an output match circuit. The impedance transformation circuit receives a first input power signal and outputs a second input power signal correspondingly, wherein the impedance transformation circuit transforms an input impedance to an output impedance according to an impedance matching parameter for increasing power added efficiency of a pre-stage circuit. The current unit gain amplifier provides a linear transimpedance so as to transmit an input current to an output impedance, and then generate a linear output power for increasing power added efficiency of the current unit gain amplifier, wherein the impedance matching parameter is determined by a first system voltage, a second system voltage, and a predetermined power gain value.

Abstract: The present invention discloses a semiconductor switch comprising a switching unit. Said switching unit includes: a transistor having a drain, a gate and a source; a drain bias resistor coupled to the drain; a drain bias selecting circuit to couple the drain bias resistor with a first or a second drain bias according to the transistor's state; a gate bias resistor coupled to the gate; a gate bias selecting circuit to couple the gate bias resistor with a first or a second gate bias according to the transistor's state; a source bias resistor coupled to the source; and a source bias selecting circuit to couple the source bias resistor with a first or a second source bias according to the transistor's state, wherein the first and second drain biases are different, the first and second gate biases are different, and the first and second source biases are different.

Abstract: The present invention discloses a semiconductor switch comprising a switching unit. Said switching unit includes: a transistor having a drain, a gate and a source; a drain bias resistor coupled to the drain; a drain bias selecting circuit to couple the drain bias resistor with a first or a second drain bias according to the transistor's state; a gate bias resistor coupled to the gate; a gate bias selecting circuit to couple the gate bias resistor with a first or a second gate bias according to the transistor's state; a source bias resistor coupled to the source; and a source bias selecting circuit to couple the source bias resistor with a first or a second source bias according to the transistor's state, wherein the first and second drain biases are different, the first and second gate biases are different, and the first and second source biases are different.

Abstract: A triple cascode power amplifier is provided. The triple cascode power amplifier includes a first-stage transistor pair, a second-stage transistor pair and a third-stage transistor pair. The first-stage transistor pair comprises two first-stage transistors that respectively receive two dynamic bias voltages with opposite polarities. The second-stage transistor pair is coupled with the first-stage transistor pair to form a first node and comprise two second-stage transistors coupled with each other to form a second node. The third-stage transistor pair is coupled with the second-stage transistor pair and comprises two third-stage transistors for outputting a differential signal. The first-stage transistor pair and the second-stage transistor pair are low voltage components while the third-stage transistor pair is a high voltage component. The power amplifier transforms the differential signal into a single-ended signal for output.

Abstract: A multi-mode power amplifying circuit, and a multi-mode wireless transmission module and method thereof are provided. The multi-mode wireless transmission module includes the multi-mode power amplifying circuit and an antenna. In the multi-mode power amplifying circuit and the antenna, a first power amplifier is electrically connected between a signal input end and a first impedance matching circuit, and an output end of the first impedance matching circuit is electrically connected to the antenna. A second power amplifier is electrically connected to the signal input end, and a second impedance matching circuit is electrically connected between the second power amplifier and the first impedance matching circuit. A switching circuit is electrically connected to an input end of the second impedance matching circuit. The switching circuit switches on-off corresponding to an operation of the first power amplifier and an operation of the second power amplifier.

Abstract: A power amplifier is provided. The power amplifier includes a loading circuit, a first stage amplifying circuit, an analog pre-distorter, a loading circuit and a second stage amplifying circuit. The first stage amplifying circuit is coupled to the loading circuit to receive a first signal and output a second signal accordingly. The analog pre-distorter is coupled to the first stage amplifying circuit to detect the envelope of the second signal and generates a third signal according to the envelope. The second stage amplifying circuit is coupled to the first stage amplifying circuit to receive the second signal. The loading circuit is biased on the third signal. The gain of the first stage amplifying circuit is related to the third signal.

Abstract: A power amplifier is provided. The power amplifier includes a loading circuit, a first stage amplifying circuit, an analog pre-distorter, a loading circuit and a second stage amplifying circuit. The first stage amplifying circuit is coupled to the loading circuit to receive a first signal and output a second signal accordingly. The analog pre-distorter is coupled to the first stage amplifying circuit to detect the envelope of the second signal and generates a third signal according to the envelope. The second stage amplifying circuit is coupled to the first stage amplifying circuit to receive the second signal. The loading circuit is biased on the third signal. The gain of the first stage amplifying circuit is related to the third signal.

Abstract: A power amplifier is provided. The power amplifier includes a loading circuit, a first stage amplifying circuit, an analog pre-distorter, a loading circuit and a second stage amplifying circuit. The first stage amplifying circuit is coupled to the loading circuit to receive a first signal and output a second signal accordingly. The analog pre-distorter is coupled to the first stage amplifying circuit to detect the envelope of the second signal and generates a third signal according to the envelope. The second stage amplifying circuit is coupled to the first stage amplifying circuit to receive the second signal. The loading circuit is biased on the third signal. The gain of the first stage amplifying circuit is related to the third signal.

Abstract: A power amplifier includes a first transistor, a second transistor and a bias voltage generator. The first transistor includes a gate electrode, a first electrode and a second electrode, where the gate electrode is coupled to a signal input terminal of the power amplifier. The second transistor includes a gate electrode, first electrode and a second electrode, where the second electrode of the second transistor is connected to the first electrode of the first transistor, and the first electrode of the second transistor is coupled to a signal output terminal of the power amplifier. The bias voltage generator is coupled to the second transistor, and is utilized for generating a bias voltage to bias the electrode of the second transistor, where the bias voltage is less than a supply voltage of the power amplifier.

Abstract: A signal transmitting/receiving circuit includes a transmitter, a receiver, a balun and an impedance matching circuit. The transmitter is utilized for transmitting an output signal. The receiver is utilized for receiving an input signal. The balun includes a first input terminal, a second input terminal and an output terminal. The impedance matching circuit, which is coupled between the transmitter, the receiver, and the balun, provides transmitting impedance when the transmitter transmits the output signal such that an output signal may be output at an output terminal of the balun via a transmitting path. Also, the impedance matching circuit provides transmitting impedance when the receiver receives the input signal such that the input signal may be transmitted from the output terminal of the balun to the receiver via a receiving path.

Abstract: A power amplifier includes a first transistor, a second transistor and a bias voltage generator. The first transistor includes a gate electrode, a first electrode and a second electrode, where the gate electrode is coupled to a signal input terminal of the power amplifier. The second transistor includes a gate electrode, first electrode and a second electrode, where the second electrode of the second transistor is connected to the first electrode of the first transistor, and the first electrode of the second transistor is coupled to a signal output terminal of the power amplifier. The bias voltage generator is coupled to the second transistor, and is utilized for generating a bias voltage to bias the electrode of the second transistor, where the bias voltage is less than a supply voltage of the power amplifier.

Abstract: A power amplifier is provided. The power amplifier includes a loading circuit, a first stage amplifying circuit, an analog pre-distorter, a loading circuit and a second stage amplifying circuit. The first stage amplifying circuit is coupled to the loading circuit to receive a first signal and output a second signal accordingly. The analog pre-distorter is coupled to the first stage amplifying circuit to detect the envelope of the second signal and generates a third signal according to the envelope. The second stage amplifying circuit is coupled to the first stage amplifying circuit to receive the second signal. The loading circuit is biased on the third signal. The gain of the first stage amplifying circuit is related to the third signal.

Abstract: An illumination module including a substrate and a plurality of first and second LED chips is provided. The substrate has a plurality of device bonding areas, and each of device bonding areas has two sub-device bonding areas. Each sub-device bonding area has a first, second, and common route. The first routes surround the outer peripheries of each device bonding area. The second routes are located between the two sub-device bonding areas. The common routes are located between the first and second routes. The first LED chips located at the common routes are electrically connected to each other. The second LED chips located at the first and second routes respectly are electrically connected to each other.

Abstract: A signal transmitting/receiving circuit includes a transmitter, a receiver, a balun and an impedance matching circuit. The transmitter is utilized for transmitting an output signal. The receiver is utilized for receiving an input signal. The balun includes a first input terminal, a second input terminal and an output terminal. The impedance matching circuit, which is coupled between the transmitter, the receiver, and the balun, provides transmitting impedance when the transmitter transmits the output signal such that an output signal may be output at an output terminal of the balun via a transmitting path. Also, the impedance matching circuit provides transmitting impedance when the receiver receives the input signal such that the input signal may be transmitted from the output terminal of the balun to the receiver via a receiving path.